1 /*
2  * Copyright 2016 Linaro Ltd.
3  * Copyright 2016 ZTE Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  *
9  */
10 
11 #ifndef __ZX_HDMI_REGS_H__
12 #define __ZX_HDMI_REGS_H__
13 
14 #define FUNC_SEL			0x000b
15 #define FUNC_HDMI_EN			BIT(0)
16 #define CLKPWD				0x000d
17 #define CLKPWD_PDIDCK			BIT(2)
18 #define P2T_CTRL			0x0066
19 #define P2T_DC_PKT_EN			BIT(7)
20 #define L1_INTR_STAT			0x007e
21 #define L1_INTR_STAT_INTR1		BIT(0)
22 #define INTR1_STAT			0x008f
23 #define INTR1_MASK			0x0095
24 #define INTR1_MONITOR_DETECT		(BIT(5) | BIT(6))
25 #define ZX_DDC_ADDR			0x00ed
26 #define ZX_DDC_SEGM			0x00ee
27 #define ZX_DDC_OFFSET			0x00ef
28 #define ZX_DDC_DIN_CNT1			0x00f0
29 #define ZX_DDC_DIN_CNT2			0x00f1
30 #define ZX_DDC_CMD			0x00f3
31 #define DDC_CMD_MASK			0xf
32 #define DDC_CMD_CLEAR_FIFO		0x9
33 #define DDC_CMD_SEQUENTIAL_READ		0x2
34 #define ZX_DDC_DATA			0x00f4
35 #define ZX_DDC_DOUT_CNT			0x00f5
36 #define DDC_DOUT_CNT_MASK		0x1f
37 #define TEST_TXCTRL			0x00f7
38 #define TEST_TXCTRL_HDMI_MODE		BIT(1)
39 #define HDMICTL4			0x0235
40 #define TPI_HPD_RSEN			0x063b
41 #define TPI_HPD_CONNECTION		(BIT(1) | BIT(2))
42 #define TPI_INFO_FSEL			0x06bf
43 #define FSEL_AVI			0
44 #define FSEL_GBD			1
45 #define FSEL_AUDIO			2
46 #define FSEL_SPD			3
47 #define FSEL_MPEG			4
48 #define FSEL_VSIF			5
49 #define TPI_INFO_B0			0x06c0
50 #define TPI_INFO_EN			0x06df
51 #define TPI_INFO_TRANS_EN		BIT(7)
52 #define TPI_INFO_TRANS_RPT		BIT(6)
53 #define TPI_DDC_MASTER_EN		0x06f8
54 #define HW_DDC_MASTER			BIT(7)
55 #define N_SVAL1				0xa03
56 #define N_SVAL2				0xa04
57 #define N_SVAL3				0xa05
58 #define AUD_EN				0xa13
59 #define AUD_IN_EN			BIT(0)
60 #define AUD_MODE			0xa14
61 #define SPDIF_EN			BIT(1)
62 #define TPI_AUD_CONFIG			0xa62
63 #define SPDIF_SAMPLE_SIZE_SHIFT		6
64 #define SPDIF_SAMPLE_SIZE_MASK		(0x3 << SPDIF_SAMPLE_SIZE_SHIFT)
65 #define SPDIF_SAMPLE_SIZE_16BIT		(0x1 << SPDIF_SAMPLE_SIZE_SHIFT)
66 #define SPDIF_SAMPLE_SIZE_20BIT		(0x2 << SPDIF_SAMPLE_SIZE_SHIFT)
67 #define SPDIF_SAMPLE_SIZE_24BIT		(0x3 << SPDIF_SAMPLE_SIZE_SHIFT)
68 #define TPI_AUD_MUTE			BIT(4)
69 
70 #endif /* __ZX_HDMI_REGS_H__ */
71