1 /*
2 * Copyright (C) 2015 Red Hat, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
26 #ifndef VIRTIO_DRV_H
27 #define VIRTIO_DRV_H
28
29 #include <linux/virtio.h>
30 #include <linux/virtio_ids.h>
31 #include <linux/virtio_config.h>
32 #include <linux/virtio_gpu.h>
33
34 #include <drm/drmP.h>
35 #include <drm/drm_gem.h>
36 #include <drm/drm_atomic.h>
37 #include <drm/drm_crtc_helper.h>
38 #include <drm/drm_encoder.h>
39 #include <drm/ttm/ttm_bo_api.h>
40 #include <drm/ttm/ttm_bo_driver.h>
41 #include <drm/ttm/ttm_placement.h>
42 #include <drm/ttm/ttm_module.h>
43
44 #define DRIVER_NAME "virtio_gpu"
45 #define DRIVER_DESC "virtio GPU"
46 #define DRIVER_DATE "0"
47
48 #define DRIVER_MAJOR 0
49 #define DRIVER_MINOR 0
50 #define DRIVER_PATCHLEVEL 1
51
52 /* virtgpu_drm_bus.c */
53 int drm_virtio_init(struct drm_driver *driver, struct virtio_device *vdev);
54
55 struct virtio_gpu_object {
56 struct drm_gem_object gem_base;
57 uint32_t hw_res_handle;
58
59 struct sg_table *pages;
60 void *vmap;
61 bool dumb;
62 struct ttm_place placement_code;
63 struct ttm_placement placement;
64 struct ttm_buffer_object tbo;
65 struct ttm_bo_kmap_obj kmap;
66 };
67 #define gem_to_virtio_gpu_obj(gobj) \
68 container_of((gobj), struct virtio_gpu_object, gem_base)
69
70 struct virtio_gpu_vbuffer;
71 struct virtio_gpu_device;
72
73 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
74 struct virtio_gpu_vbuffer *vbuf);
75
76 struct virtio_gpu_fence_driver {
77 atomic64_t last_seq;
78 uint64_t sync_seq;
79 uint64_t context;
80 struct list_head fences;
81 spinlock_t lock;
82 };
83
84 struct virtio_gpu_fence {
85 struct dma_fence f;
86 struct virtio_gpu_fence_driver *drv;
87 struct list_head node;
88 uint64_t seq;
89 };
90 #define to_virtio_fence(x) \
91 container_of(x, struct virtio_gpu_fence, f)
92
93 struct virtio_gpu_vbuffer {
94 char *buf;
95 int size;
96
97 void *data_buf;
98 uint32_t data_size;
99
100 char *resp_buf;
101 int resp_size;
102
103 virtio_gpu_resp_cb resp_cb;
104
105 struct list_head list;
106 };
107
108 struct virtio_gpu_output {
109 int index;
110 struct drm_crtc crtc;
111 struct drm_connector conn;
112 struct drm_encoder enc;
113 struct virtio_gpu_display_one info;
114 struct virtio_gpu_update_cursor cursor;
115 int cur_x;
116 int cur_y;
117 };
118 #define drm_crtc_to_virtio_gpu_output(x) \
119 container_of(x, struct virtio_gpu_output, crtc)
120 #define drm_connector_to_virtio_gpu_output(x) \
121 container_of(x, struct virtio_gpu_output, conn)
122 #define drm_encoder_to_virtio_gpu_output(x) \
123 container_of(x, struct virtio_gpu_output, enc)
124
125 struct virtio_gpu_framebuffer {
126 struct drm_framebuffer base;
127 int x1, y1, x2, y2; /* dirty rect */
128 spinlock_t dirty_lock;
129 uint32_t hw_res_handle;
130 };
131 #define to_virtio_gpu_framebuffer(x) \
132 container_of(x, struct virtio_gpu_framebuffer, base)
133
134 struct virtio_gpu_mman {
135 struct ttm_bo_global_ref bo_global_ref;
136 struct drm_global_reference mem_global_ref;
137 bool mem_global_referenced;
138 struct ttm_bo_device bdev;
139 };
140
141 struct virtio_gpu_fbdev;
142
143 struct virtio_gpu_queue {
144 struct virtqueue *vq;
145 spinlock_t qlock;
146 wait_queue_head_t ack_queue;
147 struct work_struct dequeue_work;
148 };
149
150 struct virtio_gpu_drv_capset {
151 uint32_t id;
152 uint32_t max_version;
153 uint32_t max_size;
154 };
155
156 struct virtio_gpu_drv_cap_cache {
157 struct list_head head;
158 void *caps_cache;
159 uint32_t id;
160 uint32_t version;
161 uint32_t size;
162 atomic_t is_valid;
163 };
164
165 struct virtio_gpu_device {
166 struct device *dev;
167 struct drm_device *ddev;
168
169 struct virtio_device *vdev;
170
171 struct virtio_gpu_mman mman;
172
173 /* pointer to fbdev info structure */
174 struct virtio_gpu_fbdev *vgfbdev;
175 struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
176 uint32_t num_scanouts;
177
178 struct virtio_gpu_queue ctrlq;
179 struct virtio_gpu_queue cursorq;
180 struct kmem_cache *vbufs;
181 bool vqs_ready;
182
183 struct idr resource_idr;
184 spinlock_t resource_idr_lock;
185
186 wait_queue_head_t resp_wq;
187 /* current display info */
188 spinlock_t display_info_lock;
189 bool display_info_pending;
190
191 struct virtio_gpu_fence_driver fence_drv;
192
193 struct idr ctx_id_idr;
194 spinlock_t ctx_id_idr_lock;
195
196 bool has_virgl_3d;
197
198 struct work_struct config_changed_work;
199
200 struct virtio_gpu_drv_capset *capsets;
201 uint32_t num_capsets;
202 struct list_head cap_cache;
203 };
204
205 struct virtio_gpu_fpriv {
206 uint32_t ctx_id;
207 };
208
209 /* virtio_ioctl.c */
210 #define DRM_VIRTIO_NUM_IOCTLS 10
211 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
212
213 /* virtio_kms.c */
214 int virtio_gpu_driver_load(struct drm_device *dev, unsigned long flags);
215 void virtio_gpu_driver_unload(struct drm_device *dev);
216 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
217 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
218
219 /* virtio_gem.c */
220 void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj);
221 int virtio_gpu_gem_init(struct virtio_gpu_device *vgdev);
222 void virtio_gpu_gem_fini(struct virtio_gpu_device *vgdev);
223 int virtio_gpu_gem_create(struct drm_file *file,
224 struct drm_device *dev,
225 uint64_t size,
226 struct drm_gem_object **obj_p,
227 uint32_t *handle_p);
228 int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
229 struct drm_file *file);
230 void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
231 struct drm_file *file);
232 struct virtio_gpu_object *virtio_gpu_alloc_object(struct drm_device *dev,
233 size_t size, bool kernel,
234 bool pinned);
235 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
236 struct drm_device *dev,
237 struct drm_mode_create_dumb *args);
238 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
239 struct drm_device *dev,
240 uint32_t handle, uint64_t *offset_p);
241
242 /* virtio_fb */
243 #define VIRTIO_GPUFB_CONN_LIMIT 1
244 int virtio_gpu_fbdev_init(struct virtio_gpu_device *vgdev);
245 void virtio_gpu_fbdev_fini(struct virtio_gpu_device *vgdev);
246 int virtio_gpu_surface_dirty(struct virtio_gpu_framebuffer *qfb,
247 struct drm_clip_rect *clips,
248 unsigned int num_clips);
249 /* virtio vg */
250 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
251 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
252 void virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev,
253 uint32_t *resid);
254 void virtio_gpu_resource_id_put(struct virtio_gpu_device *vgdev, uint32_t id);
255 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
256 uint32_t resource_id,
257 uint32_t format,
258 uint32_t width,
259 uint32_t height);
260 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
261 uint32_t resource_id);
262 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
263 uint32_t resource_id, uint64_t offset,
264 __le32 width, __le32 height,
265 __le32 x, __le32 y,
266 struct virtio_gpu_fence **fence);
267 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
268 uint32_t resource_id,
269 uint32_t x, uint32_t y,
270 uint32_t width, uint32_t height);
271 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
272 uint32_t scanout_id, uint32_t resource_id,
273 uint32_t width, uint32_t height,
274 uint32_t x, uint32_t y);
275 int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
276 struct virtio_gpu_object *obj,
277 uint32_t resource_id,
278 struct virtio_gpu_fence **fence);
279 int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev);
280 int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev);
281 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
282 struct virtio_gpu_output *output);
283 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
284 void virtio_gpu_cmd_resource_inval_backing(struct virtio_gpu_device *vgdev,
285 uint32_t resource_id);
286 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
287 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
288 int idx, int version,
289 struct virtio_gpu_drv_cap_cache **cache_p);
290 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
291 uint32_t nlen, const char *name);
292 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
293 uint32_t id);
294 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
295 uint32_t ctx_id,
296 uint32_t resource_id);
297 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
298 uint32_t ctx_id,
299 uint32_t resource_id);
300 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
301 void *data, uint32_t data_size,
302 uint32_t ctx_id, struct virtio_gpu_fence **fence);
303 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
304 uint32_t resource_id, uint32_t ctx_id,
305 uint64_t offset, uint32_t level,
306 struct virtio_gpu_box *box,
307 struct virtio_gpu_fence **fence);
308 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
309 uint32_t resource_id, uint32_t ctx_id,
310 uint64_t offset, uint32_t level,
311 struct virtio_gpu_box *box,
312 struct virtio_gpu_fence **fence);
313 void
314 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
315 struct virtio_gpu_resource_create_3d *rc_3d,
316 struct virtio_gpu_fence **fence);
317 void virtio_gpu_ctrl_ack(struct virtqueue *vq);
318 void virtio_gpu_cursor_ack(struct virtqueue *vq);
319 void virtio_gpu_fence_ack(struct virtqueue *vq);
320 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
321 void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
322 void virtio_gpu_dequeue_fence_func(struct work_struct *work);
323
324 /* virtio_gpu_display.c */
325 int virtio_gpu_framebuffer_init(struct drm_device *dev,
326 struct virtio_gpu_framebuffer *vgfb,
327 const struct drm_mode_fb_cmd2 *mode_cmd,
328 struct drm_gem_object *obj);
329 int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
330 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
331
332 /* virtio_gpu_plane.c */
333 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc);
334 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
335 enum drm_plane_type type,
336 int index);
337
338 /* virtio_gpu_ttm.c */
339 int virtio_gpu_ttm_init(struct virtio_gpu_device *vgdev);
340 void virtio_gpu_ttm_fini(struct virtio_gpu_device *vgdev);
341 int virtio_gpu_mmap(struct file *filp, struct vm_area_struct *vma);
342
343 /* virtio_gpu_fence.c */
344 int virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
345 struct virtio_gpu_ctrl_hdr *cmd_hdr,
346 struct virtio_gpu_fence **fence);
347 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
348 u64 last_seq);
349
350 /* virtio_gpu_object */
351 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
352 unsigned long size, bool kernel, bool pinned,
353 struct virtio_gpu_object **bo_ptr);
354 int virtio_gpu_object_kmap(struct virtio_gpu_object *bo, void **ptr);
355 int virtio_gpu_object_get_sg_table(struct virtio_gpu_device *qdev,
356 struct virtio_gpu_object *bo);
357 void virtio_gpu_object_free_sg_table(struct virtio_gpu_object *bo);
358 int virtio_gpu_object_wait(struct virtio_gpu_object *bo, bool no_wait);
359
360 /* virtgpu_prime.c */
361 int virtgpu_gem_prime_pin(struct drm_gem_object *obj);
362 void virtgpu_gem_prime_unpin(struct drm_gem_object *obj);
363 struct sg_table *virtgpu_gem_prime_get_sg_table(struct drm_gem_object *obj);
364 struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
365 struct drm_device *dev, struct dma_buf_attachment *attach,
366 struct sg_table *sgt);
367 void *virtgpu_gem_prime_vmap(struct drm_gem_object *obj);
368 void virtgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
369 int virtgpu_gem_prime_mmap(struct drm_gem_object *obj,
370 struct vm_area_struct *vma);
371
372 static inline struct virtio_gpu_object*
virtio_gpu_object_ref(struct virtio_gpu_object * bo)373 virtio_gpu_object_ref(struct virtio_gpu_object *bo)
374 {
375 ttm_bo_reference(&bo->tbo);
376 return bo;
377 }
378
virtio_gpu_object_unref(struct virtio_gpu_object ** bo)379 static inline void virtio_gpu_object_unref(struct virtio_gpu_object **bo)
380 {
381 struct ttm_buffer_object *tbo;
382
383 if ((*bo) == NULL)
384 return;
385 tbo = &((*bo)->tbo);
386 ttm_bo_unref(&tbo);
387 if (tbo == NULL)
388 *bo = NULL;
389 }
390
virtio_gpu_object_mmap_offset(struct virtio_gpu_object * bo)391 static inline u64 virtio_gpu_object_mmap_offset(struct virtio_gpu_object *bo)
392 {
393 return drm_vma_node_offset_addr(&bo->tbo.vma_node);
394 }
395
virtio_gpu_object_reserve(struct virtio_gpu_object * bo,bool no_wait)396 static inline int virtio_gpu_object_reserve(struct virtio_gpu_object *bo,
397 bool no_wait)
398 {
399 int r;
400
401 r = ttm_bo_reserve(&bo->tbo, true, no_wait, NULL);
402 if (unlikely(r != 0)) {
403 if (r != -ERESTARTSYS) {
404 struct virtio_gpu_device *qdev =
405 bo->gem_base.dev->dev_private;
406 dev_err(qdev->dev, "%p reserve failed\n", bo);
407 }
408 return r;
409 }
410 return 0;
411 }
412
virtio_gpu_object_unreserve(struct virtio_gpu_object * bo)413 static inline void virtio_gpu_object_unreserve(struct virtio_gpu_object *bo)
414 {
415 ttm_bo_unreserve(&bo->tbo);
416 }
417
418 /* virgl debufs */
419 int virtio_gpu_debugfs_init(struct drm_minor *minor);
420
421 #endif
422
