1 /*
2 * i.MX drm driver - LVDS display bridge
3 *
4 * Copyright (C) 2012 Sascha Hauer, Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16 #include <linux/module.h>
17 #include <linux/clk.h>
18 #include <linux/component.h>
19 #include <drm/drmP.h>
20 #include <drm/drm_atomic.h>
21 #include <drm/drm_atomic_helper.h>
22 #include <drm/drm_fb_helper.h>
23 #include <drm/drm_crtc_helper.h>
24 #include <drm/drm_of.h>
25 #include <drm/drm_panel.h>
26 #include <linux/mfd/syscon.h>
27 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
28 #include <linux/of_device.h>
29 #include <linux/of_graph.h>
30 #include <video/of_display_timing.h>
31 #include <video/of_videomode.h>
32 #include <linux/regmap.h>
33 #include <linux/videodev2.h>
34
35 #include "imx-drm.h"
36
37 #define DRIVER_NAME "imx-ldb"
38
39 #define LDB_CH0_MODE_EN_TO_DI0 (1 << 0)
40 #define LDB_CH0_MODE_EN_TO_DI1 (3 << 0)
41 #define LDB_CH0_MODE_EN_MASK (3 << 0)
42 #define LDB_CH1_MODE_EN_TO_DI0 (1 << 2)
43 #define LDB_CH1_MODE_EN_TO_DI1 (3 << 2)
44 #define LDB_CH1_MODE_EN_MASK (3 << 2)
45 #define LDB_SPLIT_MODE_EN (1 << 4)
46 #define LDB_DATA_WIDTH_CH0_24 (1 << 5)
47 #define LDB_BIT_MAP_CH0_JEIDA (1 << 6)
48 #define LDB_DATA_WIDTH_CH1_24 (1 << 7)
49 #define LDB_BIT_MAP_CH1_JEIDA (1 << 8)
50 #define LDB_DI0_VS_POL_ACT_LOW (1 << 9)
51 #define LDB_DI1_VS_POL_ACT_LOW (1 << 10)
52 #define LDB_BGREF_RMODE_INT (1 << 15)
53
54 struct imx_ldb;
55
56 struct imx_ldb_channel {
57 struct imx_ldb *ldb;
58 struct drm_connector connector;
59 struct drm_encoder encoder;
60
61 /* Defines what is connected to the ldb, only one at a time */
62 struct drm_panel *panel;
63 struct drm_bridge *bridge;
64
65 struct device_node *child;
66 struct i2c_adapter *ddc;
67 int chno;
68 void *edid;
69 int edid_len;
70 struct drm_display_mode mode;
71 int mode_valid;
72 u32 bus_format;
73 u32 bus_flags;
74 };
75
con_to_imx_ldb_ch(struct drm_connector * c)76 static inline struct imx_ldb_channel *con_to_imx_ldb_ch(struct drm_connector *c)
77 {
78 return container_of(c, struct imx_ldb_channel, connector);
79 }
80
enc_to_imx_ldb_ch(struct drm_encoder * e)81 static inline struct imx_ldb_channel *enc_to_imx_ldb_ch(struct drm_encoder *e)
82 {
83 return container_of(e, struct imx_ldb_channel, encoder);
84 }
85
86 struct bus_mux {
87 int reg;
88 int shift;
89 int mask;
90 };
91
92 struct imx_ldb {
93 struct regmap *regmap;
94 struct device *dev;
95 struct imx_ldb_channel channel[2];
96 struct clk *clk[2]; /* our own clock */
97 struct clk *clk_sel[4]; /* parent of display clock */
98 struct clk *clk_parent[4]; /* original parent of clk_sel */
99 struct clk *clk_pll[2]; /* upstream clock we can adjust */
100 u32 ldb_ctrl;
101 const struct bus_mux *lvds_mux;
102 };
103
imx_ldb_ch_set_bus_format(struct imx_ldb_channel * imx_ldb_ch,u32 bus_format)104 static void imx_ldb_ch_set_bus_format(struct imx_ldb_channel *imx_ldb_ch,
105 u32 bus_format)
106 {
107 struct imx_ldb *ldb = imx_ldb_ch->ldb;
108 int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
109
110 switch (bus_format) {
111 case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
112 break;
113 case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
114 if (imx_ldb_ch->chno == 0 || dual)
115 ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
116 if (imx_ldb_ch->chno == 1 || dual)
117 ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
118 break;
119 case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
120 if (imx_ldb_ch->chno == 0 || dual)
121 ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |
122 LDB_BIT_MAP_CH0_JEIDA;
123 if (imx_ldb_ch->chno == 1 || dual)
124 ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |
125 LDB_BIT_MAP_CH1_JEIDA;
126 break;
127 }
128 }
129
imx_ldb_connector_get_modes(struct drm_connector * connector)130 static int imx_ldb_connector_get_modes(struct drm_connector *connector)
131 {
132 struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
133 int num_modes = 0;
134
135 if (imx_ldb_ch->panel && imx_ldb_ch->panel->funcs &&
136 imx_ldb_ch->panel->funcs->get_modes) {
137 num_modes = imx_ldb_ch->panel->funcs->get_modes(imx_ldb_ch->panel);
138 if (num_modes > 0)
139 return num_modes;
140 }
141
142 if (!imx_ldb_ch->edid && imx_ldb_ch->ddc)
143 imx_ldb_ch->edid = drm_get_edid(connector, imx_ldb_ch->ddc);
144
145 if (imx_ldb_ch->edid) {
146 drm_connector_update_edid_property(connector,
147 imx_ldb_ch->edid);
148 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
149 }
150
151 if (imx_ldb_ch->mode_valid) {
152 struct drm_display_mode *mode;
153
154 mode = drm_mode_create(connector->dev);
155 if (!mode)
156 return -EINVAL;
157 drm_mode_copy(mode, &imx_ldb_ch->mode);
158 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
159 drm_mode_probed_add(connector, mode);
160 num_modes++;
161 }
162
163 return num_modes;
164 }
165
imx_ldb_connector_best_encoder(struct drm_connector * connector)166 static struct drm_encoder *imx_ldb_connector_best_encoder(
167 struct drm_connector *connector)
168 {
169 struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
170
171 return &imx_ldb_ch->encoder;
172 }
173
imx_ldb_set_clock(struct imx_ldb * ldb,int mux,int chno,unsigned long serial_clk,unsigned long di_clk)174 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
175 unsigned long serial_clk, unsigned long di_clk)
176 {
177 int ret;
178
179 dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
180 clk_get_rate(ldb->clk_pll[chno]), serial_clk);
181 clk_set_rate(ldb->clk_pll[chno], serial_clk);
182
183 dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
184 clk_get_rate(ldb->clk_pll[chno]));
185
186 dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
187 clk_get_rate(ldb->clk[chno]),
188 (long int)di_clk);
189 clk_set_rate(ldb->clk[chno], di_clk);
190
191 dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
192 clk_get_rate(ldb->clk[chno]));
193
194 /* set display clock mux to LDB input clock */
195 ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
196 if (ret)
197 dev_err(ldb->dev,
198 "unable to set di%d parent clock to ldb_di%d\n", mux,
199 chno);
200 }
201
imx_ldb_encoder_enable(struct drm_encoder * encoder)202 static void imx_ldb_encoder_enable(struct drm_encoder *encoder)
203 {
204 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
205 struct imx_ldb *ldb = imx_ldb_ch->ldb;
206 int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
207 int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
208
209 drm_panel_prepare(imx_ldb_ch->panel);
210
211 if (dual) {
212 clk_set_parent(ldb->clk_sel[mux], ldb->clk[0]);
213 clk_set_parent(ldb->clk_sel[mux], ldb->clk[1]);
214
215 clk_prepare_enable(ldb->clk[0]);
216 clk_prepare_enable(ldb->clk[1]);
217 } else {
218 clk_set_parent(ldb->clk_sel[mux], ldb->clk[imx_ldb_ch->chno]);
219 }
220
221 if (imx_ldb_ch == &ldb->channel[0] || dual) {
222 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
223 if (mux == 0 || ldb->lvds_mux)
224 ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
225 else if (mux == 1)
226 ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
227 }
228 if (imx_ldb_ch == &ldb->channel[1] || dual) {
229 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
230 if (mux == 1 || ldb->lvds_mux)
231 ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
232 else if (mux == 0)
233 ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
234 }
235
236 if (ldb->lvds_mux) {
237 const struct bus_mux *lvds_mux = NULL;
238
239 if (imx_ldb_ch == &ldb->channel[0])
240 lvds_mux = &ldb->lvds_mux[0];
241 else if (imx_ldb_ch == &ldb->channel[1])
242 lvds_mux = &ldb->lvds_mux[1];
243
244 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
245 mux << lvds_mux->shift);
246 }
247
248 regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
249
250 drm_panel_enable(imx_ldb_ch->panel);
251 }
252
253 static void
imx_ldb_encoder_atomic_mode_set(struct drm_encoder * encoder,struct drm_crtc_state * crtc_state,struct drm_connector_state * connector_state)254 imx_ldb_encoder_atomic_mode_set(struct drm_encoder *encoder,
255 struct drm_crtc_state *crtc_state,
256 struct drm_connector_state *connector_state)
257 {
258 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
259 struct drm_display_mode *mode = &crtc_state->adjusted_mode;
260 struct imx_ldb *ldb = imx_ldb_ch->ldb;
261 int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
262 unsigned long serial_clk;
263 unsigned long di_clk = mode->clock * 1000;
264 int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
265 u32 bus_format = imx_ldb_ch->bus_format;
266
267 if (mode->clock > 170000) {
268 dev_warn(ldb->dev,
269 "%s: mode exceeds 170 MHz pixel clock\n", __func__);
270 }
271 if (mode->clock > 85000 && !dual) {
272 dev_warn(ldb->dev,
273 "%s: mode exceeds 85 MHz pixel clock\n", __func__);
274 }
275
276 if (dual) {
277 serial_clk = 3500UL * mode->clock;
278 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
279 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
280 } else {
281 serial_clk = 7000UL * mode->clock;
282 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
283 di_clk);
284 }
285
286 /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
287 if (imx_ldb_ch == &ldb->channel[0] || dual) {
288 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
289 ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
290 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
291 ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
292 }
293 if (imx_ldb_ch == &ldb->channel[1] || dual) {
294 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
295 ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
296 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
297 ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
298 }
299
300 if (!bus_format) {
301 struct drm_connector *connector = connector_state->connector;
302 struct drm_display_info *di = &connector->display_info;
303
304 if (di->num_bus_formats)
305 bus_format = di->bus_formats[0];
306 }
307 imx_ldb_ch_set_bus_format(imx_ldb_ch, bus_format);
308 }
309
imx_ldb_encoder_disable(struct drm_encoder * encoder)310 static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
311 {
312 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
313 struct imx_ldb *ldb = imx_ldb_ch->ldb;
314 int mux, ret;
315
316 drm_panel_disable(imx_ldb_ch->panel);
317
318 if (imx_ldb_ch == &ldb->channel[0])
319 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
320 else if (imx_ldb_ch == &ldb->channel[1])
321 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
322
323 regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
324
325 if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
326 clk_disable_unprepare(ldb->clk[0]);
327 clk_disable_unprepare(ldb->clk[1]);
328 }
329
330 if (ldb->lvds_mux) {
331 const struct bus_mux *lvds_mux = NULL;
332
333 if (imx_ldb_ch == &ldb->channel[0])
334 lvds_mux = &ldb->lvds_mux[0];
335 else if (imx_ldb_ch == &ldb->channel[1])
336 lvds_mux = &ldb->lvds_mux[1];
337
338 regmap_read(ldb->regmap, lvds_mux->reg, &mux);
339 mux &= lvds_mux->mask;
340 mux >>= lvds_mux->shift;
341 } else {
342 mux = (imx_ldb_ch == &ldb->channel[0]) ? 0 : 1;
343 }
344
345 /* set display clock mux back to original input clock */
346 ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);
347 if (ret)
348 dev_err(ldb->dev,
349 "unable to set di%d parent clock to original parent\n",
350 mux);
351
352 drm_panel_unprepare(imx_ldb_ch->panel);
353 }
354
imx_ldb_encoder_atomic_check(struct drm_encoder * encoder,struct drm_crtc_state * crtc_state,struct drm_connector_state * conn_state)355 static int imx_ldb_encoder_atomic_check(struct drm_encoder *encoder,
356 struct drm_crtc_state *crtc_state,
357 struct drm_connector_state *conn_state)
358 {
359 struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc_state);
360 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
361 struct drm_display_info *di = &conn_state->connector->display_info;
362 u32 bus_format = imx_ldb_ch->bus_format;
363
364 /* Bus format description in DT overrides connector display info. */
365 if (!bus_format && di->num_bus_formats) {
366 bus_format = di->bus_formats[0];
367 imx_crtc_state->bus_flags = di->bus_flags;
368 } else {
369 bus_format = imx_ldb_ch->bus_format;
370 imx_crtc_state->bus_flags = imx_ldb_ch->bus_flags;
371 }
372 switch (bus_format) {
373 case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
374 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB666_1X18;
375 break;
376 case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
377 case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
378 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
379 break;
380 default:
381 return -EINVAL;
382 }
383
384 imx_crtc_state->di_hsync_pin = 2;
385 imx_crtc_state->di_vsync_pin = 3;
386
387 return 0;
388 }
389
390
391 static const struct drm_connector_funcs imx_ldb_connector_funcs = {
392 .fill_modes = drm_helper_probe_single_connector_modes,
393 .destroy = imx_drm_connector_destroy,
394 .reset = drm_atomic_helper_connector_reset,
395 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
396 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
397 };
398
399 static const struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
400 .get_modes = imx_ldb_connector_get_modes,
401 .best_encoder = imx_ldb_connector_best_encoder,
402 };
403
404 static const struct drm_encoder_funcs imx_ldb_encoder_funcs = {
405 .destroy = imx_drm_encoder_destroy,
406 };
407
408 static const struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
409 .atomic_mode_set = imx_ldb_encoder_atomic_mode_set,
410 .enable = imx_ldb_encoder_enable,
411 .disable = imx_ldb_encoder_disable,
412 .atomic_check = imx_ldb_encoder_atomic_check,
413 };
414
imx_ldb_get_clk(struct imx_ldb * ldb,int chno)415 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
416 {
417 char clkname[16];
418
419 snprintf(clkname, sizeof(clkname), "di%d", chno);
420 ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
421 if (IS_ERR(ldb->clk[chno]))
422 return PTR_ERR(ldb->clk[chno]);
423
424 snprintf(clkname, sizeof(clkname), "di%d_pll", chno);
425 ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
426
427 return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
428 }
429
imx_ldb_register(struct drm_device * drm,struct imx_ldb_channel * imx_ldb_ch)430 static int imx_ldb_register(struct drm_device *drm,
431 struct imx_ldb_channel *imx_ldb_ch)
432 {
433 struct imx_ldb *ldb = imx_ldb_ch->ldb;
434 struct drm_encoder *encoder = &imx_ldb_ch->encoder;
435 int ret;
436
437 ret = imx_drm_encoder_parse_of(drm, encoder, imx_ldb_ch->child);
438 if (ret)
439 return ret;
440
441 ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
442 if (ret)
443 return ret;
444
445 if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
446 ret = imx_ldb_get_clk(ldb, 1);
447 if (ret)
448 return ret;
449 }
450
451 drm_encoder_helper_add(encoder, &imx_ldb_encoder_helper_funcs);
452 drm_encoder_init(drm, encoder, &imx_ldb_encoder_funcs,
453 DRM_MODE_ENCODER_LVDS, NULL);
454
455 if (imx_ldb_ch->bridge) {
456 ret = drm_bridge_attach(&imx_ldb_ch->encoder,
457 imx_ldb_ch->bridge, NULL);
458 if (ret) {
459 DRM_ERROR("Failed to initialize bridge with drm\n");
460 return ret;
461 }
462 } else {
463 /*
464 * We want to add the connector whenever there is no bridge
465 * that brings its own, not only when there is a panel. For
466 * historical reasons, the ldb driver can also work without
467 * a panel.
468 */
469 drm_connector_helper_add(&imx_ldb_ch->connector,
470 &imx_ldb_connector_helper_funcs);
471 drm_connector_init(drm, &imx_ldb_ch->connector,
472 &imx_ldb_connector_funcs,
473 DRM_MODE_CONNECTOR_LVDS);
474 drm_connector_attach_encoder(&imx_ldb_ch->connector, encoder);
475 }
476
477 if (imx_ldb_ch->panel) {
478 ret = drm_panel_attach(imx_ldb_ch->panel,
479 &imx_ldb_ch->connector);
480 if (ret)
481 return ret;
482 }
483
484 return 0;
485 }
486
487 enum {
488 LVDS_BIT_MAP_SPWG,
489 LVDS_BIT_MAP_JEIDA
490 };
491
492 struct imx_ldb_bit_mapping {
493 u32 bus_format;
494 u32 datawidth;
495 const char * const mapping;
496 };
497
498 static const struct imx_ldb_bit_mapping imx_ldb_bit_mappings[] = {
499 { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG, 18, "spwg" },
500 { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, 24, "spwg" },
501 { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, 24, "jeida" },
502 };
503
of_get_bus_format(struct device * dev,struct device_node * np)504 static u32 of_get_bus_format(struct device *dev, struct device_node *np)
505 {
506 const char *bm;
507 u32 datawidth = 0;
508 int ret, i;
509
510 ret = of_property_read_string(np, "fsl,data-mapping", &bm);
511 if (ret < 0)
512 return ret;
513
514 of_property_read_u32(np, "fsl,data-width", &datawidth);
515
516 for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++) {
517 if (!strcasecmp(bm, imx_ldb_bit_mappings[i].mapping) &&
518 datawidth == imx_ldb_bit_mappings[i].datawidth)
519 return imx_ldb_bit_mappings[i].bus_format;
520 }
521
522 dev_err(dev, "invalid data mapping: %d-bit \"%s\"\n", datawidth, bm);
523
524 return -ENOENT;
525 }
526
527 static struct bus_mux imx6q_lvds_mux[2] = {
528 {
529 .reg = IOMUXC_GPR3,
530 .shift = 6,
531 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
532 }, {
533 .reg = IOMUXC_GPR3,
534 .shift = 8,
535 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
536 }
537 };
538
539 /*
540 * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
541 * of_match_device will walk through this list and take the first entry
542 * matching any of its compatible values. Therefore, the more generic
543 * entries (in this case fsl,imx53-ldb) need to be ordered last.
544 */
545 static const struct of_device_id imx_ldb_dt_ids[] = {
546 { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
547 { .compatible = "fsl,imx53-ldb", .data = NULL, },
548 { }
549 };
550 MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
551
imx_ldb_panel_ddc(struct device * dev,struct imx_ldb_channel * channel,struct device_node * child)552 static int imx_ldb_panel_ddc(struct device *dev,
553 struct imx_ldb_channel *channel, struct device_node *child)
554 {
555 struct device_node *ddc_node;
556 const u8 *edidp;
557 int ret;
558
559 ddc_node = of_parse_phandle(child, "ddc-i2c-bus", 0);
560 if (ddc_node) {
561 channel->ddc = of_find_i2c_adapter_by_node(ddc_node);
562 of_node_put(ddc_node);
563 if (!channel->ddc) {
564 dev_warn(dev, "failed to get ddc i2c adapter\n");
565 return -EPROBE_DEFER;
566 }
567 }
568
569 if (!channel->ddc) {
570 /* if no DDC available, fallback to hardcoded EDID */
571 dev_dbg(dev, "no ddc available\n");
572
573 edidp = of_get_property(child, "edid",
574 &channel->edid_len);
575 if (edidp) {
576 channel->edid = kmemdup(edidp,
577 channel->edid_len,
578 GFP_KERNEL);
579 } else if (!channel->panel) {
580 /* fallback to display-timings node */
581 ret = of_get_drm_display_mode(child,
582 &channel->mode,
583 &channel->bus_flags,
584 OF_USE_NATIVE_MODE);
585 if (!ret)
586 channel->mode_valid = 1;
587 }
588 }
589 return 0;
590 }
591
imx_ldb_bind(struct device * dev,struct device * master,void * data)592 static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
593 {
594 struct drm_device *drm = data;
595 struct device_node *np = dev->of_node;
596 const struct of_device_id *of_id =
597 of_match_device(imx_ldb_dt_ids, dev);
598 struct device_node *child;
599 struct imx_ldb *imx_ldb;
600 int dual;
601 int ret;
602 int i;
603
604 imx_ldb = devm_kzalloc(dev, sizeof(*imx_ldb), GFP_KERNEL);
605 if (!imx_ldb)
606 return -ENOMEM;
607
608 imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
609 if (IS_ERR(imx_ldb->regmap)) {
610 dev_err(dev, "failed to get parent regmap\n");
611 return PTR_ERR(imx_ldb->regmap);
612 }
613
614 /* disable LDB by resetting the control register to POR default */
615 regmap_write(imx_ldb->regmap, IOMUXC_GPR2, 0);
616
617 imx_ldb->dev = dev;
618
619 if (of_id)
620 imx_ldb->lvds_mux = of_id->data;
621
622 dual = of_property_read_bool(np, "fsl,dual-channel");
623 if (dual)
624 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
625
626 /*
627 * There are three different possible clock mux configurations:
628 * i.MX53: ipu1_di0_sel, ipu1_di1_sel
629 * i.MX6q: ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
630 * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
631 * Map them all to di0_sel...di3_sel.
632 */
633 for (i = 0; i < 4; i++) {
634 char clkname[16];
635
636 sprintf(clkname, "di%d_sel", i);
637 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
638 if (IS_ERR(imx_ldb->clk_sel[i])) {
639 ret = PTR_ERR(imx_ldb->clk_sel[i]);
640 imx_ldb->clk_sel[i] = NULL;
641 break;
642 }
643
644 imx_ldb->clk_parent[i] = clk_get_parent(imx_ldb->clk_sel[i]);
645 }
646 if (i == 0)
647 return ret;
648
649 for_each_child_of_node(np, child) {
650 struct imx_ldb_channel *channel;
651 int bus_format;
652
653 ret = of_property_read_u32(child, "reg", &i);
654 if (ret || i < 0 || i > 1)
655 return -EINVAL;
656
657 if (!of_device_is_available(child))
658 continue;
659
660 if (dual && i > 0) {
661 dev_warn(dev, "dual-channel mode, ignoring second output\n");
662 continue;
663 }
664
665 channel = &imx_ldb->channel[i];
666 channel->ldb = imx_ldb;
667 channel->chno = i;
668 channel->child = child;
669
670 /*
671 * The output port is port@4 with an external 4-port mux or
672 * port@2 with the internal 2-port mux.
673 */
674 ret = drm_of_find_panel_or_bridge(child,
675 imx_ldb->lvds_mux ? 4 : 2, 0,
676 &channel->panel, &channel->bridge);
677 if (ret && ret != -ENODEV)
678 return ret;
679
680 /* panel ddc only if there is no bridge */
681 if (!channel->bridge) {
682 ret = imx_ldb_panel_ddc(dev, channel, child);
683 if (ret)
684 return ret;
685 }
686
687 bus_format = of_get_bus_format(dev, child);
688 if (bus_format == -EINVAL) {
689 /*
690 * If no bus format was specified in the device tree,
691 * we can still get it from the connected panel later.
692 */
693 if (channel->panel && channel->panel->funcs &&
694 channel->panel->funcs->get_modes)
695 bus_format = 0;
696 }
697 if (bus_format < 0) {
698 dev_err(dev, "could not determine data mapping: %d\n",
699 bus_format);
700 return bus_format;
701 }
702 channel->bus_format = bus_format;
703
704 ret = imx_ldb_register(drm, channel);
705 if (ret)
706 return ret;
707 }
708
709 dev_set_drvdata(dev, imx_ldb);
710
711 return 0;
712 }
713
imx_ldb_unbind(struct device * dev,struct device * master,void * data)714 static void imx_ldb_unbind(struct device *dev, struct device *master,
715 void *data)
716 {
717 struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
718 int i;
719
720 for (i = 0; i < 2; i++) {
721 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
722
723 if (channel->panel)
724 drm_panel_detach(channel->panel);
725
726 kfree(channel->edid);
727 i2c_put_adapter(channel->ddc);
728 }
729 }
730
731 static const struct component_ops imx_ldb_ops = {
732 .bind = imx_ldb_bind,
733 .unbind = imx_ldb_unbind,
734 };
735
imx_ldb_probe(struct platform_device * pdev)736 static int imx_ldb_probe(struct platform_device *pdev)
737 {
738 return component_add(&pdev->dev, &imx_ldb_ops);
739 }
740
imx_ldb_remove(struct platform_device * pdev)741 static int imx_ldb_remove(struct platform_device *pdev)
742 {
743 component_del(&pdev->dev, &imx_ldb_ops);
744 return 0;
745 }
746
747 static struct platform_driver imx_ldb_driver = {
748 .probe = imx_ldb_probe,
749 .remove = imx_ldb_remove,
750 .driver = {
751 .of_match_table = imx_ldb_dt_ids,
752 .name = DRIVER_NAME,
753 },
754 };
755
756 module_platform_driver(imx_ldb_driver);
757
758 MODULE_DESCRIPTION("i.MX LVDS driver");
759 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
760 MODULE_LICENSE("GPL");
761 MODULE_ALIAS("platform:" DRIVER_NAME);
762
