1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DAL_ENGINE_H__ 27 #define __DAL_ENGINE_H__ 28 29 #include "dc_ddc_types.h" 30 31 enum i2caux_transaction_operation { 32 I2CAUX_TRANSACTION_READ, 33 I2CAUX_TRANSACTION_WRITE 34 }; 35 36 enum i2caux_transaction_address_space { 37 I2CAUX_TRANSACTION_ADDRESS_SPACE_I2C = 1, 38 I2CAUX_TRANSACTION_ADDRESS_SPACE_DPCD 39 }; 40 41 struct i2caux_transaction_payload { 42 enum i2caux_transaction_address_space address_space; 43 uint32_t address; 44 uint32_t length; 45 uint8_t *data; 46 }; 47 48 enum i2caux_transaction_status { 49 I2CAUX_TRANSACTION_STATUS_UNKNOWN = (-1L), 50 I2CAUX_TRANSACTION_STATUS_SUCCEEDED, 51 I2CAUX_TRANSACTION_STATUS_FAILED_CHANNEL_BUSY, 52 I2CAUX_TRANSACTION_STATUS_FAILED_TIMEOUT, 53 I2CAUX_TRANSACTION_STATUS_FAILED_PROTOCOL_ERROR, 54 I2CAUX_TRANSACTION_STATUS_FAILED_NACK, 55 I2CAUX_TRANSACTION_STATUS_FAILED_INCOMPLETE, 56 I2CAUX_TRANSACTION_STATUS_FAILED_OPERATION, 57 I2CAUX_TRANSACTION_STATUS_FAILED_INVALID_OPERATION, 58 I2CAUX_TRANSACTION_STATUS_FAILED_BUFFER_OVERFLOW, 59 I2CAUX_TRANSACTION_STATUS_FAILED_HPD_DISCON 60 }; 61 62 struct i2caux_transaction_request { 63 enum i2caux_transaction_operation operation; 64 struct i2caux_transaction_payload payload; 65 enum i2caux_transaction_status status; 66 }; 67 68 enum i2caux_engine_type { 69 I2CAUX_ENGINE_TYPE_UNKNOWN = (-1L), 70 I2CAUX_ENGINE_TYPE_AUX, 71 I2CAUX_ENGINE_TYPE_I2C_DDC_HW, 72 I2CAUX_ENGINE_TYPE_I2C_GENERIC_HW, 73 I2CAUX_ENGINE_TYPE_I2C_SW 74 }; 75 76 enum i2c_default_speed { 77 I2CAUX_DEFAULT_I2C_HW_SPEED = 50, 78 I2CAUX_DEFAULT_I2C_SW_SPEED = 50 79 }; 80 81 struct engine; 82 83 struct engine_funcs { 84 enum i2caux_engine_type (*get_engine_type)( 85 const struct engine *engine); 86 bool (*acquire)( 87 struct engine *engine, 88 struct ddc *ddc); 89 bool (*submit_request)( 90 struct engine *engine, 91 struct i2caux_transaction_request *request, 92 bool middle_of_transaction); 93 void (*release_engine)( 94 struct engine *engine); 95 }; 96 97 struct engine { 98 const struct engine_funcs *funcs; 99 uint32_t inst; 100 struct ddc *ddc; 101 struct dc_context *ctx; 102 }; 103 104 void dal_i2caux_construct_engine( 105 struct engine *engine, 106 struct dc_context *ctx); 107 108 void dal_i2caux_destruct_engine( 109 struct engine *engine); 110 111 #endif 112
