1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_SPECCTRL_H_
3 #define _ASM_X86_SPECCTRL_H_
4
5 #include <linux/thread_info.h>
6 #include <asm/nospec-branch.h>
7
8 /*
9 * On VMENTER we must preserve whatever view of the SPEC_CTRL MSR
10 * the guest has, while on VMEXIT we restore the host view. This
11 * would be easier if SPEC_CTRL were architecturally maskable or
12 * shadowable for guests but this is not (currently) the case.
13 * Takes the guest view of SPEC_CTRL MSR as a parameter and also
14 * the guest's version of VIRT_SPEC_CTRL, if emulated.
15 */
16 extern void x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool guest);
17
18 /**
19 * x86_spec_ctrl_set_guest - Set speculation control registers for the guest
20 * @guest_spec_ctrl: The guest content of MSR_SPEC_CTRL
21 * @guest_virt_spec_ctrl: The guest controlled bits of MSR_VIRT_SPEC_CTRL
22 * (may get translated to MSR_AMD64_LS_CFG bits)
23 *
24 * Avoids writing to the MSR if the content/bits are the same
25 */
26 static inline
x86_spec_ctrl_set_guest(u64 guest_spec_ctrl,u64 guest_virt_spec_ctrl)27 void x86_spec_ctrl_set_guest(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl)
28 {
29 x86_virt_spec_ctrl(guest_spec_ctrl, guest_virt_spec_ctrl, true);
30 }
31
32 /**
33 * x86_spec_ctrl_restore_host - Restore host speculation control registers
34 * @guest_spec_ctrl: The guest content of MSR_SPEC_CTRL
35 * @guest_virt_spec_ctrl: The guest controlled bits of MSR_VIRT_SPEC_CTRL
36 * (may get translated to MSR_AMD64_LS_CFG bits)
37 *
38 * Avoids writing to the MSR if the content/bits are the same
39 */
40 static inline
x86_spec_ctrl_restore_host(u64 guest_spec_ctrl,u64 guest_virt_spec_ctrl)41 void x86_spec_ctrl_restore_host(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl)
42 {
43 x86_virt_spec_ctrl(guest_spec_ctrl, guest_virt_spec_ctrl, false);
44 }
45
46 /* AMD specific Speculative Store Bypass MSR data */
47 extern u64 x86_amd_ls_cfg_base;
48 extern u64 x86_amd_ls_cfg_ssbd_mask;
49
ssbd_tif_to_spec_ctrl(u64 tifn)50 static inline u64 ssbd_tif_to_spec_ctrl(u64 tifn)
51 {
52 BUILD_BUG_ON(TIF_SSBD < SPEC_CTRL_SSBD_SHIFT);
53 return (tifn & _TIF_SSBD) >> (TIF_SSBD - SPEC_CTRL_SSBD_SHIFT);
54 }
55
ssbd_spec_ctrl_to_tif(u64 spec_ctrl)56 static inline unsigned long ssbd_spec_ctrl_to_tif(u64 spec_ctrl)
57 {
58 BUILD_BUG_ON(TIF_SSBD < SPEC_CTRL_SSBD_SHIFT);
59 return (spec_ctrl & SPEC_CTRL_SSBD) << (TIF_SSBD - SPEC_CTRL_SSBD_SHIFT);
60 }
61
ssbd_tif_to_amd_ls_cfg(u64 tifn)62 static inline u64 ssbd_tif_to_amd_ls_cfg(u64 tifn)
63 {
64 return (tifn & _TIF_SSBD) ? x86_amd_ls_cfg_ssbd_mask : 0ULL;
65 }
66
67 #ifdef CONFIG_SMP
68 extern void speculative_store_bypass_ht_init(void);
69 #else
speculative_store_bypass_ht_init(void)70 static inline void speculative_store_bypass_ht_init(void) { }
71 #endif
72
73 extern void speculative_store_bypass_update(unsigned long tif);
74
speculative_store_bypass_update_current(void)75 static inline void speculative_store_bypass_update_current(void)
76 {
77 speculative_store_bypass_update(current_thread_info()->flags);
78 }
79
80 #endif
81
