1 // SPDX-License-Identifier: GPL-2.0
2 /* smp.c: Sparc SMP support.
3 *
4 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
6 * Copyright (C) 2004 Keith M Wesolowski (wesolows@foobazco.org)
7 */
8
9 #include <asm/head.h>
10
11 #include <linux/kernel.h>
12 #include <linux/sched.h>
13 #include <linux/threads.h>
14 #include <linux/smp.h>
15 #include <linux/interrupt.h>
16 #include <linux/kernel_stat.h>
17 #include <linux/init.h>
18 #include <linux/spinlock.h>
19 #include <linux/mm.h>
20 #include <linux/fs.h>
21 #include <linux/seq_file.h>
22 #include <linux/cache.h>
23 #include <linux/delay.h>
24 #include <linux/profile.h>
25 #include <linux/cpu.h>
26
27 #include <asm/ptrace.h>
28 #include <linux/atomic.h>
29
30 #include <asm/irq.h>
31 #include <asm/page.h>
32 #include <asm/pgalloc.h>
33 #include <asm/pgtable.h>
34 #include <asm/oplib.h>
35 #include <asm/cacheflush.h>
36 #include <asm/tlbflush.h>
37 #include <asm/cpudata.h>
38 #include <asm/timer.h>
39 #include <asm/leon.h>
40
41 #include "kernel.h"
42 #include "irq.h"
43
44 volatile unsigned long cpu_callin_map[NR_CPUS] = {0,};
45
46 cpumask_t smp_commenced_mask = CPU_MASK_NONE;
47
48 const struct sparc32_ipi_ops *sparc32_ipi_ops;
49
50 /* The only guaranteed locking primitive available on all Sparc
51 * processors is 'ldstub [%reg + immediate], %dest_reg' which atomically
52 * places the current byte at the effective address into dest_reg and
53 * places 0xff there afterwards. Pretty lame locking primitive
54 * compared to the Alpha and the Intel no? Most Sparcs have 'swap'
55 * instruction which is much better...
56 */
57
smp_store_cpu_info(int id)58 void smp_store_cpu_info(int id)
59 {
60 int cpu_node;
61 int mid;
62
63 cpu_data(id).udelay_val = loops_per_jiffy;
64
65 cpu_find_by_mid(id, &cpu_node);
66 cpu_data(id).clock_tick = prom_getintdefault(cpu_node,
67 "clock-frequency", 0);
68 cpu_data(id).prom_node = cpu_node;
69 mid = cpu_get_hwmid(cpu_node);
70
71 if (mid < 0) {
72 printk(KERN_NOTICE "No MID found for CPU%d at node 0x%08x", id, cpu_node);
73 mid = 0;
74 }
75 cpu_data(id).mid = mid;
76 }
77
smp_cpus_done(unsigned int max_cpus)78 void __init smp_cpus_done(unsigned int max_cpus)
79 {
80 unsigned long bogosum = 0;
81 int cpu, num = 0;
82
83 for_each_online_cpu(cpu) {
84 num++;
85 bogosum += cpu_data(cpu).udelay_val;
86 }
87
88 printk("Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
89 num, bogosum/(500000/HZ),
90 (bogosum/(5000/HZ))%100);
91
92 switch(sparc_cpu_model) {
93 case sun4m:
94 smp4m_smp_done();
95 break;
96 case sun4d:
97 smp4d_smp_done();
98 break;
99 case sparc_leon:
100 leon_smp_done();
101 break;
102 case sun4e:
103 printk("SUN4E\n");
104 BUG();
105 break;
106 case sun4u:
107 printk("SUN4U\n");
108 BUG();
109 break;
110 default:
111 printk("UNKNOWN!\n");
112 BUG();
113 break;
114 }
115 }
116
cpu_panic(void)117 void cpu_panic(void)
118 {
119 printk("CPU[%d]: Returns from cpu_idle!\n", smp_processor_id());
120 panic("SMP bolixed\n");
121 }
122
123 struct linux_prom_registers smp_penguin_ctable = { 0 };
124
smp_send_reschedule(int cpu)125 void smp_send_reschedule(int cpu)
126 {
127 /*
128 * CPU model dependent way of implementing IPI generation targeting
129 * a single CPU. The trap handler needs only to do trap entry/return
130 * to call schedule.
131 */
132 sparc32_ipi_ops->resched(cpu);
133 }
134
smp_send_stop(void)135 void smp_send_stop(void)
136 {
137 }
138
arch_send_call_function_single_ipi(int cpu)139 void arch_send_call_function_single_ipi(int cpu)
140 {
141 /* trigger one IPI single call on one CPU */
142 sparc32_ipi_ops->single(cpu);
143 }
144
arch_send_call_function_ipi_mask(const struct cpumask * mask)145 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
146 {
147 int cpu;
148
149 /* trigger IPI mask call on each CPU */
150 for_each_cpu(cpu, mask)
151 sparc32_ipi_ops->mask_one(cpu);
152 }
153
smp_resched_interrupt(void)154 void smp_resched_interrupt(void)
155 {
156 irq_enter();
157 scheduler_ipi();
158 local_cpu_data().irq_resched_count++;
159 irq_exit();
160 /* re-schedule routine called by interrupt return code. */
161 }
162
smp_call_function_single_interrupt(void)163 void smp_call_function_single_interrupt(void)
164 {
165 irq_enter();
166 generic_smp_call_function_single_interrupt();
167 local_cpu_data().irq_call_count++;
168 irq_exit();
169 }
170
smp_call_function_interrupt(void)171 void smp_call_function_interrupt(void)
172 {
173 irq_enter();
174 generic_smp_call_function_interrupt();
175 local_cpu_data().irq_call_count++;
176 irq_exit();
177 }
178
setup_profiling_timer(unsigned int multiplier)179 int setup_profiling_timer(unsigned int multiplier)
180 {
181 return -EINVAL;
182 }
183
smp_prepare_cpus(unsigned int max_cpus)184 void __init smp_prepare_cpus(unsigned int max_cpus)
185 {
186 int i, cpuid, extra;
187
188 printk("Entering SMP Mode...\n");
189
190 extra = 0;
191 for (i = 0; !cpu_find_by_instance(i, NULL, &cpuid); i++) {
192 if (cpuid >= NR_CPUS)
193 extra++;
194 }
195 /* i = number of cpus */
196 if (extra && max_cpus > i - extra)
197 printk("Warning: NR_CPUS is too low to start all cpus\n");
198
199 smp_store_cpu_info(boot_cpu_id);
200
201 switch(sparc_cpu_model) {
202 case sun4m:
203 smp4m_boot_cpus();
204 break;
205 case sun4d:
206 smp4d_boot_cpus();
207 break;
208 case sparc_leon:
209 leon_boot_cpus();
210 break;
211 case sun4e:
212 printk("SUN4E\n");
213 BUG();
214 break;
215 case sun4u:
216 printk("SUN4U\n");
217 BUG();
218 break;
219 default:
220 printk("UNKNOWN!\n");
221 BUG();
222 break;
223 }
224 }
225
226 /* Set this up early so that things like the scheduler can init
227 * properly. We use the same cpu mask for both the present and
228 * possible cpu map.
229 */
smp_setup_cpu_possible_map(void)230 void __init smp_setup_cpu_possible_map(void)
231 {
232 int instance, mid;
233
234 instance = 0;
235 while (!cpu_find_by_instance(instance, NULL, &mid)) {
236 if (mid < NR_CPUS) {
237 set_cpu_possible(mid, true);
238 set_cpu_present(mid, true);
239 }
240 instance++;
241 }
242 }
243
smp_prepare_boot_cpu(void)244 void __init smp_prepare_boot_cpu(void)
245 {
246 int cpuid = hard_smp_processor_id();
247
248 if (cpuid >= NR_CPUS) {
249 prom_printf("Serious problem, boot cpu id >= NR_CPUS\n");
250 prom_halt();
251 }
252 if (cpuid != 0)
253 printk("boot cpu id != 0, this could work but is untested\n");
254
255 current_thread_info()->cpu = cpuid;
256 set_cpu_online(cpuid, true);
257 set_cpu_possible(cpuid, true);
258 }
259
__cpu_up(unsigned int cpu,struct task_struct * tidle)260 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
261 {
262 int ret=0;
263
264 switch(sparc_cpu_model) {
265 case sun4m:
266 ret = smp4m_boot_one_cpu(cpu, tidle);
267 break;
268 case sun4d:
269 ret = smp4d_boot_one_cpu(cpu, tidle);
270 break;
271 case sparc_leon:
272 ret = leon_boot_one_cpu(cpu, tidle);
273 break;
274 case sun4e:
275 printk("SUN4E\n");
276 BUG();
277 break;
278 case sun4u:
279 printk("SUN4U\n");
280 BUG();
281 break;
282 default:
283 printk("UNKNOWN!\n");
284 BUG();
285 break;
286 }
287
288 if (!ret) {
289 cpumask_set_cpu(cpu, &smp_commenced_mask);
290 while (!cpu_online(cpu))
291 mb();
292 }
293 return ret;
294 }
295
arch_cpu_pre_starting(void * arg)296 static void arch_cpu_pre_starting(void *arg)
297 {
298 local_ops->cache_all();
299 local_ops->tlb_all();
300
301 switch(sparc_cpu_model) {
302 case sun4m:
303 sun4m_cpu_pre_starting(arg);
304 break;
305 case sun4d:
306 sun4d_cpu_pre_starting(arg);
307 break;
308 case sparc_leon:
309 leon_cpu_pre_starting(arg);
310 break;
311 default:
312 BUG();
313 }
314 }
315
arch_cpu_pre_online(void * arg)316 static void arch_cpu_pre_online(void *arg)
317 {
318 unsigned int cpuid = hard_smp_processor_id();
319
320 register_percpu_ce(cpuid);
321
322 calibrate_delay();
323 smp_store_cpu_info(cpuid);
324
325 local_ops->cache_all();
326 local_ops->tlb_all();
327
328 switch(sparc_cpu_model) {
329 case sun4m:
330 sun4m_cpu_pre_online(arg);
331 break;
332 case sun4d:
333 sun4d_cpu_pre_online(arg);
334 break;
335 case sparc_leon:
336 leon_cpu_pre_online(arg);
337 break;
338 default:
339 BUG();
340 }
341 }
342
sparc_start_secondary(void * arg)343 static void sparc_start_secondary(void *arg)
344 {
345 unsigned int cpu;
346
347 /*
348 * SMP booting is extremely fragile in some architectures. So run
349 * the cpu initialization code first before anything else.
350 */
351 arch_cpu_pre_starting(arg);
352
353 preempt_disable();
354 cpu = smp_processor_id();
355
356 notify_cpu_starting(cpu);
357 arch_cpu_pre_online(arg);
358
359 /* Set the CPU in the cpu_online_mask */
360 set_cpu_online(cpu, true);
361
362 /* Enable local interrupts now */
363 local_irq_enable();
364
365 wmb();
366 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
367
368 /* We should never reach here! */
369 BUG();
370 }
371
smp_callin(void)372 void smp_callin(void)
373 {
374 sparc_start_secondary(NULL);
375 }
376
smp_bogo(struct seq_file * m)377 void smp_bogo(struct seq_file *m)
378 {
379 int i;
380
381 for_each_online_cpu(i) {
382 seq_printf(m,
383 "Cpu%dBogo\t: %lu.%02lu\n",
384 i,
385 cpu_data(i).udelay_val/(500000/HZ),
386 (cpu_data(i).udelay_val/(5000/HZ))%100);
387 }
388 }
389
smp_info(struct seq_file * m)390 void smp_info(struct seq_file *m)
391 {
392 int i;
393
394 seq_printf(m, "State:\n");
395 for_each_online_cpu(i)
396 seq_printf(m, "CPU%d\t\t: online\n", i);
397 }
398
