1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  *  S390 version
4  *
5  *  Derived from "include/asm-i386/mmu_context.h"
6  */
7 
8 #ifndef __S390_MMU_CONTEXT_H
9 #define __S390_MMU_CONTEXT_H
10 
11 #include <asm/pgalloc.h>
12 #include <linux/uaccess.h>
13 #include <linux/mm_types.h>
14 #include <asm/tlbflush.h>
15 #include <asm/ctl_reg.h>
16 #include <asm-generic/mm_hooks.h>
17 
init_new_context(struct task_struct * tsk,struct mm_struct * mm)18 static inline int init_new_context(struct task_struct *tsk,
19 				   struct mm_struct *mm)
20 {
21 	spin_lock_init(&mm->context.lock);
22 	INIT_LIST_HEAD(&mm->context.pgtable_list);
23 	INIT_LIST_HEAD(&mm->context.gmap_list);
24 	cpumask_clear(&mm->context.cpu_attach_mask);
25 	atomic_set(&mm->context.flush_count, 0);
26 	mm->context.gmap_asce = 0;
27 	mm->context.flush_mm = 0;
28 #ifdef CONFIG_PGSTE
29 	mm->context.alloc_pgste = page_table_allocate_pgste ||
30 		test_thread_flag(TIF_PGSTE) ||
31 		(current->mm && current->mm->context.alloc_pgste);
32 	mm->context.has_pgste = 0;
33 	mm->context.uses_skeys = 0;
34 	mm->context.uses_cmm = 0;
35 	mm->context.allow_gmap_hpage_1m = 0;
36 #endif
37 	switch (mm->context.asce_limit) {
38 	case _REGION2_SIZE:
39 		/*
40 		 * forked 3-level task, fall through to set new asce with new
41 		 * mm->pgd
42 		 */
43 	case 0:
44 		/* context created by exec, set asce limit to 4TB */
45 		mm->context.asce_limit = STACK_TOP_MAX;
46 		mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
47 				   _ASCE_USER_BITS | _ASCE_TYPE_REGION3;
48 		/* pgd_alloc() did not account this pud */
49 		mm_inc_nr_puds(mm);
50 		break;
51 	case -PAGE_SIZE:
52 		/* forked 5-level task, set new asce with new_mm->pgd */
53 		mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
54 			_ASCE_USER_BITS | _ASCE_TYPE_REGION1;
55 		break;
56 	case _REGION1_SIZE:
57 		/* forked 4-level task, set new asce with new mm->pgd */
58 		mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
59 				   _ASCE_USER_BITS | _ASCE_TYPE_REGION2;
60 		break;
61 	case _REGION3_SIZE:
62 		/* forked 2-level compat task, set new asce with new mm->pgd */
63 		mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
64 				   _ASCE_USER_BITS | _ASCE_TYPE_SEGMENT;
65 		/* pgd_alloc() did not account this pmd */
66 		mm_inc_nr_pmds(mm);
67 		mm_inc_nr_puds(mm);
68 	}
69 	crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm));
70 	return 0;
71 }
72 
73 #define destroy_context(mm)             do { } while (0)
74 
set_user_asce(struct mm_struct * mm)75 static inline void set_user_asce(struct mm_struct *mm)
76 {
77 	S390_lowcore.user_asce = mm->context.asce;
78 	__ctl_load(S390_lowcore.user_asce, 1, 1);
79 	clear_cpu_flag(CIF_ASCE_PRIMARY);
80 }
81 
clear_user_asce(void)82 static inline void clear_user_asce(void)
83 {
84 	S390_lowcore.user_asce = S390_lowcore.kernel_asce;
85 	__ctl_load(S390_lowcore.kernel_asce, 1, 1);
86 	set_cpu_flag(CIF_ASCE_PRIMARY);
87 }
88 
89 mm_segment_t enable_sacf_uaccess(void);
90 void disable_sacf_uaccess(mm_segment_t old_fs);
91 
switch_mm(struct mm_struct * prev,struct mm_struct * next,struct task_struct * tsk)92 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
93 			     struct task_struct *tsk)
94 {
95 	int cpu = smp_processor_id();
96 
97 	if (prev == next)
98 		return;
99 	S390_lowcore.user_asce = next->context.asce;
100 	cpumask_set_cpu(cpu, &next->context.cpu_attach_mask);
101 	/* Clear previous user-ASCE from CR1 and CR7 */
102 	if (!test_cpu_flag(CIF_ASCE_PRIMARY)) {
103 		__ctl_load(S390_lowcore.kernel_asce, 1, 1);
104 		set_cpu_flag(CIF_ASCE_PRIMARY);
105 	}
106 	if (test_cpu_flag(CIF_ASCE_SECONDARY)) {
107 		__ctl_load(S390_lowcore.vdso_asce, 7, 7);
108 		clear_cpu_flag(CIF_ASCE_SECONDARY);
109 	}
110 	cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
111 }
112 
113 #define finish_arch_post_lock_switch finish_arch_post_lock_switch
finish_arch_post_lock_switch(void)114 static inline void finish_arch_post_lock_switch(void)
115 {
116 	struct task_struct *tsk = current;
117 	struct mm_struct *mm = tsk->mm;
118 
119 	if (mm) {
120 		preempt_disable();
121 		while (atomic_read(&mm->context.flush_count))
122 			cpu_relax();
123 		cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
124 		__tlb_flush_mm_lazy(mm);
125 		preempt_enable();
126 	}
127 	set_fs(current->thread.mm_segment);
128 }
129 
130 #define enter_lazy_tlb(mm,tsk)	do { } while (0)
131 #define deactivate_mm(tsk,mm)	do { } while (0)
132 
activate_mm(struct mm_struct * prev,struct mm_struct * next)133 static inline void activate_mm(struct mm_struct *prev,
134                                struct mm_struct *next)
135 {
136 	switch_mm(prev, next, current);
137 	cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
138 	set_user_asce(next);
139 }
140 
141 #endif /* __S390_MMU_CONTEXT_H */
142