1 /*
2 * This control block defines the PACA which defines the processor
3 * specific data for each logical processor on the system.
4 * There are some pointers defined that are utilized by PLIC.
5 *
6 * C 2001 PPC 64 Team, IBM Corp
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 */
13 #ifndef _ASM_POWERPC_PACA_H
14 #define _ASM_POWERPC_PACA_H
15 #ifdef __KERNEL__
16
17 #ifdef CONFIG_PPC64
18
19 #include <linux/string.h>
20 #include <asm/types.h>
21 #include <asm/lppaca.h>
22 #include <asm/mmu.h>
23 #include <asm/page.h>
24 #ifdef CONFIG_PPC_BOOK3E
25 #include <asm/exception-64e.h>
26 #else
27 #include <asm/exception-64s.h>
28 #endif
29 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
30 #include <asm/kvm_book3s_asm.h>
31 #endif
32 #include <asm/accounting.h>
33 #include <asm/hmi.h>
34 #include <asm/cpuidle.h>
35 #include <asm/atomic.h>
36
37 register struct paca_struct *local_paca asm("r13");
38
39 #if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
40 extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */
41 /*
42 * Add standard checks that preemption cannot occur when using get_paca():
43 * otherwise the paca_struct it points to may be the wrong one just after.
44 */
45 #define get_paca() ((void) debug_smp_processor_id(), local_paca)
46 #else
47 #define get_paca() local_paca
48 #endif
49
50 #ifdef CONFIG_PPC_PSERIES
51 #define get_lppaca() (get_paca()->lppaca_ptr)
52 #endif
53
54 #define get_slb_shadow() (get_paca()->slb_shadow_ptr)
55
56 struct task_struct;
57
58 /*
59 * Defines the layout of the paca.
60 *
61 * This structure is not directly accessed by firmware or the service
62 * processor.
63 */
64 struct paca_struct {
65 #ifdef CONFIG_PPC_PSERIES
66 /*
67 * Because hw_cpu_id, unlike other paca fields, is accessed
68 * routinely from other CPUs (from the IRQ code), we stick to
69 * read-only (after boot) fields in the first cacheline to
70 * avoid cacheline bouncing.
71 */
72
73 struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */
74 #endif /* CONFIG_PPC_PSERIES */
75
76 /*
77 * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c
78 * load lock_token and paca_index with a single lwz
79 * instruction. They must travel together and be properly
80 * aligned.
81 */
82 #ifdef __BIG_ENDIAN__
83 u16 lock_token; /* Constant 0x8000, used in locks */
84 u16 paca_index; /* Logical processor number */
85 #else
86 u16 paca_index; /* Logical processor number */
87 u16 lock_token; /* Constant 0x8000, used in locks */
88 #endif
89
90 u64 kernel_toc; /* Kernel TOC address */
91 u64 kernelbase; /* Base address of kernel */
92 u64 kernel_msr; /* MSR while running in kernel */
93 void *emergency_sp; /* pointer to emergency stack */
94 u64 data_offset; /* per cpu data offset */
95 s16 hw_cpu_id; /* Physical processor number */
96 u8 cpu_start; /* At startup, processor spins until */
97 /* this becomes non-zero. */
98 u8 kexec_state; /* set when kexec down has irqs off */
99 #ifdef CONFIG_PPC_BOOK3S_64
100 struct slb_shadow *slb_shadow_ptr;
101 struct dtl_entry *dispatch_log;
102 struct dtl_entry *dispatch_log_end;
103 #endif
104 u64 dscr_default; /* per-CPU default DSCR */
105
106 #ifdef CONFIG_PPC_BOOK3S_64
107 /*
108 * Now, starting in cacheline 2, the exception save areas
109 */
110 /* used for most interrupts/exceptions */
111 u64 exgen[EX_SIZE] __attribute__((aligned(0x80)));
112 u64 exslb[EX_SIZE]; /* used for SLB/segment table misses
113 * on the linear mapping */
114 /* SLB related definitions */
115 u16 vmalloc_sllp;
116 u16 slb_cache_ptr;
117 u32 slb_cache[SLB_CACHE_ENTRIES];
118 #endif /* CONFIG_PPC_BOOK3S_64 */
119
120 #ifdef CONFIG_PPC_BOOK3E
121 u64 exgen[8] __aligned(0x40);
122 /* Keep pgd in the same cacheline as the start of extlb */
123 pgd_t *pgd __aligned(0x40); /* Current PGD */
124 pgd_t *kernel_pgd; /* Kernel PGD */
125
126 /* Shared by all threads of a core -- points to tcd of first thread */
127 struct tlb_core_data *tcd_ptr;
128
129 /*
130 * We can have up to 3 levels of reentrancy in the TLB miss handler,
131 * in each of four exception levels (normal, crit, mcheck, debug).
132 */
133 u64 extlb[12][EX_TLB_SIZE / sizeof(u64)];
134 u64 exmc[8]; /* used for machine checks */
135 u64 excrit[8]; /* used for crit interrupts */
136 u64 exdbg[8]; /* used for debug interrupts */
137
138 /* Kernel stack pointers for use by special exceptions */
139 void *mc_kstack;
140 void *crit_kstack;
141 void *dbg_kstack;
142
143 struct tlb_core_data tcd;
144 #endif /* CONFIG_PPC_BOOK3E */
145
146 #ifdef CONFIG_PPC_BOOK3S
147 mm_context_id_t mm_ctx_id;
148 #ifdef CONFIG_PPC_MM_SLICES
149 unsigned char mm_ctx_low_slices_psize[BITS_PER_LONG / BITS_PER_BYTE];
150 unsigned char mm_ctx_high_slices_psize[SLICE_ARRAY_SIZE];
151 unsigned long mm_ctx_slb_addr_limit;
152 #else
153 u16 mm_ctx_user_psize;
154 u16 mm_ctx_sllp;
155 #endif
156 #endif
157
158 /*
159 * then miscellaneous read-write fields
160 */
161 struct task_struct *__current; /* Pointer to current */
162 u64 kstack; /* Saved Kernel stack addr */
163 u64 stab_rr; /* stab/slb round-robin counter */
164 u64 saved_r1; /* r1 save for RTAS calls or PM or EE=0 */
165 u64 saved_msr; /* MSR saved here by enter_rtas */
166 u16 trap_save; /* Used when bad stack is encountered */
167 u8 irq_soft_mask; /* mask for irq soft masking */
168 u8 irq_happened; /* irq happened while soft-disabled */
169 u8 io_sync; /* writel() needs spin_unlock sync */
170 u8 irq_work_pending; /* IRQ_WORK interrupt while soft-disable */
171 u8 nap_state_lost; /* NV GPR values lost in power7_idle */
172 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
173 u8 pmcregs_in_use; /* pseries puts this in lppaca */
174 #endif
175 u64 sprg_vdso; /* Saved user-visible sprg */
176 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
177 u64 tm_scratch; /* TM scratch area for reclaim */
178 #endif
179
180 #ifdef CONFIG_PPC_POWERNV
181 /* Per-core mask tracking idle threads and a lock bit-[L][TTTTTTTT] */
182 u32 *core_idle_state_ptr;
183 u8 thread_idle_state; /* PNV_THREAD_RUNNING/NAP/SLEEP */
184 /* Mask to indicate thread id in core */
185 u8 thread_mask;
186 /* Mask to denote subcore sibling threads */
187 u8 subcore_sibling_mask;
188 /* Flag to request this thread not to stop */
189 atomic_t dont_stop;
190 /* The PSSCR value that the kernel requested before going to stop */
191 u64 requested_psscr;
192
193 /*
194 * Save area for additional SPRs that need to be
195 * saved/restored during cpuidle stop.
196 */
197 struct stop_sprs stop_sprs;
198 #endif
199
200 #ifdef CONFIG_PPC_BOOK3S_64
201 /* Non-maskable exceptions that are not performance critical */
202 u64 exnmi[EX_SIZE]; /* used for system reset (nmi) */
203 u64 exmc[EX_SIZE]; /* used for machine checks */
204 #endif
205 #ifdef CONFIG_PPC_BOOK3S_64
206 /* Exclusive stacks for system reset and machine check exception. */
207 void *nmi_emergency_sp;
208 void *mc_emergency_sp;
209
210 u16 in_nmi; /* In nmi handler */
211
212 /*
213 * Flag to check whether we are in machine check early handler
214 * and already using emergency stack.
215 */
216 u16 in_mce;
217 u8 hmi_event_available; /* HMI event is available */
218 u8 hmi_p9_special_emu; /* HMI P9 special emulation */
219 #endif
220 u8 ftrace_enabled; /* Hard disable ftrace */
221
222 /* Stuff for accurate time accounting */
223 struct cpu_accounting_data accounting;
224 u64 dtl_ridx; /* read index in dispatch log */
225 struct dtl_entry *dtl_curr; /* pointer corresponding to dtl_ridx */
226
227 #ifdef CONFIG_KVM_BOOK3S_HANDLER
228 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
229 /* We use this to store guest state in */
230 struct kvmppc_book3s_shadow_vcpu shadow_vcpu;
231 #endif
232 struct kvmppc_host_state kvm_hstate;
233 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
234 /*
235 * Bitmap for sibling subcore status. See kvm/book3s_hv_ras.c for
236 * more details
237 */
238 struct sibling_subcore_state *sibling_subcore_state;
239 #endif
240 #endif
241 #ifdef CONFIG_PPC_BOOK3S_64
242 /*
243 * rfi fallback flush must be in its own cacheline to prevent
244 * other paca data leaking into the L1d
245 */
246 u64 exrfi[EX_SIZE] __aligned(0x80);
247 void *rfi_flush_fallback_area;
248 u64 l1d_flush_size;
249 #endif
250 #ifdef CONFIG_PPC_PSERIES
251 u8 *mce_data_buf; /* buffer to hold per cpu rtas errlog */
252 #endif /* CONFIG_PPC_PSERIES */
253 } ____cacheline_aligned;
254
255 extern void copy_mm_to_paca(struct mm_struct *mm);
256 extern struct paca_struct **paca_ptrs;
257 extern void initialise_paca(struct paca_struct *new_paca, int cpu);
258 extern void setup_paca(struct paca_struct *new_paca);
259 extern void allocate_paca_ptrs(void);
260 extern void allocate_paca(int cpu);
261 extern void free_unused_pacas(void);
262
263 #else /* CONFIG_PPC64 */
264
allocate_paca_ptrs(void)265 static inline void allocate_paca_ptrs(void) { };
allocate_paca(int cpu)266 static inline void allocate_paca(int cpu) { };
free_unused_pacas(void)267 static inline void free_unused_pacas(void) { };
268
269 #endif /* CONFIG_PPC64 */
270
271 #endif /* __KERNEL__ */
272 #endif /* _ASM_POWERPC_PACA_H */
273
