1 /*
2  *  Atheros AR913X/AR933X SoC built-in WMAC device support
3  *
4  *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
5  *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
6  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7  *
8  *  Parts of this file are based on Atheros 2.6.15/2.6.31 BSP
9  *
10  *  This program is free software; you can redistribute it and/or modify it
11  *  under the terms of the GNU General Public License version 2 as published
12  *  by the Free Software Foundation.
13  */
14 
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/irq.h>
18 #include <linux/platform_device.h>
19 #include <linux/ath9k_platform.h>
20 
21 #include <asm/mach-ath79/ath79.h>
22 #include <asm/mach-ath79/ar71xx_regs.h>
23 #include "dev-wmac.h"
24 
25 static struct ath9k_platform_data ath79_wmac_data;
26 
27 static struct resource ath79_wmac_resources[] = {
28 	{
29 		/* .start and .end fields are filled dynamically */
30 		.flags	= IORESOURCE_MEM,
31 	}, {
32 		/* .start and .end fields are filled dynamically */
33 		.flags	= IORESOURCE_IRQ,
34 	},
35 };
36 
37 static struct platform_device ath79_wmac_device = {
38 	.name		= "ath9k",
39 	.id		= -1,
40 	.resource	= ath79_wmac_resources,
41 	.num_resources	= ARRAY_SIZE(ath79_wmac_resources),
42 	.dev = {
43 		.platform_data = &ath79_wmac_data,
44 	},
45 };
46 
ar913x_wmac_setup(void)47 static void __init ar913x_wmac_setup(void)
48 {
49 	/* reset the WMAC */
50 	ath79_device_reset_set(AR913X_RESET_AMBA2WMAC);
51 	mdelay(10);
52 
53 	ath79_device_reset_clear(AR913X_RESET_AMBA2WMAC);
54 	mdelay(10);
55 
56 	ath79_wmac_resources[0].start = AR913X_WMAC_BASE;
57 	ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1;
58 	ath79_wmac_resources[1].start = ATH79_CPU_IRQ(2);
59 	ath79_wmac_resources[1].end = ATH79_CPU_IRQ(2);
60 }
61 
62 
ar933x_wmac_reset(void)63 static int ar933x_wmac_reset(void)
64 {
65 	ath79_device_reset_set(AR933X_RESET_WMAC);
66 	ath79_device_reset_clear(AR933X_RESET_WMAC);
67 
68 	return 0;
69 }
70 
ar933x_r1_get_wmac_revision(void)71 static int ar933x_r1_get_wmac_revision(void)
72 {
73 	return ath79_soc_rev;
74 }
75 
ar933x_wmac_setup(void)76 static void __init ar933x_wmac_setup(void)
77 {
78 	u32 t;
79 
80 	ar933x_wmac_reset();
81 
82 	ath79_wmac_device.name = "ar933x_wmac";
83 
84 	ath79_wmac_resources[0].start = AR933X_WMAC_BASE;
85 	ath79_wmac_resources[0].end = AR933X_WMAC_BASE + AR933X_WMAC_SIZE - 1;
86 	ath79_wmac_resources[1].start = ATH79_CPU_IRQ(2);
87 	ath79_wmac_resources[1].end = ATH79_CPU_IRQ(2);
88 
89 	t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
90 	if (t & AR933X_BOOTSTRAP_REF_CLK_40)
91 		ath79_wmac_data.is_clk_25mhz = false;
92 	else
93 		ath79_wmac_data.is_clk_25mhz = true;
94 
95 	if (ath79_soc_rev == 1)
96 		ath79_wmac_data.get_mac_revision = ar933x_r1_get_wmac_revision;
97 
98 	ath79_wmac_data.external_reset = ar933x_wmac_reset;
99 }
100 
ar934x_wmac_setup(void)101 static void ar934x_wmac_setup(void)
102 {
103 	u32 t;
104 
105 	ath79_wmac_device.name = "ar934x_wmac";
106 
107 	ath79_wmac_resources[0].start = AR934X_WMAC_BASE;
108 	ath79_wmac_resources[0].end = AR934X_WMAC_BASE + AR934X_WMAC_SIZE - 1;
109 	ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
110 	ath79_wmac_resources[1].end = ATH79_IP2_IRQ(1);
111 
112 	t = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
113 	if (t & AR934X_BOOTSTRAP_REF_CLK_40)
114 		ath79_wmac_data.is_clk_25mhz = false;
115 	else
116 		ath79_wmac_data.is_clk_25mhz = true;
117 }
118 
qca955x_wmac_setup(void)119 static void qca955x_wmac_setup(void)
120 {
121 	u32 t;
122 
123 	ath79_wmac_device.name = "qca955x_wmac";
124 
125 	ath79_wmac_resources[0].start = QCA955X_WMAC_BASE;
126 	ath79_wmac_resources[0].end = QCA955X_WMAC_BASE + QCA955X_WMAC_SIZE - 1;
127 	ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
128 	ath79_wmac_resources[1].end = ATH79_IP2_IRQ(1);
129 
130 	t = ath79_reset_rr(QCA955X_RESET_REG_BOOTSTRAP);
131 	if (t & QCA955X_BOOTSTRAP_REF_CLK_40)
132 		ath79_wmac_data.is_clk_25mhz = false;
133 	else
134 		ath79_wmac_data.is_clk_25mhz = true;
135 }
136 
ath79_register_wmac(u8 * cal_data)137 void __init ath79_register_wmac(u8 *cal_data)
138 {
139 	if (soc_is_ar913x())
140 		ar913x_wmac_setup();
141 	else if (soc_is_ar933x())
142 		ar933x_wmac_setup();
143 	else if (soc_is_ar934x())
144 		ar934x_wmac_setup();
145 	else if (soc_is_qca955x())
146 		qca955x_wmac_setup();
147 	else
148 		BUG();
149 
150 	if (cal_data)
151 		memcpy(ath79_wmac_data.eeprom_data, cal_data,
152 		       sizeof(ath79_wmac_data.eeprom_data));
153 
154 	platform_device_register(&ath79_wmac_device);
155 }
156