1/*
2 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11 * GNU General Public License for more details.
12 */
13
14&msmgpio {
15
16	blsp1_spi0_default: blsp1_spi0_default {
17		pinmux {
18			function = "blsp_spi1";
19			pins = "gpio0", "gpio1", "gpio3";
20		};
21		pinmux_cs {
22			function = "gpio";
23			pins = "gpio2";
24		};
25		pinconf {
26			pins = "gpio0", "gpio1", "gpio3";
27			drive-strength = <12>;
28			bias-disable;
29		};
30		pinconf_cs {
31			pins = "gpio2";
32			drive-strength = <16>;
33			bias-disable;
34			output-high;
35		};
36	};
37
38	blsp1_spi0_sleep: blsp1_spi0_sleep {
39		pinmux {
40			function = "gpio";
41			pins = "gpio0", "gpio1", "gpio2", "gpio3";
42		};
43		pinconf {
44			pins = "gpio0", "gpio1", "gpio2", "gpio3";
45			drive-strength = <2>;
46			bias-pull-down;
47		};
48	};
49
50	blsp1_i2c2_default: blsp1_i2c2_default {
51		pinmux {
52			function = "blsp_i2c3";
53			pins = "gpio47", "gpio48";
54		};
55		pinconf {
56			pins = "gpio47", "gpio48";
57			drive-strength = <16>;
58			bias-disable = <0>;
59		};
60	};
61
62	blsp1_i2c2_sleep: blsp1_i2c2_sleep {
63		pinmux {
64			function = "gpio";
65			pins = "gpio47", "gpio48";
66		};
67		pinconf {
68			pins = "gpio47", "gpio48";
69			drive-strength = <2>;
70			bias-disable = <0>;
71		};
72	};
73
74	blsp2_i2c0_default: blsp2_i2c0 {
75		pinmux {
76			function = "blsp_i2c7";
77			pins = "gpio55", "gpio56";
78		};
79		pinconf {
80			pins = "gpio55", "gpio56";
81			drive-strength = <16>;
82			bias-disable;
83		};
84	};
85
86	blsp2_i2c0_sleep: blsp2_i2c0_sleep {
87		pinmux {
88			function = "gpio";
89			pins = "gpio55", "gpio56";
90		};
91		pinconf {
92			pins = "gpio55", "gpio56";
93			drive-strength = <2>;
94			bias-disable;
95		};
96	};
97
98	blsp2_uart1_2pins_default: blsp2_uart1_2pins {
99		pinmux {
100			function = "blsp_uart8";
101			pins = "gpio4", "gpio5";
102		};
103		pinconf {
104			pins = "gpio4", "gpio5";
105			drive-strength = <16>;
106			bias-disable;
107		};
108	};
109
110	blsp2_uart1_2pins_sleep: blsp2_uart1_2pins_sleep {
111		pinmux {
112			function = "gpio";
113			pins = "gpio4", "gpio5";
114		};
115		pinconf {
116			pins = "gpio4", "gpio5";
117			drive-strength = <2>;
118			bias-disable;
119		};
120	};
121
122	blsp2_uart1_4pins_default: blsp2_uart1_4pins {
123		pinmux {
124			function = "blsp_uart8";
125			pins = "gpio4", "gpio5", "gpio6", "gpio7";
126		};
127
128		pinconf {
129			pins = "gpio4", "gpio5", "gpio6", "gpio7";
130			drive-strength = <16>;
131			bias-disable;
132		};
133	};
134
135	blsp2_uart1_4pins_sleep: blsp2_uart1_4pins_sleep {
136		pinmux {
137			function = "gpio";
138			pins = "gpio4", "gpio5", "gpio6", "gpio7";
139		};
140
141		pinconf {
142			pins = "gpio4", "gpiio5", "gpio6", "gpio7";
143			drive-strength = <2>;
144			bias-disable;
145		};
146	};
147
148	blsp2_i2c1_default: blsp2_i2c1 {
149		pinmux {
150			function = "blsp_i2c8";
151			pins = "gpio6", "gpio7";
152		};
153		pinconf {
154			pins = "gpio6", "gpio7";
155			drive-strength = <16>;
156			bias-disable;
157		};
158	};
159
160	blsp2_i2c1_sleep: blsp2_i2c1_sleep {
161		pinmux {
162			function = "gpio";
163			pins = "gpio6", "gpio7";
164		};
165		pinconf {
166			pins = "gpio6", "gpio7";
167			drive-strength = <2>;
168			bias-disable;
169		};
170	};
171
172	blsp2_uart2_2pins_default: blsp2_uart2_2pins {
173		pinmux {
174			function = "blsp_uart9";
175			pins = "gpio49", "gpio50";
176		};
177		pinconf {
178			pins = "gpio49", "gpio50";
179			drive-strength = <16>;
180			bias-disable;
181		};
182	};
183
184	blsp2_uart2_2pins_sleep: blsp2_uart2_2pins_sleep {
185		pinmux {
186			function = "gpio";
187			pins = "gpio49", "gpio50";
188		};
189		pinconf {
190			pins = "gpio49", "gpio50";
191			drive-strength = <2>;
192			bias-disable;
193		};
194	};
195
196	blsp2_uart2_4pins_default: blsp2_uart2_4pins {
197		pinmux {
198			function = "blsp_uart9";
199			pins = "gpio49", "gpio50", "gpio51", "gpio52";
200		};
201
202		pinconf {
203			pins = "gpio49", "gpio50", "gpio51", "gpio52";
204			drive-strength = <16>;
205			bias-disable;
206		};
207	};
208
209	blsp2_uart2_4pins_sleep: blsp2_uart2_4pins_sleep {
210		pinmux {
211			function = "gpio";
212			pins = "gpio49", "gpio50", "gpio51", "gpio52";
213		};
214
215		pinconf {
216			pins = "gpio49", "gpio50", "gpio51", "gpio52";
217			drive-strength = <2>;
218			bias-disable;
219		};
220	};
221
222	blsp2_spi5_default: blsp2_spi5_default {
223		pinmux {
224			function = "blsp_spi12";
225			pins = "gpio85", "gpio86", "gpio88";
226		};
227		pinmux_cs {
228			function = "gpio";
229			pins = "gpio87";
230		};
231		pinconf {
232			pins = "gpio85", "gpio86", "gpio88";
233			drive-strength = <12>;
234			bias-disable;
235		};
236		pinconf_cs {
237			pins = "gpio87";
238			drive-strength = <16>;
239			bias-disable;
240			output-high;
241		};
242	};
243
244	blsp2_spi5_sleep: blsp2_spi5_sleep {
245		pinmux {
246			function = "gpio";
247			pins = "gpio85", "gpio86", "gpio87", "gpio88";
248		};
249		pinconf {
250			pins = "gpio85", "gpio86", "gpio87", "gpio88";
251			drive-strength = <2>;
252			bias-pull-down;
253		};
254	};
255
256	sdc2_clk_on: sdc2_clk_on {
257		config {
258			pins = "sdc2_clk";
259			bias-disable;		/* NO pull */
260			drive-strength = <16>;	/* 16 MA */
261		};
262	};
263
264	sdc2_clk_off: sdc2_clk_off {
265		config {
266			pins = "sdc2_clk";
267			bias-disable;		/* NO pull */
268			drive-strength = <2>;	/* 2 MA */
269		};
270	};
271
272	sdc2_cmd_on: sdc2_cmd_on {
273		config {
274			pins = "sdc2_cmd";
275			bias-pull-up;		/* pull up */
276			drive-strength = <10>;	/* 10 MA */
277		};
278	};
279
280	sdc2_cmd_off: sdc2_cmd_off {
281		config {
282			pins = "sdc2_cmd";
283			bias-pull-up;		/* pull up */
284			drive-strength = <2>;	/* 2 MA */
285		};
286	};
287
288	sdc2_data_on: sdc2_data_on {
289		config {
290			pins = "sdc2_data";
291			bias-pull-up;		/* pull up */
292			drive-strength = <10>;	/* 10 MA */
293		};
294	};
295
296	sdc2_data_off: sdc2_data_off {
297		config {
298			pins = "sdc2_data";
299			bias-pull-up;		/* pull up */
300			drive-strength = <2>;	/* 2 MA */
301		};
302	};
303
304	pcie0_clkreq_default: pcie0_clkreq_default {
305		mux {
306			pins = "gpio36";
307			function = "pci_e0";
308		};
309
310		config {
311			pins = "gpio36";
312			drive-strength = <2>;
313			bias-pull-up;
314		};
315	};
316
317	pcie0_perst_default: pcie0_perst_default {
318		mux {
319			pins = "gpio35";
320			function = "gpio";
321		};
322
323		config {
324			pins = "gpio35";
325			drive-strength = <2>;
326			bias-pull-down;
327		};
328	};
329
330	pcie0_wake_default: pcie0_wake_default {
331		mux {
332			pins = "gpio37";
333			function = "gpio";
334		};
335
336		config {
337			pins = "gpio37";
338			drive-strength = <2>;
339			bias-pull-up;
340		};
341	};
342
343	pcie0_clkreq_sleep: pcie0_clkreq_sleep {
344		mux {
345			pins = "gpio36";
346			function = "gpio";
347		};
348
349		config {
350			pins = "gpio36";
351			drive-strength = <2>;
352			bias-disable;
353		};
354	};
355
356	pcie0_wake_sleep: pcie0_wake_sleep {
357		mux {
358			pins = "gpio37";
359			function = "gpio";
360		};
361
362		config {
363			pins = "gpio37";
364			drive-strength = <2>;
365			bias-disable;
366		};
367	};
368
369	pcie1_clkreq_default: pcie1_clkreq_default {
370		mux {
371			pins = "gpio131";
372			function = "pci_e1";
373		};
374
375		config {
376			pins = "gpio131";
377			drive-strength = <2>;
378			bias-pull-up;
379		};
380	};
381
382	pcie1_perst_default: pcie1_perst_default {
383		mux {
384			pins = "gpio130";
385			function = "gpio";
386		};
387
388		config {
389			pins = "gpio130";
390			drive-strength = <2>;
391			bias-pull-down;
392		};
393	};
394
395	pcie1_wake_default: pcie1_wake_default {
396		mux {
397			pins = "gpio132";
398			function = "gpio";
399		};
400
401		config {
402			pins = "gpio132";
403			drive-strength = <2>;
404			bias-pull-down;
405		};
406	};
407
408	pcie1_clkreq_sleep: pcie1_clkreq_sleep {
409		mux {
410			pins = "gpio131";
411			function = "gpio";
412		};
413
414		config {
415			pins = "gpio131";
416			drive-strength = <2>;
417			bias-disable;
418		};
419	};
420
421	pcie1_wake_sleep: pcie1_wake_sleep {
422		mux {
423			pins = "gpio132";
424			function = "gpio";
425		};
426
427		config {
428			pins = "gpio132";
429			drive-strength = <2>;
430			bias-disable;
431		};
432	};
433
434	pcie2_clkreq_default: pcie2_clkreq_default {
435		mux {
436			pins = "gpio115";
437			function = "pci_e2";
438		};
439
440		config {
441			pins = "gpio115";
442			drive-strength = <2>;
443			bias-pull-up;
444		};
445	};
446
447	pcie2_perst_default: pcie2_perst_default {
448		mux {
449			pins = "gpio114";
450			function = "gpio";
451		};
452
453		config {
454			pins = "gpio114";
455			drive-strength = <2>;
456			bias-pull-down;
457		};
458	};
459
460	pcie2_wake_default: pcie2_wake_default {
461		mux {
462			pins = "gpio116";
463			function = "gpio";
464		};
465
466		config {
467			pins = "gpio116";
468			drive-strength = <2>;
469			bias-pull-down;
470		};
471	};
472
473	pcie2_clkreq_sleep: pcie2_clkreq_sleep {
474		mux {
475			pins = "gpio115";
476			function = "gpio";
477		};
478
479		config {
480			pins = "gpio115";
481			drive-strength = <2>;
482			bias-disable;
483		};
484	};
485
486	pcie2_wake_sleep: pcie2_wake_sleep {
487		mux {
488			pins = "gpio116";
489			function = "gpio";
490		};
491
492		config {
493			pins = "gpio116";
494			drive-strength = <2>;
495			bias-disable;
496		};
497	};
498};
499