1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * R-Car Generation 2 support
4 *
5 * Copyright (C) 2013 Renesas Solutions Corp.
6 * Copyright (C) 2013 Magnus Damm
7 * Copyright (C) 2014 Ulrich Hecht
8 */
9
10 #include <linux/clk-provider.h>
11 #include <linux/clocksource.h>
12 #include <linux/device.h>
13 #include <linux/dma-contiguous.h>
14 #include <linux/io.h>
15 #include <linux/kernel.h>
16 #include <linux/memblock.h>
17 #include <linux/of.h>
18 #include <linux/of_fdt.h>
19 #include <linux/of_platform.h>
20 #include <asm/mach/arch.h>
21 #include <asm/secure_cntvoff.h>
22 #include "common.h"
23 #include "rcar-gen2.h"
24
25 static const struct of_device_id cpg_matches[] __initconst = {
26 { .compatible = "renesas,rcar-gen2-cpg-clocks", },
27 { .compatible = "renesas,r8a7743-cpg-mssr", .data = "extal" },
28 { .compatible = "renesas,r8a7790-cpg-mssr", .data = "extal" },
29 { .compatible = "renesas,r8a7791-cpg-mssr", .data = "extal" },
30 { .compatible = "renesas,r8a7793-cpg-mssr", .data = "extal" },
31 { /* sentinel */ }
32 };
33
get_extal_freq(void)34 static unsigned int __init get_extal_freq(void)
35 {
36 const struct of_device_id *match;
37 struct device_node *cpg, *extal;
38 u32 freq = 20000000;
39 int idx = 0;
40
41 cpg = of_find_matching_node_and_match(NULL, cpg_matches, &match);
42 if (!cpg)
43 return freq;
44
45 if (match->data)
46 idx = of_property_match_string(cpg, "clock-names", match->data);
47 extal = of_parse_phandle(cpg, "clocks", idx);
48 of_node_put(cpg);
49 if (!extal)
50 return freq;
51
52 of_property_read_u32(extal, "clock-frequency", &freq);
53 of_node_put(extal);
54 return freq;
55 }
56
57 #define CNTCR 0
58 #define CNTFID0 0x20
59
rcar_gen2_timer_init(void)60 void __init rcar_gen2_timer_init(void)
61 {
62 void __iomem *base;
63 u32 freq;
64
65 secure_cntvoff_init();
66
67 if (of_machine_is_compatible("renesas,r8a7745") ||
68 of_machine_is_compatible("renesas,r8a77470") ||
69 of_machine_is_compatible("renesas,r8a7792") ||
70 of_machine_is_compatible("renesas,r8a7794")) {
71 freq = 260000000 / 8; /* ZS / 8 */
72 } else {
73 /* At Linux boot time the r8a7790 arch timer comes up
74 * with the counter disabled. Moreover, it may also report
75 * a potentially incorrect fixed 13 MHz frequency. To be
76 * correct these registers need to be updated to use the
77 * frequency EXTAL / 2.
78 */
79 freq = get_extal_freq() / 2;
80 }
81
82 /* Remap "armgcnt address map" space */
83 base = ioremap(0xe6080000, PAGE_SIZE);
84
85 /*
86 * Update the timer if it is either not running, or is not at the
87 * right frequency. The timer is only configurable in secure mode
88 * so this avoids an abort if the loader started the timer and
89 * entered the kernel in non-secure mode.
90 */
91
92 if ((ioread32(base + CNTCR) & 1) == 0 ||
93 ioread32(base + CNTFID0) != freq) {
94 /* Update registers with correct frequency */
95 iowrite32(freq, base + CNTFID0);
96 asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
97
98 /* make sure arch timer is started by setting bit 0 of CNTCR */
99 iowrite32(1, base + CNTCR);
100 }
101
102 iounmap(base);
103
104 of_clk_init(NULL);
105 timer_probe();
106 }
107
108 struct memory_reserve_config {
109 u64 reserved;
110 u64 base, size;
111 };
112
rcar_gen2_scan_mem(unsigned long node,const char * uname,int depth,void * data)113 static int __init rcar_gen2_scan_mem(unsigned long node, const char *uname,
114 int depth, void *data)
115 {
116 const char *type = of_get_flat_dt_prop(node, "device_type", NULL);
117 const __be32 *reg, *endp;
118 int l;
119 struct memory_reserve_config *mrc = data;
120 u64 lpae_start = 1ULL << 32;
121
122 /* We are scanning "memory" nodes only */
123 if (type == NULL || strcmp(type, "memory"))
124 return 0;
125
126 reg = of_get_flat_dt_prop(node, "linux,usable-memory", &l);
127 if (reg == NULL)
128 reg = of_get_flat_dt_prop(node, "reg", &l);
129 if (reg == NULL)
130 return 0;
131
132 endp = reg + (l / sizeof(__be32));
133 while ((endp - reg) >= (dt_root_addr_cells + dt_root_size_cells)) {
134 u64 base, size;
135
136 base = dt_mem_next_cell(dt_root_addr_cells, ®);
137 size = dt_mem_next_cell(dt_root_size_cells, ®);
138
139 if (base >= lpae_start)
140 continue;
141
142 if ((base + size) >= lpae_start)
143 size = lpae_start - base;
144
145 if (size < mrc->reserved)
146 continue;
147
148 if (base < mrc->base)
149 continue;
150
151 /* keep the area at top near the 32-bit legacy limit */
152 mrc->base = base + size - mrc->reserved;
153 mrc->size = mrc->reserved;
154 }
155
156 return 0;
157 }
158
rcar_gen2_reserve(void)159 void __init rcar_gen2_reserve(void)
160 {
161 struct memory_reserve_config mrc;
162
163 /* reserve 256 MiB at the top of the physical legacy 32-bit space */
164 memset(&mrc, 0, sizeof(mrc));
165 mrc.reserved = SZ_256M;
166
167 of_scan_flat_dt(rcar_gen2_scan_mem, &mrc);
168 #ifdef CONFIG_DMA_CMA
169 if (mrc.size && memblock_is_region_memory(mrc.base, mrc.size)) {
170 static struct cma *rcar_gen2_dma_contiguous;
171
172 dma_contiguous_reserve_area(mrc.size, mrc.base, 0,
173 &rcar_gen2_dma_contiguous, true);
174 }
175 #endif
176 }
177
178 static const char * const rcar_gen2_boards_compat_dt[] __initconst = {
179 "renesas,r8a7790",
180 "renesas,r8a7791",
181 "renesas,r8a7792",
182 "renesas,r8a7793",
183 "renesas,r8a7794",
184 NULL,
185 };
186
187 DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)")
188 .init_late = shmobile_init_late,
189 .init_time = rcar_gen2_timer_init,
190 .reserve = rcar_gen2_reserve,
191 .dt_compat = rcar_gen2_boards_compat_dt,
192 MACHINE_END
193
194 static const char * const rz_g1_boards_compat_dt[] __initconst = {
195 "renesas,r8a7743",
196 "renesas,r8a7745",
197 "renesas,r8a77470",
198 NULL,
199 };
200
201 DT_MACHINE_START(RZ_G1_DT, "Generic RZ/G1 (Flattened Device Tree)")
202 .init_late = shmobile_init_late,
203 .init_time = rcar_gen2_timer_init,
204 .reserve = rcar_gen2_reserve,
205 .dt_compat = rz_g1_boards_compat_dt,
206 MACHINE_END
207
