1 /*
2 * OMAP4+ Power Management Routines
3 *
4 * Copyright (C) 2010-2013 Texas Instruments, Inc.
5 * Rajendra Nayak <rnayak@ti.com>
6 * Santosh Shilimkar <santosh.shilimkar@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/pm.h>
14 #include <linux/suspend.h>
15 #include <linux/module.h>
16 #include <linux/list.h>
17 #include <linux/err.h>
18 #include <linux/slab.h>
19 #include <asm/system_misc.h>
20
21 #include "soc.h"
22 #include "common.h"
23 #include "clockdomain.h"
24 #include "powerdomain.h"
25 #include "pm.h"
26
27 u16 pm44xx_errata;
28
29 struct power_state {
30 struct powerdomain *pwrdm;
31 u32 next_state;
32 u32 next_logic_state;
33 #ifdef CONFIG_SUSPEND
34 u32 saved_state;
35 u32 saved_logic_state;
36 #endif
37 struct list_head node;
38 };
39
40 /**
41 * struct static_dep_map - Static dependency map
42 * @from: from clockdomain
43 * @to: to clockdomain
44 */
45 struct static_dep_map {
46 const char *from;
47 const char *to;
48 };
49
50 static u32 cpu_suspend_state = PWRDM_POWER_OFF;
51
52 static LIST_HEAD(pwrst_list);
53
54 #ifdef CONFIG_SUSPEND
omap4_pm_suspend(void)55 static int omap4_pm_suspend(void)
56 {
57 struct power_state *pwrst;
58 int state, ret = 0;
59 u32 cpu_id = smp_processor_id();
60
61 /* Save current powerdomain state */
62 list_for_each_entry(pwrst, &pwrst_list, node) {
63 pwrst->saved_state = pwrdm_read_next_pwrst(pwrst->pwrdm);
64 pwrst->saved_logic_state = pwrdm_read_logic_retst(pwrst->pwrdm);
65 }
66
67 /* Set targeted power domain states by suspend */
68 list_for_each_entry(pwrst, &pwrst_list, node) {
69 omap_set_pwrdm_state(pwrst->pwrdm, pwrst->next_state);
70 pwrdm_set_logic_retst(pwrst->pwrdm, pwrst->next_logic_state);
71 }
72
73 /*
74 * For MPUSS to hit power domain retention(CSWR or OSWR),
75 * CPU0 and CPU1 power domains need to be in OFF or DORMANT state,
76 * since CPU power domain CSWR is not supported by hardware
77 * Only master CPU follows suspend path. All other CPUs follow
78 * CPU hotplug path in system wide suspend. On OMAP4, CPU power
79 * domain CSWR is not supported by hardware.
80 * More details can be found in OMAP4430 TRM section 4.3.4.2.
81 */
82 omap4_enter_lowpower(cpu_id, cpu_suspend_state);
83
84 /* Restore next powerdomain state */
85 list_for_each_entry(pwrst, &pwrst_list, node) {
86 state = pwrdm_read_prev_pwrst(pwrst->pwrdm);
87 if (state > pwrst->next_state) {
88 pr_info("Powerdomain (%s) didn't enter target state %d\n",
89 pwrst->pwrdm->name, pwrst->next_state);
90 ret = -1;
91 }
92 omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state);
93 pwrdm_set_logic_retst(pwrst->pwrdm, pwrst->saved_logic_state);
94 }
95 if (ret) {
96 pr_crit("Could not enter target state in pm_suspend\n");
97 /*
98 * OMAP4 chip PM currently works only with certain (newer)
99 * versions of bootloaders. This is due to missing code in the
100 * kernel to properly reset and initialize some devices.
101 * Warn the user about the bootloader version being one of the
102 * possible causes.
103 * http://www.spinics.net/lists/arm-kernel/msg218641.html
104 */
105 pr_warn("A possible cause could be an old bootloader - try u-boot >= v2012.07\n");
106 } else {
107 pr_info("Successfully put all powerdomains to target state\n");
108 }
109
110 return 0;
111 }
112 #else
113 #define omap4_pm_suspend NULL
114 #endif /* CONFIG_SUSPEND */
115
pwrdms_setup(struct powerdomain * pwrdm,void * unused)116 static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
117 {
118 struct power_state *pwrst;
119
120 if (!pwrdm->pwrsts)
121 return 0;
122
123 /*
124 * Skip CPU0 and CPU1 power domains. CPU1 is programmed
125 * through hotplug path and CPU0 explicitly programmed
126 * further down in the code path
127 */
128 if (!strncmp(pwrdm->name, "cpu", 3)) {
129 if (IS_PM44XX_ERRATUM(PM_OMAP4_CPU_OSWR_DISABLE))
130 cpu_suspend_state = PWRDM_POWER_RET;
131 return 0;
132 }
133
134 /*
135 * Bootloader or kexec boot may have LOGICRETSTATE cleared
136 * for some domains. This is the case when kexec booting from
137 * Android kernels that support off mode for example.
138 * Make sure it's set at least for core and per, otherwise
139 * we currently will see lost GPIO interrupts for wlcore and
140 * smsc911x at least if per hits retention during idle.
141 */
142 if (!strncmp(pwrdm->name, "core", 4) ||
143 !strncmp(pwrdm->name, "l4per", 5) ||
144 !strncmp(pwrdm->name, "wkup", 4))
145 pwrdm_set_logic_retst(pwrdm, PWRDM_POWER_RET);
146
147 pwrst = kmalloc(sizeof(struct power_state), GFP_ATOMIC);
148 if (!pwrst)
149 return -ENOMEM;
150
151 pwrst->pwrdm = pwrdm;
152 pwrst->next_state = pwrdm_get_valid_lp_state(pwrdm, false,
153 PWRDM_POWER_RET);
154 pwrst->next_logic_state = pwrdm_get_valid_lp_state(pwrdm, true,
155 PWRDM_POWER_OFF);
156
157 list_add(&pwrst->node, &pwrst_list);
158
159 return omap_set_pwrdm_state(pwrst->pwrdm, pwrst->next_state);
160 }
161
162 /**
163 * omap_default_idle - OMAP4 default ilde routine.'
164 *
165 * Implements OMAP4 memory, IO ordering requirements which can't be addressed
166 * with default cpu_do_idle() hook. Used by all CPUs with !CONFIG_CPU_IDLE and
167 * by secondary CPU with CONFIG_CPU_IDLE.
168 */
omap_default_idle(void)169 static void omap_default_idle(void)
170 {
171 omap_do_wfi();
172 }
173
174 /*
175 * The dynamic dependency between MPUSS -> MEMIF and
176 * MPUSS -> L4_PER/L3_* and DUCATI -> L3_* doesn't work as
177 * expected. The hardware recommendation is to enable static
178 * dependencies for these to avoid system lock ups or random crashes.
179 * The L4 wakeup depedency is added to workaround the OCP sync hardware
180 * BUG with 32K synctimer which lead to incorrect timer value read
181 * from the 32K counter. The BUG applies for GPTIMER1 and WDT2 which
182 * are part of L4 wakeup clockdomain.
183 */
184 static const struct static_dep_map omap4_static_dep_map[] = {
185 {.from = "mpuss_clkdm", .to = "l3_emif_clkdm"},
186 {.from = "mpuss_clkdm", .to = "l3_1_clkdm"},
187 {.from = "mpuss_clkdm", .to = "l3_2_clkdm"},
188 {.from = "ducati_clkdm", .to = "l3_1_clkdm"},
189 {.from = "ducati_clkdm", .to = "l3_2_clkdm"},
190 {.from = NULL} /* TERMINATION */
191 };
192
193 static const struct static_dep_map omap5_dra7_static_dep_map[] = {
194 {.from = "mpu_clkdm", .to = "emif_clkdm"},
195 {.from = NULL} /* TERMINATION */
196 };
197
198 /**
199 * omap4plus_init_static_deps() - Initialize a static dependency map
200 * @map: Mapping of clock domains
201 */
omap4plus_init_static_deps(const struct static_dep_map * map)202 static inline int omap4plus_init_static_deps(const struct static_dep_map *map)
203 {
204 int ret;
205 struct clockdomain *from, *to;
206
207 if (!map)
208 return 0;
209
210 while (map->from) {
211 from = clkdm_lookup(map->from);
212 to = clkdm_lookup(map->to);
213 if (!from || !to) {
214 pr_err("Failed lookup %s or %s for wakeup dependency\n",
215 map->from, map->to);
216 return -EINVAL;
217 }
218 ret = clkdm_add_wkdep(from, to);
219 if (ret) {
220 pr_err("Failed to add %s -> %s wakeup dependency(%d)\n",
221 map->from, map->to, ret);
222 return ret;
223 }
224
225 map++;
226 }
227
228 return 0;
229 }
230
231 /**
232 * omap4_pm_init_early - Does early initialization necessary for OMAP4+ devices
233 *
234 * Initializes basic stuff for power management functionality.
235 */
omap4_pm_init_early(void)236 int __init omap4_pm_init_early(void)
237 {
238 if (cpu_is_omap446x())
239 pm44xx_errata |= PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD;
240
241 if (soc_is_omap54xx() || soc_is_dra7xx())
242 pm44xx_errata |= PM_OMAP4_CPU_OSWR_DISABLE;
243
244 return 0;
245 }
246
247 /**
248 * omap4_pm_init - Init routine for OMAP4+ devices
249 *
250 * Initializes all powerdomain and clockdomain target states
251 * and all PRCM settings.
252 * Return: Returns the error code returned by called functions.
253 */
omap4_pm_init(void)254 int __init omap4_pm_init(void)
255 {
256 int ret = 0;
257
258 if (omap_rev() == OMAP4430_REV_ES1_0) {
259 WARN(1, "Power Management not supported on OMAP4430 ES1.0\n");
260 return -ENODEV;
261 }
262
263 pr_info("Power Management for TI OMAP4+ devices.\n");
264
265 /*
266 * OMAP4 chip PM currently works only with certain (newer)
267 * versions of bootloaders. This is due to missing code in the
268 * kernel to properly reset and initialize some devices.
269 * http://www.spinics.net/lists/arm-kernel/msg218641.html
270 */
271 if (cpu_is_omap44xx())
272 pr_warn("OMAP4 PM: u-boot >= v2012.07 is required for full PM support\n");
273
274 ret = pwrdm_for_each(pwrdms_setup, NULL);
275 if (ret) {
276 pr_err("Failed to setup powerdomains.\n");
277 goto err2;
278 }
279
280 if (cpu_is_omap44xx())
281 ret = omap4plus_init_static_deps(omap4_static_dep_map);
282 else if (soc_is_omap54xx() || soc_is_dra7xx())
283 ret = omap4plus_init_static_deps(omap5_dra7_static_dep_map);
284
285 if (ret) {
286 pr_err("Failed to initialise static dependencies.\n");
287 goto err2;
288 }
289
290 ret = omap4_mpuss_init();
291 if (ret) {
292 pr_err("Failed to initialise OMAP4 MPUSS\n");
293 goto err2;
294 }
295
296 (void) clkdm_for_each(omap_pm_clkdms_setup, NULL);
297
298 omap_common_suspend_init(omap4_pm_suspend);
299
300 /* Overwrite the default cpu_do_idle() */
301 arm_pm_idle = omap_default_idle;
302
303 if (cpu_is_omap44xx() || soc_is_omap54xx())
304 omap4_idle_init();
305
306 err2:
307 return ret;
308 }
309
