1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _IQ81340_H_ 3 #define _IQ81340_H_ 4 5 #define IQ81340_PCE_BAR0 IOP13XX_PBI_LOWER_MEM_RA 6 #define IQ81340_PCE_BAR1 (IQ81340_PCE_BAR0 + 0x02000000) 7 8 #define IQ81340_FLASHBASE IQ81340_PCE_BAR0 /* Flash */ 9 10 #define IQ81340_PCE_BAR1_OFFSET(a) (IQ81340_PCE_BAR1 + (a)) 11 12 #define IQ81340_PRD_CODE IQ81340_PCE_BAR1_OFFSET(0) 13 #define IQ81340_BRD_STEP IQ81340_PCE_BAR1_OFFSET(0x10000) 14 #define IQ81340_CPLD_REV IQ81340_PCE_BAR1_OFFSET(0x20000) 15 #define IQ81340_LED IQ81340_PCE_BAR1_OFFSET(0x30000) 16 #define IQ81340_LHEX IQ81340_PCE_BAR1_OFFSET(0x40000) 17 #define IQ81340_RHEX IQ81340_PCE_BAR1_OFFSET(0x50000) 18 #define IQ81340_BUZZER IQ81340_PCE_BAR1_OFFSET(0x60000) 19 #define IQ81340_32K_NVRAM IQ81340_PCE_BAR1_OFFSET(0x70000) 20 #define IQ81340_256K_NVRAM IQ81340_PCE_BAR1_OFFSET(0x80000) 21 #define IQ81340_ROTARY_SW IQ81340_PCE_BAR1_OFFSET(0xd0000) 22 #define IQ81340_BATT_STAT IQ81340_PCE_BAR1_OFFSET(0xf0000) 23 #define IQ81340_CMP_FLSH IQ81340_PCE_BAR1_OFFSET(0x1000000) /* 16MB */ 24 25 #define PBI_CF_IDE_BASE (IQ81340_CMP_FLSH) 26 #define PBI_CF_BAR_ADDR (IOP13XX_PBI_BAR1) 27 28 29 #endif /* _IQ81340_H_ */ 30
