1 /*
2 * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15 #include <linux/gpio.h>
16 #include <linux/init.h>
17 #include <linux/interrupt.h>
18 #include <linux/delay.h>
19 #include <linux/platform_device.h>
20 #include <linux/slab.h>
21 #include <linux/types.h>
22
23 #include <linux/usb/otg.h>
24
25 #include "board-mx31moboard.h"
26 #include "common.h"
27 #include "devices-imx31.h"
28 #include "ehci.h"
29 #include "hardware.h"
30 #include "iomux-mx3.h"
31 #include "ulpi.h"
32
33 static unsigned int devboard_pins[] = {
34 /* UART1 */
35 MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
36 MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
37 /* SDHC2 */
38 MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2,
39 MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
40 MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
41 MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
42 /* USB H1 */
43 MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
44 MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP,
45 MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
46 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
47 MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
48 /* SEL */
49 MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
50 MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
51 };
52
53 static const struct imxuart_platform_data uart_pdata __initconst = {
54 .flags = IMXUART_HAVE_RTSCTS,
55 };
56
57 #define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
58 #define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW)
59
devboard_sdhc2_get_ro(struct device * dev)60 static int devboard_sdhc2_get_ro(struct device *dev)
61 {
62 return !gpio_get_value(SDHC2_WP);
63 }
64
devboard_sdhc2_init(struct device * dev,irq_handler_t detect_irq,void * data)65 static int devboard_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
66 void *data)
67 {
68 int ret;
69
70 ret = gpio_request(SDHC2_CD, "sdhc-detect");
71 if (ret)
72 return ret;
73
74 gpio_direction_input(SDHC2_CD);
75
76 ret = gpio_request(SDHC2_WP, "sdhc-wp");
77 if (ret)
78 goto err_gpio_free;
79 gpio_direction_input(SDHC2_WP);
80
81 ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq,
82 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
83 "sdhc2-card-detect", data);
84 if (ret)
85 goto err_gpio_free_2;
86
87 return 0;
88
89 err_gpio_free_2:
90 gpio_free(SDHC2_WP);
91 err_gpio_free:
92 gpio_free(SDHC2_CD);
93
94 return ret;
95 }
96
devboard_sdhc2_exit(struct device * dev,void * data)97 static void devboard_sdhc2_exit(struct device *dev, void *data)
98 {
99 free_irq(gpio_to_irq(SDHC2_CD), data);
100 gpio_free(SDHC2_WP);
101 gpio_free(SDHC2_CD);
102 }
103
104 static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
105 .get_ro = devboard_sdhc2_get_ro,
106 .init = devboard_sdhc2_init,
107 .exit = devboard_sdhc2_exit,
108 };
109
110 #define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
111 #define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
112 #define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
113 #define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
114
devboard_init_sel_gpios(void)115 static void devboard_init_sel_gpios(void)
116 {
117 if (!gpio_request(SEL0, "sel0")) {
118 gpio_direction_input(SEL0);
119 gpio_export(SEL0, true);
120 }
121
122 if (!gpio_request(SEL1, "sel1")) {
123 gpio_direction_input(SEL1);
124 gpio_export(SEL1, true);
125 }
126
127 if (!gpio_request(SEL2, "sel2")) {
128 gpio_direction_input(SEL2);
129 gpio_export(SEL2, true);
130 }
131
132 if (!gpio_request(SEL3, "sel3")) {
133 gpio_direction_input(SEL3);
134 gpio_export(SEL3, true);
135 }
136 }
137 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
138 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
139
devboard_usbh1_hw_init(struct platform_device * pdev)140 static int devboard_usbh1_hw_init(struct platform_device *pdev)
141 {
142 mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
143
144 mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
145 mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
146 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
147 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
148 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
149 mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
150 mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
151 mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG);
152
153 mdelay(10);
154
155 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
156 MXC_EHCI_INTERFACE_SINGLE_UNI);
157 }
158
159 #define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
160 #define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE)
161
devboard_isp1105_init(struct usb_phy * otg)162 static int devboard_isp1105_init(struct usb_phy *otg)
163 {
164 int ret = gpio_request(USBH1_MODE, "usbh1-mode");
165 if (ret)
166 return ret;
167 /* single ended */
168 gpio_direction_output(USBH1_MODE, 0);
169
170 ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen");
171 if (ret) {
172 gpio_free(USBH1_MODE);
173 return ret;
174 }
175 gpio_direction_output(USBH1_VBUSEN_B, 1);
176
177 return 0;
178 }
179
180
devboard_isp1105_set_vbus(struct usb_otg * otg,bool on)181 static int devboard_isp1105_set_vbus(struct usb_otg *otg, bool on)
182 {
183 if (on)
184 gpio_set_value(USBH1_VBUSEN_B, 0);
185 else
186 gpio_set_value(USBH1_VBUSEN_B, 1);
187
188 return 0;
189 }
190
191 static struct mxc_usbh_platform_data usbh1_pdata __initdata = {
192 .init = devboard_usbh1_hw_init,
193 .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
194 };
195
devboard_usbh1_init(void)196 static int __init devboard_usbh1_init(void)
197 {
198 struct usb_phy *phy;
199 struct platform_device *pdev;
200
201 phy = kzalloc(sizeof(*phy), GFP_KERNEL);
202 if (!phy)
203 return -ENOMEM;
204
205 phy->otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
206 if (!phy->otg) {
207 kfree(phy);
208 return -ENOMEM;
209 }
210
211 phy->label = "ISP1105";
212 phy->init = devboard_isp1105_init;
213 phy->otg->set_vbus = devboard_isp1105_set_vbus;
214
215 usbh1_pdata.otg = phy;
216
217 pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
218
219 return PTR_ERR_OR_ZERO(pdev);
220 }
221
222
223 static const struct fsl_usb2_platform_data usb_pdata __initconst = {
224 .operating_mode = FSL_USB2_DR_DEVICE,
225 .phy_mode = FSL_USB2_PHY_ULPI,
226 };
227
228 /*
229 * system init for baseboard usage. Will be called by mx31moboard init.
230 */
mx31moboard_devboard_init(void)231 void __init mx31moboard_devboard_init(void)
232 {
233 printk(KERN_INFO "Initializing mx31devboard peripherals\n");
234
235 mxc_iomux_setup_multiple_pins(devboard_pins, ARRAY_SIZE(devboard_pins),
236 "devboard");
237
238 imx31_add_imx_uart1(&uart_pdata);
239
240 imx31_add_mxc_mmc(1, &sdhc2_pdata);
241
242 devboard_init_sel_gpios();
243
244 imx31_add_fsl_usb2_udc(&usb_pdata);
245
246 devboard_usbh1_init();
247 }
248
