1 /*
2 * Copyright (C) 2000 Deep Blue Solutions Ltd
3 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
4 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
5 * Copyright (C) 2009 Daniel Mack <daniel@caiaq.de>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18 #include <linux/types.h>
19 #include <linux/init.h>
20 #include <linux/kernel.h>
21 #include <linux/memory.h>
22 #include <linux/platform_device.h>
23 #include <linux/gpio.h>
24 #include <linux/moduleparam.h>
25 #include <linux/smsc911x.h>
26 #include <linux/mfd/mc13783.h>
27 #include <linux/spi/spi.h>
28 #include <linux/usb/otg.h>
29 #include <linux/usb/ulpi.h>
30 #include <linux/mtd/physmap.h>
31 #include <linux/delay.h>
32 #include <linux/regulator/machine.h>
33 #include <linux/regulator/fixed.h>
34
35 #include <asm/mach-types.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/time.h>
38 #include <asm/mach/map.h>
39 #include <asm/page.h>
40 #include <asm/setup.h>
41
42 #include "board-mx31lite.h"
43 #include "common.h"
44 #include "devices-imx31.h"
45 #include "ehci.h"
46 #include "hardware.h"
47 #include "iomux-mx3.h"
48 #include "ulpi.h"
49
50 /*
51 * This file contains the module-specific initialization routines.
52 */
53
54 static unsigned int mx31lite_pins[] = {
55 /* UART1 */
56 MX31_PIN_CTS1__CTS1,
57 MX31_PIN_RTS1__RTS1,
58 MX31_PIN_TXD1__TXD1,
59 MX31_PIN_RXD1__RXD1,
60 /* SPI 0 */
61 MX31_PIN_CSPI1_SCLK__SCLK,
62 MX31_PIN_CSPI1_MOSI__MOSI,
63 MX31_PIN_CSPI1_MISO__MISO,
64 MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
65 MX31_PIN_CSPI1_SS0__SS0,
66 MX31_PIN_CSPI1_SS1__SS1,
67 MX31_PIN_CSPI1_SS2__SS2,
68 /* LAN9117 IRQ pin */
69 IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO),
70 /* SPI 1 */
71 MX31_PIN_CSPI2_SCLK__SCLK,
72 MX31_PIN_CSPI2_MOSI__MOSI,
73 MX31_PIN_CSPI2_MISO__MISO,
74 MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
75 MX31_PIN_CSPI2_SS0__SS0,
76 MX31_PIN_CSPI2_SS1__SS1,
77 MX31_PIN_CSPI2_SS2__SS2,
78 };
79
80 /* UART */
81 static const struct imxuart_platform_data uart_pdata __initconst = {
82 .flags = IMXUART_HAVE_RTSCTS,
83 };
84
85 /* SPI */
86 static const struct spi_imx_master spi0_pdata __initconst = {
87 .num_chipselect = 3,
88 };
89
90 static const struct mxc_nand_platform_data
91 mx31lite_nand_board_info __initconst = {
92 .width = 1,
93 .hw_ecc = 1,
94 };
95
96 static struct smsc911x_platform_config smsc911x_config = {
97 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
98 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
99 .flags = SMSC911X_USE_16BIT,
100 };
101
102 static struct resource smsc911x_resources[] = {
103 {
104 .start = MX31_CS4_BASE_ADDR,
105 .end = MX31_CS4_BASE_ADDR + 0x100,
106 .flags = IORESOURCE_MEM,
107 }, {
108 /* irq number is run-time assigned */
109 .flags = IORESOURCE_IRQ,
110 },
111 };
112
113 static struct platform_device smsc911x_device = {
114 .name = "smsc911x",
115 .id = -1,
116 .num_resources = ARRAY_SIZE(smsc911x_resources),
117 .resource = smsc911x_resources,
118 .dev = {
119 .platform_data = &smsc911x_config,
120 },
121 };
122
123 /*
124 * SPI
125 *
126 * The MC13783 is the only hard-wired SPI device on the module.
127 */
128
129 static const struct spi_imx_master spi1_pdata __initconst = {
130 .num_chipselect = 1,
131 };
132
133 static struct mc13xxx_platform_data mc13783_pdata __initdata = {
134 .flags = MC13XXX_USE_RTC,
135 };
136
137 static struct spi_board_info mc13783_spi_dev __initdata = {
138 .modalias = "mc13783",
139 .max_speed_hz = 1000000,
140 .bus_num = 1,
141 .chip_select = 0,
142 .platform_data = &mc13783_pdata,
143 /* irq number is run-time assigned */
144 };
145
146 /*
147 * USB
148 */
149
150 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
151 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
152
usbh2_init(struct platform_device * pdev)153 static int usbh2_init(struct platform_device *pdev)
154 {
155 int pins[] = {
156 MX31_PIN_USBH2_DATA0__USBH2_DATA0,
157 MX31_PIN_USBH2_DATA1__USBH2_DATA1,
158 MX31_PIN_USBH2_CLK__USBH2_CLK,
159 MX31_PIN_USBH2_DIR__USBH2_DIR,
160 MX31_PIN_USBH2_NXT__USBH2_NXT,
161 MX31_PIN_USBH2_STP__USBH2_STP,
162 };
163
164 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
165
166 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
167 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
168 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
169 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
170 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
171 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
172 mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
173 mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
174 mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
175 mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
176 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
177 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
178
179 mxc_iomux_set_gpr(MUX_PGP_UH2, true);
180
181 /* chip select */
182 mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
183 "USBH2_CS");
184 gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
185 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
186
187 mdelay(10);
188
189 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
190 }
191
192 static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
193 .init = usbh2_init,
194 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
195 };
196
197 /*
198 * NOR flash
199 */
200
201 static struct physmap_flash_data nor_flash_data = {
202 .width = 2,
203 };
204
205 static struct resource nor_flash_resource = {
206 .start = 0xa0000000,
207 .end = 0xa1ffffff,
208 .flags = IORESOURCE_MEM,
209 };
210
211 static struct platform_device physmap_flash_device = {
212 .name = "physmap-flash",
213 .id = 0,
214 .dev = {
215 .platform_data = &nor_flash_data,
216 },
217 .resource = &nor_flash_resource,
218 .num_resources = 1,
219 };
220
221 /*
222 * This structure defines the MX31 memory map.
223 */
224 static struct map_desc mx31lite_io_desc[] __initdata = {
225 {
226 .virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
227 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
228 .length = MX31_CS4_SIZE,
229 .type = MT_DEVICE
230 }
231 };
232
233 /*
234 * Set up static virtual mappings.
235 */
mx31lite_map_io(void)236 static void __init mx31lite_map_io(void)
237 {
238 mx31_map_io();
239 iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc));
240 }
241
242 static int mx31lite_baseboard;
243 core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444);
244
245 static struct regulator_consumer_supply dummy_supplies[] = {
246 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
247 REGULATOR_SUPPLY("vddvario", "smsc911x"),
248 };
249
mx31lite_init(void)250 static void __init mx31lite_init(void)
251 {
252 imx31_soc_init();
253
254 mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins),
255 "mx31lite");
256
257 imx31_add_imx_uart0(&uart_pdata);
258 imx31_add_spi_imx0(&spi0_pdata);
259
260 /* NOR and NAND flash */
261 platform_device_register(&physmap_flash_device);
262 imx31_add_mxc_nand(&mx31lite_nand_board_info);
263
264 imx31_add_spi_imx1(&spi1_pdata);
265
266 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
267 }
268
mx31lite_late(void)269 static void __init mx31lite_late(void)
270 {
271 int ret;
272
273 if (mx31lite_baseboard == MX31LITE_DB)
274 mx31lite_db_init();
275
276 mc13783_spi_dev.irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
277 spi_register_board_info(&mc13783_spi_dev, 1);
278
279 /* USB */
280 usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
281 ULPI_OTG_DRVVBUS_EXT);
282 if (usbh2_pdata.otg)
283 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
284
285 /* SMSC9117 IRQ pin */
286 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
287 if (ret)
288 pr_warn("could not get LAN irq gpio\n");
289 else {
290 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_SFS6));
291 smsc911x_resources[1].start =
292 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SFS6));
293 smsc911x_resources[1].end =
294 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SFS6));
295 platform_device_register(&smsc911x_device);
296 }
297 }
298
mx31lite_timer_init(void)299 static void __init mx31lite_timer_init(void)
300 {
301 mx31_clocks_init(26000000);
302 }
303
304 MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
305 /* Maintainer: Freescale Semiconductor, Inc. */
306 .atag_offset = 0x100,
307 .map_io = mx31lite_map_io,
308 .init_early = imx31_init_early,
309 .init_irq = mx31_init_irq,
310 .init_time = mx31lite_timer_init,
311 .init_machine = mx31lite_init,
312 .init_late = mx31lite_late,
313 .restart = mxc_restart,
314 MACHINE_END
315
