1 /*
2 * TI DaVinci DM646X EVM board
3 *
4 * Derived from: arch/arm/mach-davinci/board-evm.c
5 * Copyright (C) 2006 Texas Instruments.
6 *
7 * (C) 2007-2008, MontaVista Software, Inc.
8 *
9 * This file is licensed under the terms of the GNU General Public License
10 * version 2. This program is licensed "as is" without any warranty of any
11 * kind, whether express or implied.
12 *
13 */
14
15 /**************************************************************************
16 * Included Files
17 **************************************************************************/
18
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/leds.h>
22 #include <linux/gpio.h>
23 #include <linux/platform_device.h>
24 #include <linux/i2c.h>
25 #include <linux/platform_data/at24.h>
26 #include <linux/platform_data/pcf857x.h>
27 #include <linux/platform_data/ti-aemif.h>
28
29 #include <media/i2c/tvp514x.h>
30 #include <media/i2c/adv7343.h>
31
32 #include <linux/mtd/mtd.h>
33 #include <linux/mtd/rawnand.h>
34 #include <linux/mtd/partitions.h>
35 #include <linux/clk.h>
36 #include <linux/export.h>
37 #include <linux/platform_data/gpio-davinci.h>
38 #include <linux/platform_data/i2c-davinci.h>
39 #include <linux/platform_data/mtd-davinci.h>
40 #include <linux/platform_data/mtd-davinci-aemif.h>
41
42 #include <asm/mach-types.h>
43 #include <asm/mach/arch.h>
44
45 #include <mach/common.h>
46 #include <mach/irqs.h>
47 #include <mach/serial.h>
48
49 #include "davinci.h"
50
51 #define NAND_BLOCK_SIZE SZ_128K
52
53 /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
54 * and U-Boot environment this avoids dependency on any particular combination
55 * of UBL, U-Boot or flashing tools etc.
56 */
57 static struct mtd_partition davinci_nand_partitions[] = {
58 {
59 /* UBL, U-Boot with environment */
60 .name = "bootloader",
61 .offset = MTDPART_OFS_APPEND,
62 .size = 16 * NAND_BLOCK_SIZE,
63 .mask_flags = MTD_WRITEABLE, /* force read-only */
64 }, {
65 .name = "kernel",
66 .offset = MTDPART_OFS_APPEND,
67 .size = SZ_4M,
68 .mask_flags = 0,
69 }, {
70 .name = "filesystem",
71 .offset = MTDPART_OFS_APPEND,
72 .size = MTDPART_SIZ_FULL,
73 .mask_flags = 0,
74 }
75 };
76
77 static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
78 .wsetup = 29,
79 .wstrobe = 24,
80 .whold = 14,
81 .rsetup = 19,
82 .rstrobe = 33,
83 .rhold = 0,
84 .ta = 29,
85 };
86
87 static struct davinci_nand_pdata davinci_nand_data = {
88 .core_chipsel = 0,
89 .mask_cle = 0x80000,
90 .mask_ale = 0x40000,
91 .parts = davinci_nand_partitions,
92 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
93 .ecc_mode = NAND_ECC_HW,
94 .ecc_bits = 1,
95 .options = 0,
96 };
97
98 static struct resource davinci_nand_resources[] = {
99 {
100 .start = DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
101 .end = DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
102 .flags = IORESOURCE_MEM,
103 }, {
104 .start = DM646X_ASYNC_EMIF_CONTROL_BASE,
105 .end = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
106 .flags = IORESOURCE_MEM,
107 },
108 };
109
110 static struct platform_device davinci_aemif_devices[] = {
111 {
112 .name = "davinci_nand",
113 .id = 0,
114 .num_resources = ARRAY_SIZE(davinci_nand_resources),
115 .resource = davinci_nand_resources,
116 .dev = {
117 .platform_data = &davinci_nand_data,
118 },
119 },
120 };
121
122 static struct resource davinci_aemif_resources[] = {
123 {
124 .start = DM646X_ASYNC_EMIF_CONTROL_BASE,
125 .end = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
126 .flags = IORESOURCE_MEM,
127 },
128 };
129
130 static struct aemif_abus_data davinci_aemif_abus_data[] = {
131 {
132 .cs = 1,
133 },
134 };
135
136 static struct aemif_platform_data davinci_aemif_pdata = {
137 .abus_data = davinci_aemif_abus_data,
138 .num_abus_data = ARRAY_SIZE(davinci_aemif_abus_data),
139 .sub_devices = davinci_aemif_devices,
140 .num_sub_devices = ARRAY_SIZE(davinci_aemif_devices),
141 };
142
143 static struct platform_device davinci_aemif_device = {
144 .name = "ti-aemif",
145 .id = -1,
146 .dev = {
147 .platform_data = &davinci_aemif_pdata,
148 },
149 .resource = davinci_aemif_resources,
150 .num_resources = ARRAY_SIZE(davinci_aemif_resources),
151 };
152
153 #define HAS_ATA (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
154 IS_ENABLED(CONFIG_PATA_BK3710))
155
156 #ifdef CONFIG_I2C
157 /* CPLD Register 0 bits to control ATA */
158 #define DM646X_EVM_ATA_RST BIT(0)
159 #define DM646X_EVM_ATA_PWD BIT(1)
160
161 /* CPLD Register 0 Client: used for I/O Control */
cpld_reg0_probe(struct i2c_client * client,const struct i2c_device_id * id)162 static int cpld_reg0_probe(struct i2c_client *client,
163 const struct i2c_device_id *id)
164 {
165 if (HAS_ATA) {
166 u8 data;
167 struct i2c_msg msg[2] = {
168 {
169 .addr = client->addr,
170 .flags = I2C_M_RD,
171 .len = 1,
172 .buf = &data,
173 },
174 {
175 .addr = client->addr,
176 .flags = 0,
177 .len = 1,
178 .buf = &data,
179 },
180 };
181
182 /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
183 i2c_transfer(client->adapter, msg, 1);
184 data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
185 i2c_transfer(client->adapter, msg + 1, 1);
186 }
187
188 return 0;
189 }
190
191 static const struct i2c_device_id cpld_reg_ids[] = {
192 { "cpld_reg0", 0, },
193 { },
194 };
195
196 static struct i2c_driver dm6467evm_cpld_driver = {
197 .driver.name = "cpld_reg0",
198 .id_table = cpld_reg_ids,
199 .probe = cpld_reg0_probe,
200 };
201
202 /* LEDS */
203
204 static struct gpio_led evm_leds[] = {
205 { .name = "DS1", .active_low = 1, },
206 { .name = "DS2", .active_low = 1, },
207 { .name = "DS3", .active_low = 1, },
208 { .name = "DS4", .active_low = 1, },
209 };
210
211 static const struct gpio_led_platform_data evm_led_data = {
212 .num_leds = ARRAY_SIZE(evm_leds),
213 .leds = evm_leds,
214 };
215
216 static struct platform_device *evm_led_dev;
217
evm_led_setup(struct i2c_client * client,int gpio,unsigned int ngpio,void * c)218 static int evm_led_setup(struct i2c_client *client, int gpio,
219 unsigned int ngpio, void *c)
220 {
221 struct gpio_led *leds = evm_leds;
222 int status;
223
224 while (ngpio--) {
225 leds->gpio = gpio++;
226 leds++;
227 }
228
229 evm_led_dev = platform_device_alloc("leds-gpio", 0);
230 platform_device_add_data(evm_led_dev, &evm_led_data,
231 sizeof(evm_led_data));
232
233 evm_led_dev->dev.parent = &client->dev;
234 status = platform_device_add(evm_led_dev);
235 if (status < 0) {
236 platform_device_put(evm_led_dev);
237 evm_led_dev = NULL;
238 }
239 return status;
240 }
241
evm_led_teardown(struct i2c_client * client,int gpio,unsigned ngpio,void * c)242 static int evm_led_teardown(struct i2c_client *client, int gpio,
243 unsigned ngpio, void *c)
244 {
245 if (evm_led_dev) {
246 platform_device_unregister(evm_led_dev);
247 evm_led_dev = NULL;
248 }
249 return 0;
250 }
251
252 static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
253
evm_sw_setup(struct i2c_client * client,int gpio,unsigned ngpio,void * c)254 static int evm_sw_setup(struct i2c_client *client, int gpio,
255 unsigned ngpio, void *c)
256 {
257 int status;
258 int i;
259 char label[10];
260
261 for (i = 0; i < 4; ++i) {
262 snprintf(label, 10, "user_sw%d", i);
263 status = gpio_request(gpio, label);
264 if (status)
265 goto out_free;
266 evm_sw_gpio[i] = gpio++;
267
268 status = gpio_direction_input(evm_sw_gpio[i]);
269 if (status) {
270 gpio_free(evm_sw_gpio[i]);
271 evm_sw_gpio[i] = -EINVAL;
272 goto out_free;
273 }
274
275 status = gpio_export(evm_sw_gpio[i], 0);
276 if (status) {
277 gpio_free(evm_sw_gpio[i]);
278 evm_sw_gpio[i] = -EINVAL;
279 goto out_free;
280 }
281 }
282 return status;
283 out_free:
284 for (i = 0; i < 4; ++i) {
285 if (evm_sw_gpio[i] != -EINVAL) {
286 gpio_free(evm_sw_gpio[i]);
287 evm_sw_gpio[i] = -EINVAL;
288 }
289 }
290 return status;
291 }
292
evm_sw_teardown(struct i2c_client * client,int gpio,unsigned ngpio,void * c)293 static int evm_sw_teardown(struct i2c_client *client, int gpio,
294 unsigned ngpio, void *c)
295 {
296 int i;
297
298 for (i = 0; i < 4; ++i) {
299 if (evm_sw_gpio[i] != -EINVAL) {
300 gpio_unexport(evm_sw_gpio[i]);
301 gpio_free(evm_sw_gpio[i]);
302 evm_sw_gpio[i] = -EINVAL;
303 }
304 }
305 return 0;
306 }
307
evm_pcf_setup(struct i2c_client * client,int gpio,unsigned int ngpio,void * c)308 static int evm_pcf_setup(struct i2c_client *client, int gpio,
309 unsigned int ngpio, void *c)
310 {
311 int status;
312
313 if (ngpio < 8)
314 return -EINVAL;
315
316 status = evm_sw_setup(client, gpio, 4, c);
317 if (status)
318 return status;
319
320 return evm_led_setup(client, gpio+4, 4, c);
321 }
322
evm_pcf_teardown(struct i2c_client * client,int gpio,unsigned int ngpio,void * c)323 static int evm_pcf_teardown(struct i2c_client *client, int gpio,
324 unsigned int ngpio, void *c)
325 {
326 BUG_ON(ngpio < 8);
327
328 evm_sw_teardown(client, gpio, 4, c);
329 evm_led_teardown(client, gpio+4, 4, c);
330
331 return 0;
332 }
333
334 static struct pcf857x_platform_data pcf_data = {
335 .gpio_base = DAVINCI_N_GPIO+1,
336 .setup = evm_pcf_setup,
337 .teardown = evm_pcf_teardown,
338 };
339
340 /* Most of this EEPROM is unused, but U-Boot uses some data:
341 * - 0x7f00, 6 bytes Ethernet Address
342 * - ... newer boards may have more
343 */
344
345 static struct at24_platform_data eeprom_info = {
346 .byte_len = (256*1024) / 8,
347 .page_size = 64,
348 .flags = AT24_FLAG_ADDR16,
349 .setup = davinci_get_mac_addr,
350 .context = (void *)0x7f00,
351 };
352 #endif
353
354 static u8 dm646x_iis_serializer_direction[] = {
355 TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
356 };
357
358 static u8 dm646x_dit_serializer_direction[] = {
359 TX_MODE,
360 };
361
362 static struct snd_platform_data dm646x_evm_snd_data[] = {
363 {
364 .tx_dma_offset = 0x400,
365 .rx_dma_offset = 0x400,
366 .op_mode = DAVINCI_MCASP_IIS_MODE,
367 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
368 .tdm_slots = 2,
369 .serial_dir = dm646x_iis_serializer_direction,
370 .asp_chan_q = EVENTQ_0,
371 },
372 {
373 .tx_dma_offset = 0x400,
374 .rx_dma_offset = 0,
375 .op_mode = DAVINCI_MCASP_DIT_MODE,
376 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
377 .tdm_slots = 32,
378 .serial_dir = dm646x_dit_serializer_direction,
379 .asp_chan_q = EVENTQ_0,
380 },
381 };
382
383 #ifdef CONFIG_I2C
384 static struct i2c_client *cpld_client;
385
cpld_video_probe(struct i2c_client * client,const struct i2c_device_id * id)386 static int cpld_video_probe(struct i2c_client *client,
387 const struct i2c_device_id *id)
388 {
389 cpld_client = client;
390 return 0;
391 }
392
cpld_video_remove(struct i2c_client * client)393 static int cpld_video_remove(struct i2c_client *client)
394 {
395 cpld_client = NULL;
396 return 0;
397 }
398
399 static const struct i2c_device_id cpld_video_id[] = {
400 { "cpld_video", 0 },
401 { }
402 };
403
404 static struct i2c_driver cpld_video_driver = {
405 .driver = {
406 .name = "cpld_video",
407 },
408 .probe = cpld_video_probe,
409 .remove = cpld_video_remove,
410 .id_table = cpld_video_id,
411 };
412
evm_init_cpld(void)413 static void evm_init_cpld(void)
414 {
415 i2c_add_driver(&cpld_video_driver);
416 }
417
418 static struct i2c_board_info __initdata i2c_info[] = {
419 {
420 I2C_BOARD_INFO("24c256", 0x50),
421 .platform_data = &eeprom_info,
422 },
423 {
424 I2C_BOARD_INFO("pcf8574a", 0x38),
425 .platform_data = &pcf_data,
426 },
427 {
428 I2C_BOARD_INFO("cpld_reg0", 0x3a),
429 },
430 {
431 I2C_BOARD_INFO("tlv320aic33", 0x18),
432 },
433 {
434 I2C_BOARD_INFO("cpld_video", 0x3b),
435 },
436 };
437
438 static struct davinci_i2c_platform_data i2c_pdata = {
439 .bus_freq = 100 /* kHz */,
440 .bus_delay = 0 /* usec */,
441 };
442
443 #define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
444 #define VCH2CLK_SYSCLK8 (BIT(9))
445 #define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
446 #define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
447 #define VCH3CLK_SYSCLK8 (BIT(13))
448 #define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
449
450 #define VIDCH2CLK (BIT(10))
451 #define VIDCH3CLK (BIT(11))
452 #define VIDCH1CLK (BIT(4))
453 #define TVP7002_INPUT (BIT(4))
454 #define TVP5147_INPUT (~BIT(4))
455 #define VPIF_INPUT_ONE_CHANNEL (BIT(5))
456 #define VPIF_INPUT_TWO_CHANNEL (~BIT(5))
457 #define TVP5147_CH0 "tvp514x-0"
458 #define TVP5147_CH1 "tvp514x-1"
459
460 /* spin lock for updating above registers */
461 static spinlock_t vpif_reg_lock;
462
set_vpif_clock(int mux_mode,int hd)463 static int set_vpif_clock(int mux_mode, int hd)
464 {
465 unsigned long flags;
466 unsigned int value;
467 int val = 0;
468 int err = 0;
469
470 if (!cpld_client)
471 return -ENXIO;
472
473 /* disable the clock */
474 spin_lock_irqsave(&vpif_reg_lock, flags);
475 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
476 value |= (VIDCH3CLK | VIDCH2CLK);
477 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
478 spin_unlock_irqrestore(&vpif_reg_lock, flags);
479
480 val = i2c_smbus_read_byte(cpld_client);
481 if (val < 0)
482 return val;
483
484 if (mux_mode == 1)
485 val &= ~0x40;
486 else
487 val |= 0x40;
488
489 err = i2c_smbus_write_byte(cpld_client, val);
490 if (err)
491 return err;
492
493 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
494 value &= ~(VCH2CLK_MASK);
495 value &= ~(VCH3CLK_MASK);
496
497 if (hd >= 1)
498 value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
499 else
500 value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
501
502 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
503
504 spin_lock_irqsave(&vpif_reg_lock, flags);
505 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
506 /* enable the clock */
507 value &= ~(VIDCH3CLK | VIDCH2CLK);
508 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
509 spin_unlock_irqrestore(&vpif_reg_lock, flags);
510
511 return 0;
512 }
513
514 static struct vpif_subdev_info dm646x_vpif_subdev[] = {
515 {
516 .name = "adv7343",
517 .board_info = {
518 I2C_BOARD_INFO("adv7343", 0x2a),
519 },
520 },
521 {
522 .name = "ths7303",
523 .board_info = {
524 I2C_BOARD_INFO("ths7303", 0x2c),
525 },
526 },
527 };
528
529 static const struct vpif_output dm6467_ch0_outputs[] = {
530 {
531 .output = {
532 .index = 0,
533 .name = "Composite",
534 .type = V4L2_OUTPUT_TYPE_ANALOG,
535 .capabilities = V4L2_OUT_CAP_STD,
536 .std = V4L2_STD_ALL,
537 },
538 .subdev_name = "adv7343",
539 .output_route = ADV7343_COMPOSITE_ID,
540 },
541 {
542 .output = {
543 .index = 1,
544 .name = "Component",
545 .type = V4L2_OUTPUT_TYPE_ANALOG,
546 .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
547 },
548 .subdev_name = "adv7343",
549 .output_route = ADV7343_COMPONENT_ID,
550 },
551 {
552 .output = {
553 .index = 2,
554 .name = "S-Video",
555 .type = V4L2_OUTPUT_TYPE_ANALOG,
556 .capabilities = V4L2_OUT_CAP_STD,
557 .std = V4L2_STD_ALL,
558 },
559 .subdev_name = "adv7343",
560 .output_route = ADV7343_SVIDEO_ID,
561 },
562 };
563
564 static struct vpif_display_config dm646x_vpif_display_config = {
565 .set_clock = set_vpif_clock,
566 .subdevinfo = dm646x_vpif_subdev,
567 .subdev_count = ARRAY_SIZE(dm646x_vpif_subdev),
568 .i2c_adapter_id = 1,
569 .chan_config[0] = {
570 .outputs = dm6467_ch0_outputs,
571 .output_count = ARRAY_SIZE(dm6467_ch0_outputs),
572 },
573 .card_name = "DM646x EVM Video Display",
574 };
575
576 /**
577 * setup_vpif_input_path()
578 * @channel: channel id (0 - CH0, 1 - CH1)
579 * @sub_dev_name: ptr sub device name
580 *
581 * This will set vpif input to capture data from tvp514x or
582 * tvp7002.
583 */
setup_vpif_input_path(int channel,const char * sub_dev_name)584 static int setup_vpif_input_path(int channel, const char *sub_dev_name)
585 {
586 int err = 0;
587 int val;
588
589 /* for channel 1, we don't do anything */
590 if (channel != 0)
591 return 0;
592
593 if (!cpld_client)
594 return -ENXIO;
595
596 val = i2c_smbus_read_byte(cpld_client);
597 if (val < 0)
598 return val;
599
600 if (!strcmp(sub_dev_name, TVP5147_CH0) ||
601 !strcmp(sub_dev_name, TVP5147_CH1))
602 val &= TVP5147_INPUT;
603 else
604 val |= TVP7002_INPUT;
605
606 err = i2c_smbus_write_byte(cpld_client, val);
607 if (err)
608 return err;
609 return 0;
610 }
611
612 /**
613 * setup_vpif_input_channel_mode()
614 * @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel
615 *
616 * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
617 */
setup_vpif_input_channel_mode(int mux_mode)618 static int setup_vpif_input_channel_mode(int mux_mode)
619 {
620 unsigned long flags;
621 int err = 0;
622 int val;
623 u32 value;
624
625 if (!cpld_client)
626 return -ENXIO;
627
628 val = i2c_smbus_read_byte(cpld_client);
629 if (val < 0)
630 return val;
631
632 spin_lock_irqsave(&vpif_reg_lock, flags);
633 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
634 if (mux_mode) {
635 val &= VPIF_INPUT_TWO_CHANNEL;
636 value |= VIDCH1CLK;
637 } else {
638 val |= VPIF_INPUT_ONE_CHANNEL;
639 value &= ~VIDCH1CLK;
640 }
641 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
642 spin_unlock_irqrestore(&vpif_reg_lock, flags);
643
644 err = i2c_smbus_write_byte(cpld_client, val);
645 if (err)
646 return err;
647
648 return 0;
649 }
650
651 static struct tvp514x_platform_data tvp5146_pdata = {
652 .clk_polarity = 0,
653 .hs_polarity = 1,
654 .vs_polarity = 1
655 };
656
657 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
658
659 static struct vpif_subdev_info vpif_capture_sdev_info[] = {
660 {
661 .name = TVP5147_CH0,
662 .board_info = {
663 I2C_BOARD_INFO("tvp5146", 0x5d),
664 .platform_data = &tvp5146_pdata,
665 },
666 },
667 {
668 .name = TVP5147_CH1,
669 .board_info = {
670 I2C_BOARD_INFO("tvp5146", 0x5c),
671 .platform_data = &tvp5146_pdata,
672 },
673 },
674 };
675
676 static struct vpif_input dm6467_ch0_inputs[] = {
677 {
678 .input = {
679 .index = 0,
680 .name = "Composite",
681 .type = V4L2_INPUT_TYPE_CAMERA,
682 .capabilities = V4L2_IN_CAP_STD,
683 .std = TVP514X_STD_ALL,
684 },
685 .subdev_name = TVP5147_CH0,
686 .input_route = INPUT_CVBS_VI2B,
687 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
688 },
689 };
690
691 static struct vpif_input dm6467_ch1_inputs[] = {
692 {
693 .input = {
694 .index = 0,
695 .name = "S-Video",
696 .type = V4L2_INPUT_TYPE_CAMERA,
697 .capabilities = V4L2_IN_CAP_STD,
698 .std = TVP514X_STD_ALL,
699 },
700 .subdev_name = TVP5147_CH1,
701 .input_route = INPUT_SVIDEO_VI2C_VI1C,
702 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
703 },
704 };
705
706 static struct vpif_capture_config dm646x_vpif_capture_cfg = {
707 .setup_input_path = setup_vpif_input_path,
708 .setup_input_channel_mode = setup_vpif_input_channel_mode,
709 .subdev_info = vpif_capture_sdev_info,
710 .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
711 .i2c_adapter_id = 1,
712 .chan_config[0] = {
713 .inputs = dm6467_ch0_inputs,
714 .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
715 .vpif_if = {
716 .if_type = VPIF_IF_BT656,
717 .hd_pol = 1,
718 .vd_pol = 1,
719 .fid_pol = 0,
720 },
721 },
722 .chan_config[1] = {
723 .inputs = dm6467_ch1_inputs,
724 .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
725 .vpif_if = {
726 .if_type = VPIF_IF_BT656,
727 .hd_pol = 1,
728 .vd_pol = 1,
729 .fid_pol = 0,
730 },
731 },
732 .card_name = "DM646x EVM Video Capture",
733 };
734
evm_init_video(void)735 static void __init evm_init_video(void)
736 {
737 spin_lock_init(&vpif_reg_lock);
738
739 dm646x_setup_vpif(&dm646x_vpif_display_config,
740 &dm646x_vpif_capture_cfg);
741 }
742
evm_init_i2c(void)743 static void __init evm_init_i2c(void)
744 {
745 davinci_init_i2c(&i2c_pdata);
746 i2c_add_driver(&dm6467evm_cpld_driver);
747 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
748 evm_init_cpld();
749 evm_init_video();
750 }
751 #endif
752
753 #define DM646X_REF_FREQ 27000000
754 #define DM646X_AUX_FREQ 24000000
755 #define DM6467T_EVM_REF_FREQ 33000000
756
davinci_map_io(void)757 static void __init davinci_map_io(void)
758 {
759 dm646x_init();
760 }
761
dm646x_evm_init_time(void)762 static void __init dm646x_evm_init_time(void)
763 {
764 dm646x_init_time(DM646X_REF_FREQ, DM646X_AUX_FREQ);
765 }
766
dm6467t_evm_init_time(void)767 static void __init dm6467t_evm_init_time(void)
768 {
769 dm646x_init_time(DM6467T_EVM_REF_FREQ, DM646X_AUX_FREQ);
770 }
771
772 #define DM646X_EVM_PHY_ID "davinci_mdio-0:01"
773 /*
774 * The following EDMA channels/slots are not being used by drivers (for
775 * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
776 * reserved for codecs on the DSP side.
777 */
778 static const s16 dm646x_dma_rsv_chans[][2] = {
779 /* (offset, number) */
780 { 0, 4},
781 {13, 3},
782 {24, 4},
783 {30, 2},
784 {54, 3},
785 {-1, -1}
786 };
787
788 static const s16 dm646x_dma_rsv_slots[][2] = {
789 /* (offset, number) */
790 { 0, 4},
791 {13, 3},
792 {24, 4},
793 {30, 2},
794 {54, 3},
795 {128, 384},
796 {-1, -1}
797 };
798
799 static struct edma_rsv_info dm646x_edma_rsv[] = {
800 {
801 .rsv_chans = dm646x_dma_rsv_chans,
802 .rsv_slots = dm646x_dma_rsv_slots,
803 },
804 };
805
evm_init(void)806 static __init void evm_init(void)
807 {
808 int ret;
809 struct davinci_soc_info *soc_info = &davinci_soc_info;
810
811 dm646x_register_clocks();
812
813 ret = dm646x_gpio_register();
814 if (ret)
815 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
816
817 #ifdef CONFIG_I2C
818 evm_init_i2c();
819 #endif
820
821 davinci_serial_init(dm646x_serial_device);
822 dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
823 dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
824
825 if (machine_is_davinci_dm6467tevm())
826 davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
827
828 if (platform_device_register(&davinci_aemif_device))
829 pr_warn("%s: Cannot register AEMIF device.\n", __func__);
830
831 dm646x_init_edma(dm646x_edma_rsv);
832
833 if (HAS_ATA)
834 davinci_init_ide();
835
836 soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
837 }
838
839 MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
840 .atag_offset = 0x100,
841 .map_io = davinci_map_io,
842 .init_irq = davinci_irq_init,
843 .init_time = dm646x_evm_init_time,
844 .init_machine = evm_init,
845 .init_late = davinci_init_late,
846 .dma_zone_size = SZ_128M,
847 MACHINE_END
848
849 MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
850 .atag_offset = 0x100,
851 .map_io = davinci_map_io,
852 .init_irq = davinci_irq_init,
853 .init_time = dm6467t_evm_init_time,
854 .init_machine = evm_init,
855 .init_late = davinci_init_late,
856 .dma_zone_size = SZ_128M,
857 MACHINE_END
858
859
