1 /*
2  * TI DA830/OMAP L137 EVM board
3  *
4  * Author: Mark A. Greer <mgreer@mvista.com>
5  * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
6  *
7  * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
8  * the terms of the GNU General Public License version 2. This program
9  * is licensed "as is" without any warranty of any kind, whether express
10  * or implied.
11  */
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/console.h>
15 #include <linux/interrupt.h>
16 #include <linux/gpio.h>
17 #include <linux/gpio/machine.h>
18 #include <linux/platform_device.h>
19 #include <linux/i2c.h>
20 #include <linux/platform_data/pcf857x.h>
21 #include <linux/platform_data/at24.h>
22 #include <linux/mtd/mtd.h>
23 #include <linux/mtd/partitions.h>
24 #include <linux/spi/spi.h>
25 #include <linux/spi/flash.h>
26 #include <linux/platform_data/gpio-davinci.h>
27 #include <linux/platform_data/mtd-davinci.h>
28 #include <linux/platform_data/mtd-davinci-aemif.h>
29 #include <linux/platform_data/spi-davinci.h>
30 #include <linux/platform_data/usb-davinci.h>
31 #include <linux/platform_data/ti-aemif.h>
32 #include <linux/regulator/machine.h>
33 
34 #include <asm/mach-types.h>
35 #include <asm/mach/arch.h>
36 
37 #include <mach/common.h>
38 #include "cp_intc.h"
39 #include <mach/mux.h>
40 #include <mach/da8xx.h>
41 
42 #define DA830_EVM_PHY_ID		""
43 /*
44  * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
45  */
46 #define ON_BD_USB_DRV	GPIO_TO_PIN(1, 15)
47 #define ON_BD_USB_OVC	GPIO_TO_PIN(2, 4)
48 
49 static const short da830_evm_usb11_pins[] = {
50 	DA830_GPIO1_15, DA830_GPIO2_4,
51 	-1
52 };
53 
54 static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
55 
da830_evm_usb_set_power(unsigned port,int on)56 static int da830_evm_usb_set_power(unsigned port, int on)
57 {
58 	gpio_set_value(ON_BD_USB_DRV, on);
59 	return 0;
60 }
61 
da830_evm_usb_get_power(unsigned port)62 static int da830_evm_usb_get_power(unsigned port)
63 {
64 	return gpio_get_value(ON_BD_USB_DRV);
65 }
66 
da830_evm_usb_get_oci(unsigned port)67 static int da830_evm_usb_get_oci(unsigned port)
68 {
69 	return !gpio_get_value(ON_BD_USB_OVC);
70 }
71 
72 static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
73 
da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)74 static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
75 {
76 	int irq 	= gpio_to_irq(ON_BD_USB_OVC);
77 	int error	= 0;
78 
79 	if (handler != NULL) {
80 		da830_evm_usb_ocic_handler = handler;
81 
82 		error = request_irq(irq, da830_evm_usb_ocic_irq,
83 				    IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
84 				    "OHCI over-current indicator", NULL);
85 		if (error)
86 			pr_err("%s: could not request IRQ to watch over-current indicator changes\n",
87 			       __func__);
88 	} else
89 		free_irq(irq, NULL);
90 
91 	return error;
92 }
93 
94 static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
95 	.set_power	= da830_evm_usb_set_power,
96 	.get_power	= da830_evm_usb_get_power,
97 	.get_oci	= da830_evm_usb_get_oci,
98 	.ocic_notify	= da830_evm_usb_ocic_notify,
99 
100 	/* TPS2065 switch @ 5V */
101 	.potpgt		= (3 + 1) / 2,	/* 3 ms max */
102 };
103 
da830_evm_usb_ocic_irq(int irq,void * dev_id)104 static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
105 {
106 	da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
107 	return IRQ_HANDLED;
108 }
109 
da830_evm_usb_init(void)110 static __init void da830_evm_usb_init(void)
111 {
112 	int ret;
113 
114 	ret = da8xx_register_usb_phy_clocks();
115 	if (ret)
116 		pr_warn("%s: USB PHY CLK registration failed: %d\n",
117 			__func__, ret);
118 
119 	ret = da8xx_register_usb_phy();
120 	if (ret)
121 		pr_warn("%s: USB PHY registration failed: %d\n",
122 			__func__, ret);
123 
124 	ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
125 	if (ret)
126 		pr_warn("%s: USB 2.0 PinMux setup failed: %d\n", __func__, ret);
127 	else {
128 		/*
129 		 * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
130 		 * with the power on to power good time of 3 ms.
131 		 */
132 		ret = da8xx_register_usb20(1000, 3);
133 		if (ret)
134 			pr_warn("%s: USB 2.0 registration failed: %d\n",
135 				__func__, ret);
136 	}
137 
138 	ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
139 	if (ret) {
140 		pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret);
141 		return;
142 	}
143 
144 	ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
145 	if (ret) {
146 		pr_err("%s: failed to request GPIO for USB 1.1 port power control: %d\n",
147 		       __func__, ret);
148 		return;
149 	}
150 	gpio_direction_output(ON_BD_USB_DRV, 0);
151 
152 	ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
153 	if (ret) {
154 		pr_err("%s: failed to request GPIO for USB 1.1 port over-current indicator: %d\n",
155 		       __func__, ret);
156 		return;
157 	}
158 	gpio_direction_input(ON_BD_USB_OVC);
159 
160 	ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
161 	if (ret)
162 		pr_warn("%s: USB 1.1 registration failed: %d\n", __func__, ret);
163 }
164 
165 static const short da830_evm_mcasp1_pins[] = {
166 	DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
167 	DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
168 	DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
169 	DA830_AXR1_11,
170 	-1
171 };
172 
173 static u8 da830_iis_serializer_direction[] = {
174 	RX_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
175 	INACTIVE_MODE,	TX_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
176 	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
177 };
178 
179 static struct snd_platform_data da830_evm_snd_data = {
180 	.tx_dma_offset  = 0x2000,
181 	.rx_dma_offset  = 0x2000,
182 	.op_mode        = DAVINCI_MCASP_IIS_MODE,
183 	.num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
184 	.tdm_slots      = 2,
185 	.serial_dir     = da830_iis_serializer_direction,
186 	.asp_chan_q     = EVENTQ_0,
187 	.version	= MCASP_VERSION_2,
188 	.txnumevt	= 1,
189 	.rxnumevt	= 1,
190 };
191 
192 /*
193  * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
194  */
195 static const short da830_evm_mmc_sd_pins[] = {
196 	DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
197 	DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
198 	DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
199 	DA830_MMCSD_CMD,   DA830_GPIO2_1,     DA830_GPIO2_2,
200 	-1
201 };
202 
203 #define DA830_MMCSD_WP_PIN		GPIO_TO_PIN(2, 1)
204 #define DA830_MMCSD_CD_PIN		GPIO_TO_PIN(2, 2)
205 
206 static struct gpiod_lookup_table mmc_gpios_table = {
207 	.dev_id = "da830-mmc.0",
208 	.table = {
209 		/* gpio chip 1 contains gpio range 32-63 */
210 		GPIO_LOOKUP("davinci_gpio.0", DA830_MMCSD_CD_PIN, "cd",
211 			    GPIO_ACTIVE_LOW),
212 		GPIO_LOOKUP("davinci_gpio.0", DA830_MMCSD_WP_PIN, "wp",
213 			    GPIO_ACTIVE_LOW),
214 	},
215 };
216 
217 static struct davinci_mmc_config da830_evm_mmc_config = {
218 	.wires			= 8,
219 	.max_freq		= 50000000,
220 	.caps			= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
221 };
222 
da830_evm_init_mmc(void)223 static inline void da830_evm_init_mmc(void)
224 {
225 	int ret;
226 
227 	ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
228 	if (ret) {
229 		pr_warn("%s: mmc/sd mux setup failed: %d\n", __func__, ret);
230 		return;
231 	}
232 
233 	gpiod_add_lookup_table(&mmc_gpios_table);
234 
235 	ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
236 	if (ret) {
237 		pr_warn("%s: mmc/sd registration failed: %d\n", __func__, ret);
238 		gpiod_remove_lookup_table(&mmc_gpios_table);
239 	}
240 }
241 
242 #define HAS_MMC		IS_ENABLED(CONFIG_MMC_DAVINCI)
243 
244 #ifdef CONFIG_DA830_UI_NAND
245 static struct mtd_partition da830_evm_nand_partitions[] = {
246 	/* bootloader (U-Boot, etc) in first sector */
247 	[0] = {
248 		.name		= "bootloader",
249 		.offset		= 0,
250 		.size		= SZ_128K,
251 		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
252 	},
253 	/* bootloader params in the next sector */
254 	[1] = {
255 		.name		= "params",
256 		.offset		= MTDPART_OFS_APPEND,
257 		.size		= SZ_128K,
258 		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
259 	},
260 	/* kernel */
261 	[2] = {
262 		.name		= "kernel",
263 		.offset		= MTDPART_OFS_APPEND,
264 		.size		= SZ_2M,
265 		.mask_flags	= 0,
266 	},
267 	/* file system */
268 	[3] = {
269 		.name		= "filesystem",
270 		.offset		= MTDPART_OFS_APPEND,
271 		.size		= MTDPART_SIZ_FULL,
272 		.mask_flags	= 0,
273 	}
274 };
275 
276 /* flash bbt decriptors */
277 static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
278 static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
279 
280 static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
281 	.options	= NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
282 			  NAND_BBT_WRITE | NAND_BBT_2BIT |
283 			  NAND_BBT_VERSION | NAND_BBT_PERCHIP,
284 	.offs		= 2,
285 	.len		= 4,
286 	.veroffs	= 16,
287 	.maxblocks	= 4,
288 	.pattern	= da830_evm_nand_bbt_pattern
289 };
290 
291 static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
292 	.options	= NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
293 			  NAND_BBT_WRITE | NAND_BBT_2BIT |
294 			  NAND_BBT_VERSION | NAND_BBT_PERCHIP,
295 	.offs		= 2,
296 	.len		= 4,
297 	.veroffs	= 16,
298 	.maxblocks	= 4,
299 	.pattern	= da830_evm_nand_mirror_pattern
300 };
301 
302 static struct davinci_aemif_timing da830_evm_nandflash_timing = {
303 	.wsetup         = 24,
304 	.wstrobe        = 21,
305 	.whold          = 14,
306 	.rsetup         = 19,
307 	.rstrobe        = 50,
308 	.rhold          = 0,
309 	.ta             = 20,
310 };
311 
312 static struct davinci_nand_pdata da830_evm_nand_pdata = {
313 	.core_chipsel	= 1,
314 	.parts		= da830_evm_nand_partitions,
315 	.nr_parts	= ARRAY_SIZE(da830_evm_nand_partitions),
316 	.ecc_mode	= NAND_ECC_HW,
317 	.ecc_bits	= 4,
318 	.bbt_options	= NAND_BBT_USE_FLASH,
319 	.bbt_td		= &da830_evm_nand_bbt_main_descr,
320 	.bbt_md		= &da830_evm_nand_bbt_mirror_descr,
321 	.timing         = &da830_evm_nandflash_timing,
322 };
323 
324 static struct resource da830_evm_nand_resources[] = {
325 	[0] = {		/* First memory resource is NAND I/O window */
326 		.start	= DA8XX_AEMIF_CS3_BASE,
327 		.end	= DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
328 		.flags	= IORESOURCE_MEM,
329 	},
330 	[1] = {		/* Second memory resource is AEMIF control registers */
331 		.start	= DA8XX_AEMIF_CTL_BASE,
332 		.end	= DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
333 		.flags	= IORESOURCE_MEM,
334 	},
335 };
336 
337 static struct platform_device da830_evm_aemif_devices[] = {
338 	{
339 		.name		= "davinci_nand",
340 		.id		= 1,
341 		.dev		= {
342 			.platform_data	= &da830_evm_nand_pdata,
343 		},
344 		.num_resources	= ARRAY_SIZE(da830_evm_nand_resources),
345 		.resource	= da830_evm_nand_resources,
346 	},
347 };
348 
349 static struct resource da830_evm_aemif_resource[] = {
350 	{
351 		.start	= DA8XX_AEMIF_CTL_BASE,
352 		.end	= DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
353 		.flags	= IORESOURCE_MEM,
354 	},
355 };
356 
357 static struct aemif_abus_data da830_evm_aemif_abus_data[] = {
358 	{
359 		.cs	= 3,
360 	},
361 };
362 
363 static struct aemif_platform_data da830_evm_aemif_pdata = {
364 	.abus_data		= da830_evm_aemif_abus_data,
365 	.num_abus_data		= ARRAY_SIZE(da830_evm_aemif_abus_data),
366 	.sub_devices		= da830_evm_aemif_devices,
367 	.num_sub_devices	= ARRAY_SIZE(da830_evm_aemif_devices),
368 	.cs_offset		= 2,
369 };
370 
371 static struct platform_device da830_evm_aemif_device = {
372 	.name		= "ti-aemif",
373 	.id		= -1,
374 	.dev = {
375 		.platform_data = &da830_evm_aemif_pdata,
376 	},
377 	.resource	= da830_evm_aemif_resource,
378 	.num_resources	= ARRAY_SIZE(da830_evm_aemif_resource),
379 };
380 
381 /*
382  * UI board NAND/NOR flashes only use 8-bit data bus.
383  */
384 static const short da830_evm_emif25_pins[] = {
385 	DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
386 	DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
387 	DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
388 	DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
389 	DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
390 	DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
391 	DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
392 	-1
393 };
394 
da830_evm_init_nand(int mux_mode)395 static inline void da830_evm_init_nand(int mux_mode)
396 {
397 	int ret;
398 
399 	if (HAS_MMC) {
400 		pr_warn("WARNING: both MMC/SD and NAND are enabled, but they share AEMIF pins\n"
401 			"\tDisable MMC/SD for NAND support\n");
402 		return;
403 	}
404 
405 	ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
406 	if (ret)
407 		pr_warn("%s: emif25 mux setup failed: %d\n", __func__, ret);
408 
409 	ret = platform_device_register(&da830_evm_aemif_device);
410 	if (ret)
411 		pr_warn("%s: AEMIF device not registered\n", __func__);
412 
413 	gpio_direction_output(mux_mode, 1);
414 }
415 #else
da830_evm_init_nand(int mux_mode)416 static inline void da830_evm_init_nand(int mux_mode) { }
417 #endif
418 
419 #ifdef CONFIG_DA830_UI_LCD
da830_evm_init_lcdc(int mux_mode)420 static inline void da830_evm_init_lcdc(int mux_mode)
421 {
422 	int ret;
423 
424 	ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
425 	if (ret)
426 		pr_warn("%s: lcdcntl mux setup failed: %d\n", __func__, ret);
427 
428 	ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
429 	if (ret)
430 		pr_warn("%s: lcd setup failed: %d\n", __func__, ret);
431 
432 	gpio_direction_output(mux_mode, 0);
433 }
434 #else
da830_evm_init_lcdc(int mux_mode)435 static inline void da830_evm_init_lcdc(int mux_mode) { }
436 #endif
437 
438 static struct at24_platform_data da830_evm_i2c_eeprom_info = {
439 	.byte_len	= SZ_256K / 8,
440 	.page_size	= 64,
441 	.flags		= AT24_FLAG_ADDR16,
442 	.setup		= davinci_get_mac_addr,
443 	.context	= (void *)0x7f00,
444 };
445 
da830_evm_ui_expander_setup(struct i2c_client * client,int gpio,unsigned ngpio,void * context)446 static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
447 		int gpio, unsigned ngpio, void *context)
448 {
449 	gpio_request(gpio + 6, "UI MUX_MODE");
450 
451 	/* Drive mux mode low to match the default without UI card */
452 	gpio_direction_output(gpio + 6, 0);
453 
454 	da830_evm_init_lcdc(gpio + 6);
455 
456 	da830_evm_init_nand(gpio + 6);
457 
458 	return 0;
459 }
460 
da830_evm_ui_expander_teardown(struct i2c_client * client,int gpio,unsigned ngpio,void * context)461 static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
462 		unsigned ngpio, void *context)
463 {
464 	gpio_free(gpio + 6);
465 	return 0;
466 }
467 
468 static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
469 	.gpio_base	= DAVINCI_N_GPIO,
470 	.setup		= da830_evm_ui_expander_setup,
471 	.teardown	= da830_evm_ui_expander_teardown,
472 };
473 
474 static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
475 	{
476 		I2C_BOARD_INFO("24c256", 0x50),
477 		.platform_data	= &da830_evm_i2c_eeprom_info,
478 	},
479 	{
480 		I2C_BOARD_INFO("tlv320aic3x", 0x18),
481 	},
482 	{
483 		I2C_BOARD_INFO("pcf8574", 0x3f),
484 		.platform_data	= &da830_evm_ui_expander_info,
485 	},
486 };
487 
488 static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
489 	.bus_freq	= 100,	/* kHz */
490 	.bus_delay	= 0,	/* usec */
491 };
492 
493 /*
494  * The following EDMA channels/slots are not being used by drivers (for
495  * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
496  * they are being reserved for codecs on the DSP side.
497  */
498 static const s16 da830_dma_rsv_chans[][2] = {
499 	/* (offset, number) */
500 	{ 8,  2},
501 	{12,  2},
502 	{24,  4},
503 	{30,  2},
504 	{-1, -1}
505 };
506 
507 static const s16 da830_dma_rsv_slots[][2] = {
508 	/* (offset, number) */
509 	{ 8,  2},
510 	{12,  2},
511 	{24,  4},
512 	{30, 26},
513 	{-1, -1}
514 };
515 
516 static struct edma_rsv_info da830_edma_rsv[] = {
517 	{
518 		.rsv_chans	= da830_dma_rsv_chans,
519 		.rsv_slots	= da830_dma_rsv_slots,
520 	},
521 };
522 
523 static struct mtd_partition da830evm_spiflash_part[] = {
524 	[0] = {
525 		.name = "DSP-UBL",
526 		.offset = 0,
527 		.size = SZ_8K,
528 		.mask_flags = MTD_WRITEABLE,
529 	},
530 	[1] = {
531 		.name = "ARM-UBL",
532 		.offset = MTDPART_OFS_APPEND,
533 		.size = SZ_16K + SZ_8K,
534 		.mask_flags = MTD_WRITEABLE,
535 	},
536 	[2] = {
537 		.name = "U-Boot",
538 		.offset = MTDPART_OFS_APPEND,
539 		.size = SZ_256K - SZ_32K,
540 		.mask_flags = MTD_WRITEABLE,
541 	},
542 	[3] = {
543 		.name = "U-Boot-Environment",
544 		.offset = MTDPART_OFS_APPEND,
545 		.size = SZ_16K,
546 		.mask_flags = 0,
547 	},
548 	[4] = {
549 		.name = "Kernel",
550 		.offset = MTDPART_OFS_APPEND,
551 		.size = MTDPART_SIZ_FULL,
552 		.mask_flags = 0,
553 	},
554 };
555 
556 static struct flash_platform_data da830evm_spiflash_data = {
557 	.name		= "m25p80",
558 	.parts		= da830evm_spiflash_part,
559 	.nr_parts	= ARRAY_SIZE(da830evm_spiflash_part),
560 	.type		= "w25x32",
561 };
562 
563 static struct davinci_spi_config da830evm_spiflash_cfg = {
564 	.io_type	= SPI_IO_TYPE_DMA,
565 	.c2tdelay	= 8,
566 	.t2cdelay	= 8,
567 };
568 
569 static struct spi_board_info da830evm_spi_info[] = {
570 	{
571 		.modalias		= "m25p80",
572 		.platform_data		= &da830evm_spiflash_data,
573 		.controller_data	= &da830evm_spiflash_cfg,
574 		.mode			= SPI_MODE_0,
575 		.max_speed_hz		= 30000000,
576 		.bus_num		= 0,
577 		.chip_select		= 0,
578 	},
579 };
580 
da830_evm_init(void)581 static __init void da830_evm_init(void)
582 {
583 	struct davinci_soc_info *soc_info = &davinci_soc_info;
584 	int ret;
585 
586 	da830_register_clocks();
587 
588 	ret = da830_register_gpio();
589 	if (ret)
590 		pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
591 
592 	ret = da830_register_edma(da830_edma_rsv);
593 	if (ret)
594 		pr_warn("%s: edma registration failed: %d\n", __func__, ret);
595 
596 	ret = davinci_cfg_reg_list(da830_i2c0_pins);
597 	if (ret)
598 		pr_warn("%s: i2c0 mux setup failed: %d\n", __func__, ret);
599 
600 	ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
601 	if (ret)
602 		pr_warn("%s: i2c0 registration failed: %d\n", __func__, ret);
603 
604 	da830_evm_usb_init();
605 
606 	soc_info->emac_pdata->rmii_en = 1;
607 	soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID;
608 
609 	ret = davinci_cfg_reg_list(da830_cpgmac_pins);
610 	if (ret)
611 		pr_warn("%s: cpgmac mux setup failed: %d\n", __func__, ret);
612 
613 	ret = da8xx_register_emac();
614 	if (ret)
615 		pr_warn("%s: emac registration failed: %d\n", __func__, ret);
616 
617 	ret = da8xx_register_watchdog();
618 	if (ret)
619 		pr_warn("%s: watchdog registration failed: %d\n",
620 			__func__, ret);
621 
622 	davinci_serial_init(da8xx_serial_device);
623 	i2c_register_board_info(1, da830_evm_i2c_devices,
624 			ARRAY_SIZE(da830_evm_i2c_devices));
625 
626 	ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
627 	if (ret)
628 		pr_warn("%s: mcasp1 mux setup failed: %d\n", __func__, ret);
629 
630 	da8xx_register_mcasp(1, &da830_evm_snd_data);
631 
632 	da830_evm_init_mmc();
633 
634 	ret = da8xx_register_rtc();
635 	if (ret)
636 		pr_warn("%s: rtc setup failed: %d\n", __func__, ret);
637 
638 	ret = spi_register_board_info(da830evm_spi_info,
639 				      ARRAY_SIZE(da830evm_spi_info));
640 	if (ret)
641 		pr_warn("%s: spi info registration failed: %d\n",
642 			__func__, ret);
643 
644 	ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info));
645 	if (ret)
646 		pr_warn("%s: spi 0 registration failed: %d\n", __func__, ret);
647 
648 	regulator_has_full_constraints();
649 }
650 
651 #ifdef CONFIG_SERIAL_8250_CONSOLE
da830_evm_console_init(void)652 static int __init da830_evm_console_init(void)
653 {
654 	if (!machine_is_davinci_da830_evm())
655 		return 0;
656 
657 	return add_preferred_console("ttyS", 2, "115200");
658 }
659 console_initcall(da830_evm_console_init);
660 #endif
661 
da830_evm_map_io(void)662 static void __init da830_evm_map_io(void)
663 {
664 	da830_init();
665 }
666 
667 MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
668 	.atag_offset	= 0x100,
669 	.map_io		= da830_evm_map_io,
670 	.init_irq	= cp_intc_init,
671 	.init_time	= da830_init_time,
672 	.init_machine	= da830_evm_init,
673 	.init_late	= davinci_init_late,
674 	.dma_zone_size	= SZ_128M,
675 MACHINE_END
676