1 /*
2  * Copyright (C) 2012 - Virtual Open Systems and Columbia University
3  * Author: Christoffer Dall <c.dall@virtualopensystems.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License, version 2, as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
17  */
18 
19 #ifndef __ARM_KVM_HOST_H__
20 #define __ARM_KVM_HOST_H__
21 
22 #include <linux/types.h>
23 #include <linux/kvm_types.h>
24 #include <asm/cputype.h>
25 #include <asm/kvm.h>
26 #include <asm/kvm_asm.h>
27 #include <asm/kvm_mmio.h>
28 #include <asm/fpstate.h>
29 #include <kvm/arm_arch_timer.h>
30 
31 #define __KVM_HAVE_ARCH_INTC_INITIALIZED
32 
33 #define KVM_USER_MEM_SLOTS 32
34 #define KVM_HAVE_ONE_REG
35 #define KVM_HALT_POLL_NS_DEFAULT 500000
36 
37 #define KVM_VCPU_MAX_FEATURES 2
38 
39 #include <kvm/arm_vgic.h>
40 
41 
42 #ifdef CONFIG_ARM_GIC_V3
43 #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS
44 #else
45 #define KVM_MAX_VCPUS VGIC_V2_MAX_CPUS
46 #endif
47 
48 #define KVM_REQ_SLEEP \
49 	KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
50 #define KVM_REQ_IRQ_PENDING	KVM_ARCH_REQ(1)
51 
52 DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use);
53 
54 u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode);
55 int __attribute_const__ kvm_target_cpu(void);
56 int kvm_reset_vcpu(struct kvm_vcpu *vcpu);
57 void kvm_reset_coprocs(struct kvm_vcpu *vcpu);
58 
59 struct kvm_arch {
60 	/* VTTBR value associated with below pgd and vmid */
61 	u64    vttbr;
62 
63 	/* The last vcpu id that ran on each physical CPU */
64 	int __percpu *last_vcpu_ran;
65 
66 	/*
67 	 * Anything that is not used directly from assembly code goes
68 	 * here.
69 	 */
70 
71 	/* The VMID generation used for the virt. memory system */
72 	u64    vmid_gen;
73 	u32    vmid;
74 
75 	/* Stage-2 page table */
76 	pgd_t *pgd;
77 
78 	/* Interrupt controller */
79 	struct vgic_dist	vgic;
80 	int max_vcpus;
81 
82 	/* Mandated version of PSCI */
83 	u32 psci_version;
84 };
85 
86 #define KVM_NR_MEM_OBJS     40
87 
88 /*
89  * We don't want allocation failures within the mmu code, so we preallocate
90  * enough memory for a single page fault in a cache.
91  */
92 struct kvm_mmu_memory_cache {
93 	int nobjs;
94 	void *objects[KVM_NR_MEM_OBJS];
95 };
96 
97 struct kvm_vcpu_fault_info {
98 	u32 hsr;		/* Hyp Syndrome Register */
99 	u32 hxfar;		/* Hyp Data/Inst. Fault Address Register */
100 	u32 hpfar;		/* Hyp IPA Fault Address Register */
101 };
102 
103 /*
104  * 0 is reserved as an invalid value.
105  * Order should be kept in sync with the save/restore code.
106  */
107 enum vcpu_sysreg {
108 	__INVALID_SYSREG__,
109 	c0_MPIDR,		/* MultiProcessor ID Register */
110 	c0_CSSELR,		/* Cache Size Selection Register */
111 	c1_SCTLR,		/* System Control Register */
112 	c1_ACTLR,		/* Auxiliary Control Register */
113 	c1_CPACR,		/* Coprocessor Access Control */
114 	c2_TTBR0,		/* Translation Table Base Register 0 */
115 	c2_TTBR0_high,		/* TTBR0 top 32 bits */
116 	c2_TTBR1,		/* Translation Table Base Register 1 */
117 	c2_TTBR1_high,		/* TTBR1 top 32 bits */
118 	c2_TTBCR,		/* Translation Table Base Control R. */
119 	c3_DACR,		/* Domain Access Control Register */
120 	c5_DFSR,		/* Data Fault Status Register */
121 	c5_IFSR,		/* Instruction Fault Status Register */
122 	c5_ADFSR,		/* Auxilary Data Fault Status R */
123 	c5_AIFSR,		/* Auxilary Instrunction Fault Status R */
124 	c6_DFAR,		/* Data Fault Address Register */
125 	c6_IFAR,		/* Instruction Fault Address Register */
126 	c7_PAR,			/* Physical Address Register */
127 	c7_PAR_high,		/* PAR top 32 bits */
128 	c9_L2CTLR,		/* Cortex A15/A7 L2 Control Register */
129 	c10_PRRR,		/* Primary Region Remap Register */
130 	c10_NMRR,		/* Normal Memory Remap Register */
131 	c12_VBAR,		/* Vector Base Address Register */
132 	c13_CID,		/* Context ID Register */
133 	c13_TID_URW,		/* Thread ID, User R/W */
134 	c13_TID_URO,		/* Thread ID, User R/O */
135 	c13_TID_PRIV,		/* Thread ID, Privileged */
136 	c14_CNTKCTL,		/* Timer Control Register (PL1) */
137 	c10_AMAIR0,		/* Auxilary Memory Attribute Indirection Reg0 */
138 	c10_AMAIR1,		/* Auxilary Memory Attribute Indirection Reg1 */
139 	NR_CP15_REGS		/* Number of regs (incl. invalid) */
140 };
141 
142 struct kvm_cpu_context {
143 	struct kvm_regs	gp_regs;
144 	struct vfp_hard_struct vfp;
145 	u32 cp15[NR_CP15_REGS];
146 };
147 
148 typedef struct kvm_cpu_context kvm_cpu_context_t;
149 
150 struct kvm_vcpu_arch {
151 	struct kvm_cpu_context ctxt;
152 
153 	int target; /* Processor target */
154 	DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES);
155 
156 	/* The CPU type we expose to the VM */
157 	u32 midr;
158 
159 	/* HYP trapping configuration */
160 	u32 hcr;
161 
162 	/* Exception Information */
163 	struct kvm_vcpu_fault_info fault;
164 
165 	/* Host FP context */
166 	kvm_cpu_context_t *host_cpu_context;
167 
168 	/* VGIC state */
169 	struct vgic_cpu vgic_cpu;
170 	struct arch_timer_cpu timer_cpu;
171 
172 	/*
173 	 * Anything that is not used directly from assembly code goes
174 	 * here.
175 	 */
176 
177 	/* vcpu power-off state */
178 	bool power_off;
179 
180 	 /* Don't run the guest (internal implementation need) */
181 	bool pause;
182 
183 	/* IO related fields */
184 	struct kvm_decode mmio_decode;
185 
186 	/* Cache some mmu pages needed inside spinlock regions */
187 	struct kvm_mmu_memory_cache mmu_page_cache;
188 
189 	/* Detect first run of a vcpu */
190 	bool has_run_once;
191 };
192 
193 struct kvm_vm_stat {
194 	ulong remote_tlb_flush;
195 };
196 
197 struct kvm_vcpu_stat {
198 	u64 halt_successful_poll;
199 	u64 halt_attempted_poll;
200 	u64 halt_poll_invalid;
201 	u64 halt_wakeup;
202 	u64 hvc_exit_stat;
203 	u64 wfe_exit_stat;
204 	u64 wfi_exit_stat;
205 	u64 mmio_exit_user;
206 	u64 mmio_exit_kernel;
207 	u64 exits;
208 };
209 
210 #define vcpu_cp15(v,r)	(v)->arch.ctxt.cp15[r]
211 
212 int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init);
213 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
214 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
215 int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
216 int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
217 unsigned long kvm_call_hyp(void *hypfn, ...);
218 void force_vm_exit(const cpumask_t *mask);
219 int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu,
220 			      struct kvm_vcpu_events *events);
221 
222 int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu,
223 			      struct kvm_vcpu_events *events);
224 
225 #define KVM_ARCH_WANT_MMU_NOTIFIER
226 int kvm_unmap_hva_range(struct kvm *kvm,
227 			unsigned long start, unsigned long end);
228 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
229 
230 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
231 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
232 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
233 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
234 
235 struct kvm_vcpu *kvm_arm_get_running_vcpu(void);
236 struct kvm_vcpu __percpu **kvm_get_running_vcpus(void);
237 void kvm_arm_halt_guest(struct kvm *kvm);
238 void kvm_arm_resume_guest(struct kvm *kvm);
239 
240 int kvm_arm_copy_coproc_indices(struct kvm_vcpu *vcpu, u64 __user *uindices);
241 unsigned long kvm_arm_num_coproc_regs(struct kvm_vcpu *vcpu);
242 int kvm_arm_coproc_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
243 int kvm_arm_coproc_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
244 
245 int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
246 		int exception_index);
247 
handle_exit_early(struct kvm_vcpu * vcpu,struct kvm_run * run,int exception_index)248 static inline void handle_exit_early(struct kvm_vcpu *vcpu, struct kvm_run *run,
249 				     int exception_index) {}
250 
__cpu_init_hyp_mode(phys_addr_t pgd_ptr,unsigned long hyp_stack_ptr,unsigned long vector_ptr)251 static inline void __cpu_init_hyp_mode(phys_addr_t pgd_ptr,
252 				       unsigned long hyp_stack_ptr,
253 				       unsigned long vector_ptr)
254 {
255 	/*
256 	 * Call initialization code, and switch to the full blown HYP
257 	 * code. The init code doesn't need to preserve these
258 	 * registers as r0-r3 are already callee saved according to
259 	 * the AAPCS.
260 	 * Note that we slightly misuse the prototype by casting the
261 	 * stack pointer to a void *.
262 
263 	 * The PGDs are always passed as the third argument, in order
264 	 * to be passed into r2-r3 to the init code (yes, this is
265 	 * compliant with the PCS!).
266 	 */
267 
268 	kvm_call_hyp((void*)hyp_stack_ptr, vector_ptr, pgd_ptr);
269 }
270 
__cpu_init_stage2(void)271 static inline void __cpu_init_stage2(void)
272 {
273 	kvm_call_hyp(__init_stage2_translation);
274 }
275 
kvm_arch_dev_ioctl_check_extension(struct kvm * kvm,long ext)276 static inline int kvm_arch_dev_ioctl_check_extension(struct kvm *kvm, long ext)
277 {
278 	return 0;
279 }
280 
281 int kvm_perf_init(void);
282 int kvm_perf_teardown(void);
283 
284 void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot);
285 
286 struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr);
287 
kvm_arch_check_sve_has_vhe(void)288 static inline bool kvm_arch_check_sve_has_vhe(void) { return true; }
kvm_arch_hardware_unsetup(void)289 static inline void kvm_arch_hardware_unsetup(void) {}
kvm_arch_sync_events(struct kvm * kvm)290 static inline void kvm_arch_sync_events(struct kvm *kvm) {}
kvm_arch_vcpu_uninit(struct kvm_vcpu * vcpu)291 static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) {}
kvm_arch_sched_in(struct kvm_vcpu * vcpu,int cpu)292 static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
kvm_arch_vcpu_block_finish(struct kvm_vcpu * vcpu)293 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
294 
kvm_arm_init_debug(void)295 static inline void kvm_arm_init_debug(void) {}
kvm_arm_setup_debug(struct kvm_vcpu * vcpu)296 static inline void kvm_arm_setup_debug(struct kvm_vcpu *vcpu) {}
kvm_arm_clear_debug(struct kvm_vcpu * vcpu)297 static inline void kvm_arm_clear_debug(struct kvm_vcpu *vcpu) {}
kvm_arm_reset_debug_ptr(struct kvm_vcpu * vcpu)298 static inline void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu) {}
kvm_arm_handle_step_debug(struct kvm_vcpu * vcpu,struct kvm_run * run)299 static inline bool kvm_arm_handle_step_debug(struct kvm_vcpu *vcpu,
300 					     struct kvm_run *run)
301 {
302 	return false;
303 }
304 
305 int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
306 			       struct kvm_device_attr *attr);
307 int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu,
308 			       struct kvm_device_attr *attr);
309 int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu,
310 			       struct kvm_device_attr *attr);
311 
312 /*
313  * VFP/NEON switching is all done by the hyp switch code, so no need to
314  * coordinate with host context handling for this state:
315  */
kvm_arch_vcpu_load_fp(struct kvm_vcpu * vcpu)316 static inline void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu) {}
kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu * vcpu)317 static inline void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu) {}
kvm_arch_vcpu_put_fp(struct kvm_vcpu * vcpu)318 static inline void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu) {}
319 
kvm_arm_vhe_guest_enter(void)320 static inline void kvm_arm_vhe_guest_enter(void) {}
kvm_arm_vhe_guest_exit(void)321 static inline void kvm_arm_vhe_guest_exit(void) {}
322 
kvm_arm_harden_branch_predictor(void)323 static inline bool kvm_arm_harden_branch_predictor(void)
324 {
325 	switch(read_cpuid_part()) {
326 #ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
327 	case ARM_CPU_PART_BRAHMA_B15:
328 	case ARM_CPU_PART_CORTEX_A12:
329 	case ARM_CPU_PART_CORTEX_A15:
330 	case ARM_CPU_PART_CORTEX_A17:
331 		return true;
332 #endif
333 	default:
334 		return false;
335 	}
336 }
337 
338 #define KVM_SSBD_UNKNOWN		-1
339 #define KVM_SSBD_FORCE_DISABLE		0
340 #define KVM_SSBD_KERNEL		1
341 #define KVM_SSBD_FORCE_ENABLE		2
342 #define KVM_SSBD_MITIGATED		3
343 
kvm_arm_have_ssbd(void)344 static inline int kvm_arm_have_ssbd(void)
345 {
346 	/* No way to detect it yet, pretend it is not there. */
347 	return KVM_SSBD_UNKNOWN;
348 }
349 
kvm_vcpu_load_sysregs(struct kvm_vcpu * vcpu)350 static inline void kvm_vcpu_load_sysregs(struct kvm_vcpu *vcpu) {}
kvm_vcpu_put_sysregs(struct kvm_vcpu * vcpu)351 static inline void kvm_vcpu_put_sysregs(struct kvm_vcpu *vcpu) {}
352 
353 #define __KVM_HAVE_ARCH_VM_ALLOC
354 struct kvm *kvm_arch_alloc_vm(void);
355 void kvm_arch_free_vm(struct kvm *kvm);
356 
357 #endif /* __ARM_KVM_HOST_H__ */
358