1// SPDX-License-Identifier: GPL-2.0
2#include "qcom-ipq8064-v1.0.dtsi"
3
4/ {
5	model = "Qualcomm IPQ8064/AP148";
6	compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
7
8	aliases {
9		serial0 = &gsbi4_serial;
10	};
11
12	chosen {
13		stdout-path = "serial0:115200n8";
14	};
15
16	reserved-memory {
17		#address-cells = <1>;
18		#size-cells = <1>;
19		ranges;
20		rsvd@41200000 {
21			reg = <0x41200000 0x300000>;
22			no-map;
23		};
24	};
25
26	soc {
27		pinmux@800000 {
28			i2c4_pins: i2c4_pinmux {
29				pins = "gpio12", "gpio13";
30				function = "gsbi4";
31				bias-disable;
32			};
33
34			spi_pins: spi_pins {
35				mux {
36					pins = "gpio18", "gpio19", "gpio21";
37					function = "gsbi5";
38					drive-strength = <10>;
39					bias-none;
40				};
41			};
42		};
43
44		gsbi@16300000 {
45			qcom,mode = <GSBI_PROT_I2C_UART>;
46			status = "ok";
47			serial@16340000 {
48				status = "ok";
49			};
50
51			i2c4: i2c@16380000 {
52				status = "ok";
53
54				clock-frequency = <200000>;
55
56				pinctrl-0 = <&i2c4_pins>;
57				pinctrl-names = "default";
58			};
59		};
60
61		gsbi5: gsbi@1a200000 {
62			qcom,mode = <GSBI_PROT_SPI>;
63			status = "ok";
64
65			spi4: spi@1a280000 {
66				status = "ok";
67				spi-max-frequency = <50000000>;
68
69				pinctrl-0 = <&spi_pins>;
70				pinctrl-names = "default";
71
72				cs-gpios = <&qcom_pinmux 20 0>;
73
74				flash: m25p80@0 {
75					compatible = "s25fl256s1";
76					#address-cells = <1>;
77					#size-cells = <1>;
78					spi-max-frequency = <50000000>;
79					reg = <0>;
80
81					partition@0 {
82						label = "rootfs";
83						reg = <0x0 0x1000000>;
84					};
85
86					partition@1 {
87						label = "scratch";
88						reg = <0x1000000 0x1000000>;
89					};
90				};
91			};
92		};
93
94		sata-phy@1b400000 {
95			status = "ok";
96		};
97
98		sata@29000000 {
99			ports-implemented = <0x1>;
100			status = "ok";
101		};
102	};
103};
104