1// SPDX-License-Identifier: GPL-2.0 2&l4_cfg { /* 0x4a000000 */ 3 compatible = "ti,omap4-l4-cfg", "simple-bus"; 4 reg = <0x4a000000 0x800>, 5 <0x4a000800 0x800>, 6 <0x4a001000 0x1000>; 7 reg-names = "ap", "la", "ia0"; 8 #address-cells = <1>; 9 #size-cells = <1>; 10 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */ 11 <0x00080000 0x4a080000 0x080000>, /* segment 1 */ 12 <0x00100000 0x4a100000 0x080000>, /* segment 2 */ 13 <0x00180000 0x4a180000 0x080000>, /* segment 3 */ 14 <0x00200000 0x4a200000 0x080000>, /* segment 4 */ 15 <0x00280000 0x4a280000 0x080000>, /* segment 5 */ 16 <0x00300000 0x4a300000 0x080000>; /* segment 6 */ 17 18 segment@0 { /* 0x4a000000 */ 19 compatible = "simple-bus"; 20 #address-cells = <1>; 21 #size-cells = <1>; 22 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */ 23 <0x00001000 0x00001000 0x001000>, /* ap 1 */ 24 <0x00000800 0x00000800 0x000800>, /* ap 2 */ 25 <0x00002000 0x00002000 0x001000>, /* ap 3 */ 26 <0x00003000 0x00003000 0x001000>, /* ap 4 */ 27 <0x00004000 0x00004000 0x001000>, /* ap 5 */ 28 <0x00005000 0x00005000 0x001000>, /* ap 6 */ 29 <0x00056000 0x00056000 0x001000>, /* ap 7 */ 30 <0x00057000 0x00057000 0x001000>, /* ap 8 */ 31 <0x0005c000 0x0005c000 0x001000>, /* ap 9 */ 32 <0x00058000 0x00058000 0x004000>, /* ap 10 */ 33 <0x00062000 0x00062000 0x001000>, /* ap 11 */ 34 <0x00063000 0x00063000 0x001000>, /* ap 12 */ 35 <0x00008000 0x00008000 0x002000>, /* ap 23 */ 36 <0x0000a000 0x0000a000 0x001000>, /* ap 24 */ 37 <0x00066000 0x00066000 0x001000>, /* ap 25 */ 38 <0x00067000 0x00067000 0x001000>, /* ap 26 */ 39 <0x0005e000 0x0005e000 0x002000>, /* ap 80 */ 40 <0x00060000 0x00060000 0x001000>, /* ap 81 */ 41 <0x00064000 0x00064000 0x001000>, /* ap 86 */ 42 <0x00065000 0x00065000 0x001000>; /* ap 87 */ 43 44 target-module@2000 { /* 0x4a002000, ap 3 06.0 */ 45 compatible = "ti,sysc-omap4", "ti,sysc"; 46 ti,hwmods = "ctrl_module_core"; 47 reg = <0x2000 0x4>, 48 <0x2010 0x4>; 49 reg-names = "rev", "sysc"; 50 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 51 <SYSC_IDLE_NO>, 52 <SYSC_IDLE_SMART>, 53 <SYSC_IDLE_SMART_WKUP>; 54 /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */ 55 #address-cells = <1>; 56 #size-cells = <1>; 57 ranges = <0x0 0x2000 0x1000>; 58 59 omap4_scm_core: scm@0 { 60 compatible = "ti,omap4-scm-core", "simple-bus"; 61 reg = <0x0 0x1000>; 62 #address-cells = <1>; 63 #size-cells = <1>; 64 ranges = <0 0 0x1000>; 65 66 scm_conf: scm_conf@0 { 67 compatible = "syscon"; 68 reg = <0x0 0x800>; 69 #address-cells = <1>; 70 #size-cells = <1>; 71 }; 72 73 omap_control_usb2phy: control-phy@300 { 74 compatible = "ti,control-phy-usb2"; 75 reg = <0x300 0x4>; 76 reg-names = "power"; 77 }; 78 79 omap_control_usbotg: control-phy@33c { 80 compatible = "ti,control-phy-otghs"; 81 reg = <0x33c 0x4>; 82 reg-names = "otghs_control"; 83 }; 84 }; 85 }; 86 87 target-module@4000 { /* 0x4a004000, ap 5 02.0 */ 88 compatible = "ti,sysc-omap4", "ti,sysc"; 89 reg = <0x4000 0x4>; 90 reg-names = "rev"; 91 #address-cells = <1>; 92 #size-cells = <1>; 93 ranges = <0x0 0x4000 0x1000>; 94 95 cm1: cm1@0 { 96 compatible = "ti,omap4-cm1", "simple-bus"; 97 reg = <0x0 0x2000>; 98 #address-cells = <1>; 99 #size-cells = <1>; 100 ranges = <0 0 0x2000>; 101 102 cm1_clocks: clocks { 103 #address-cells = <1>; 104 #size-cells = <0>; 105 }; 106 107 cm1_clockdomains: clockdomains { 108 }; 109 }; 110 }; 111 112 target-module@8000 { /* 0x4a008000, ap 23 32.0 */ 113 compatible = "ti,sysc-omap4", "ti,sysc"; 114 reg = <0x8000 0x4>; 115 reg-names = "rev"; 116 #address-cells = <1>; 117 #size-cells = <1>; 118 ranges = <0x0 0x8000 0x2000>; 119 120 cm2: cm2@0 { 121 compatible = "ti,omap4-cm2", "simple-bus"; 122 reg = <0x0 0x2000>; 123 #address-cells = <1>; 124 #size-cells = <1>; 125 ranges = <0 0 0x2000>; 126 127 cm2_clocks: clocks { 128 #address-cells = <1>; 129 #size-cells = <0>; 130 }; 131 132 cm2_clockdomains: clockdomains { 133 }; 134 }; 135 }; 136 137 target-module@56000 { /* 0x4a056000, ap 7 0a.0 */ 138 compatible = "ti,sysc-omap2", "ti,sysc"; 139 ti,hwmods = "dma_system"; 140 reg = <0x56000 0x4>, 141 <0x5602c 0x4>, 142 <0x56028 0x4>; 143 reg-names = "rev", "sysc", "syss"; 144 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 145 SYSC_OMAP2_EMUFREE | 146 SYSC_OMAP2_SOFTRESET | 147 SYSC_OMAP2_AUTOIDLE)>; 148 ti,sysc-midle = <SYSC_IDLE_FORCE>, 149 <SYSC_IDLE_NO>, 150 <SYSC_IDLE_SMART>; 151 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 152 <SYSC_IDLE_NO>, 153 <SYSC_IDLE_SMART>; 154 ti,syss-mask = <1>; 155 /* Domains (V, P, C): core, core_pwrdm, l3_dma_clkdm */ 156 clocks = <&l3_dma_clkctrl OMAP4_DMA_SYSTEM_CLKCTRL 0>; 157 clock-names = "fck"; 158 #address-cells = <1>; 159 #size-cells = <1>; 160 ranges = <0x0 0x56000 0x1000>; 161 162 sdma: dma-controller@0 { 163 compatible = "ti,omap4430-sdma"; 164 reg = <0x0 0x1000>; 165 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 166 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 167 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 168 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 169 #dma-cells = <1>; 170 dma-channels = <32>; 171 dma-requests = <127>; 172 }; 173 }; 174 175 target-module@58000 { /* 0x4a058000, ap 10 0e.0 */ 176 compatible = "ti,sysc-omap2", "ti,sysc"; 177 ti,hwmods = "hsi"; 178 reg = <0x58000 0x4>, 179 <0x58010 0x4>, 180 <0x58014 0x4>; 181 reg-names = "rev", "sysc", "syss"; 182 ti,sysc-mask = <(SYSC_OMAP2_EMUFREE | 183 SYSC_OMAP2_SOFTRESET | 184 SYSC_OMAP2_AUTOIDLE)>; 185 ti,sysc-midle = <SYSC_IDLE_FORCE>, 186 <SYSC_IDLE_NO>, 187 <SYSC_IDLE_SMART>, 188 <SYSC_IDLE_SMART_WKUP>; 189 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 190 <SYSC_IDLE_NO>, 191 <SYSC_IDLE_SMART>, 192 <SYSC_IDLE_SMART_WKUP>; 193 ti,syss-mask = <1>; 194 /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */ 195 clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>; 196 clock-names = "fck"; 197 #address-cells = <1>; 198 #size-cells = <1>; 199 ranges = <0x0 0x58000 0x4000>; 200 201 hsi: hsi@0 { 202 compatible = "ti,omap4-hsi"; 203 reg = <0x0 0x4000>, 204 <0x4a05c000 0x1000>; 205 reg-names = "sys", "gdd"; 206 207 clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>; 208 clock-names = "hsi_fck"; 209 210 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 211 interrupt-names = "gdd_mpu"; 212 213 #address-cells = <1>; 214 #size-cells = <1>; 215 ranges = <0 0 0x4000>; 216 217 hsi_port1: hsi-port@2000 { 218 compatible = "ti,omap4-hsi-port"; 219 reg = <0x2000 0x800>, 220 <0x2800 0x800>; 221 reg-names = "tx", "rx"; 222 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 223 }; 224 225 hsi_port2: hsi-port@3000 { 226 compatible = "ti,omap4-hsi-port"; 227 reg = <0x3000 0x800>, 228 <0x3800 0x800>; 229 reg-names = "tx", "rx"; 230 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 231 }; 232 }; 233 }; 234 235 target-module@5e000 { /* 0x4a05e000, ap 80 68.0 */ 236 compatible = "ti,sysc"; 237 status = "disabled"; 238 #address-cells = <1>; 239 #size-cells = <1>; 240 ranges = <0x0 0x5e000 0x2000>; 241 }; 242 243 target-module@62000 { /* 0x4a062000, ap 11 16.0 */ 244 compatible = "ti,sysc-omap2", "ti,sysc"; 245 ti,hwmods = "usb_tll_hs"; 246 reg = <0x62000 0x4>, 247 <0x62010 0x4>, 248 <0x62014 0x4>; 249 reg-names = "rev", "sysc", "syss"; 250 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 251 SYSC_OMAP2_ENAWAKEUP | 252 SYSC_OMAP2_SOFTRESET | 253 SYSC_OMAP2_AUTOIDLE)>; 254 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 255 <SYSC_IDLE_NO>, 256 <SYSC_IDLE_SMART>; 257 /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */ 258 clocks = <&l3_init_clkctrl OMAP4_USB_TLL_HS_CLKCTRL 0>; 259 clock-names = "fck"; 260 #address-cells = <1>; 261 #size-cells = <1>; 262 ranges = <0x0 0x62000 0x1000>; 263 264 usbhstll: usbhstll@0 { 265 compatible = "ti,usbhs-tll"; 266 reg = <0x0 0x1000>; 267 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 268 }; 269 }; 270 271 target-module@64000 { /* 0x4a064000, ap 86 1e.0 */ 272 compatible = "ti,sysc-omap4", "ti,sysc"; 273 ti,hwmods = "usb_host_hs"; 274 reg = <0x64000 0x4>, 275 <0x64010 0x4>, 276 <0x64014 0x4>; 277 reg-names = "rev", "sysc", "syss"; 278 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 279 ti,sysc-midle = <SYSC_IDLE_FORCE>, 280 <SYSC_IDLE_NO>, 281 <SYSC_IDLE_SMART>, 282 <SYSC_IDLE_SMART_WKUP>; 283 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 284 <SYSC_IDLE_NO>, 285 <SYSC_IDLE_SMART>, 286 <SYSC_IDLE_SMART_WKUP>; 287 /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */ 288 clocks = <&l3_init_clkctrl OMAP4_USB_HOST_HS_CLKCTRL 0>; 289 clock-names = "fck"; 290 #address-cells = <1>; 291 #size-cells = <1>; 292 ranges = <0x0 0x64000 0x1000>; 293 294 usbhshost: usbhshost@0 { 295 compatible = "ti,usbhs-host"; 296 reg = <0x0 0x800>; 297 #address-cells = <1>; 298 #size-cells = <1>; 299 ranges = <0 0 0x1000>; 300 clocks = <&init_60m_fclk>, 301 <&xclk60mhsp1_ck>, 302 <&xclk60mhsp2_ck>; 303 clock-names = "refclk_60m_int", 304 "refclk_60m_ext_p1", 305 "refclk_60m_ext_p2"; 306 307 usbhsohci: ohci@800 { 308 compatible = "ti,ohci-omap3"; 309 reg = <0x800 0x400>; 310 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 311 remote-wakeup-connected; 312 }; 313 314 usbhsehci: ehci@c00 { 315 compatible = "ti,ehci-omap"; 316 reg = <0xc00 0x400>; 317 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 318 }; 319 }; 320 }; 321 322 target-module@66000 { /* 0x4a066000, ap 25 26.0 */ 323 compatible = "ti,sysc-omap2", "ti,sysc"; 324 ti,hwmods = "mmu_dsp"; 325 reg = <0x66000 0x4>, 326 <0x66010 0x4>, 327 <0x66014 0x4>; 328 reg-names = "rev", "sysc", "syss"; 329 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 330 SYSC_OMAP2_SOFTRESET | 331 SYSC_OMAP2_AUTOIDLE)>; 332 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 333 <SYSC_IDLE_NO>, 334 <SYSC_IDLE_SMART>; 335 /* Domains (V, P, C): iva, tesla_pwrdm, tesla_clkdm */ 336 clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>; 337 clock-names = "fck"; 338 #address-cells = <1>; 339 #size-cells = <1>; 340 ranges = <0x0 0x66000 0x1000>; 341 342 /* mmu_dsp cannot be moved before reset driver */ 343 status = "disabled"; 344 }; 345 }; 346 347 segment@80000 { /* 0x4a080000 */ 348 compatible = "simple-bus"; 349 #address-cells = <1>; 350 #size-cells = <1>; 351 ranges = <0x00059000 0x000d9000 0x001000>, /* ap 13 */ 352 <0x0005a000 0x000da000 0x001000>, /* ap 14 */ 353 <0x0005b000 0x000db000 0x001000>, /* ap 15 */ 354 <0x0005c000 0x000dc000 0x001000>, /* ap 16 */ 355 <0x0005d000 0x000dd000 0x001000>, /* ap 17 */ 356 <0x0005e000 0x000de000 0x001000>, /* ap 18 */ 357 <0x00060000 0x000e0000 0x001000>, /* ap 19 */ 358 <0x00061000 0x000e1000 0x001000>, /* ap 20 */ 359 <0x00074000 0x000f4000 0x001000>, /* ap 27 */ 360 <0x00075000 0x000f5000 0x001000>, /* ap 28 */ 361 <0x00076000 0x000f6000 0x001000>, /* ap 29 */ 362 <0x00077000 0x000f7000 0x001000>, /* ap 30 */ 363 <0x00036000 0x000b6000 0x001000>, /* ap 69 */ 364 <0x00037000 0x000b7000 0x001000>, /* ap 70 */ 365 <0x0004d000 0x000cd000 0x001000>, /* ap 78 */ 366 <0x0004e000 0x000ce000 0x001000>, /* ap 79 */ 367 <0x00029000 0x000a9000 0x001000>, /* ap 82 */ 368 <0x0002a000 0x000aa000 0x001000>, /* ap 83 */ 369 <0x0002b000 0x000ab000 0x001000>, /* ap 84 */ 370 <0x0002c000 0x000ac000 0x001000>, /* ap 85 */ 371 <0x0002d000 0x000ad000 0x001000>, /* ap 88 */ 372 <0x0002e000 0x000ae000 0x001000>; /* ap 89 */ 373 374 target-module@29000 { /* 0x4a0a9000, ap 82 04.0 */ 375 compatible = "ti,sysc"; 376 status = "disabled"; 377 #address-cells = <1>; 378 #size-cells = <1>; 379 ranges = <0x0 0x29000 0x1000>; 380 }; 381 382 target-module@2b000 { /* 0x4a0ab000, ap 84 12.0 */ 383 compatible = "ti,sysc-omap2", "ti,sysc"; 384 ti,hwmods = "usb_otg_hs"; 385 reg = <0x2b400 0x4>, 386 <0x2b404 0x4>, 387 <0x2b408 0x4>; 388 reg-names = "rev", "sysc", "syss"; 389 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 390 SYSC_OMAP2_SOFTRESET | 391 SYSC_OMAP2_AUTOIDLE)>; 392 ti,sysc-midle = <SYSC_IDLE_FORCE>, 393 <SYSC_IDLE_NO>, 394 <SYSC_IDLE_SMART>; 395 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 396 <SYSC_IDLE_NO>, 397 <SYSC_IDLE_SMART>, 398 <SYSC_IDLE_SMART_WKUP>; 399 ti,syss-mask = <1>; 400 /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */ 401 clocks = <&l3_init_clkctrl OMAP4_USB_OTG_HS_CLKCTRL 0>; 402 clock-names = "fck"; 403 #address-cells = <1>; 404 #size-cells = <1>; 405 ranges = <0x0 0x2b000 0x1000>; 406 407 usb_otg_hs: usb_otg_hs@0 { 408 compatible = "ti,omap4-musb"; 409 reg = <0x0 0x7ff>; 410 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 411 interrupt-names = "mc", "dma"; 412 usb-phy = <&usb2_phy>; 413 phys = <&usb2_phy>; 414 phy-names = "usb2-phy"; 415 multipoint = <1>; 416 num-eps = <16>; 417 ram-bits = <12>; 418 ctrl-module = <&omap_control_usbotg>; 419 }; 420 }; 421 422 target-module@2d000 { /* 0x4a0ad000, ap 88 0c.0 */ 423 compatible = "ti,sysc-omap2", "ti,sysc"; 424 ti,hwmods = "ocp2scp_usb_phy"; 425 reg = <0x2d000 0x4>, 426 <0x2d010 0x4>, 427 <0x2d014 0x4>; 428 reg-names = "rev", "sysc", "syss"; 429 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | 430 SYSC_OMAP2_AUTOIDLE)>; 431 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 432 <SYSC_IDLE_NO>, 433 <SYSC_IDLE_SMART>; 434 ti,syss-mask = <1>; 435 /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */ 436 clocks = <&l3_init_clkctrl OMAP4_OCP2SCP_USB_PHY_CLKCTRL 0>; 437 clock-names = "fck"; 438 #address-cells = <1>; 439 #size-cells = <1>; 440 ranges = <0x0 0x2d000 0x1000>; 441 442 ocp2scp@0 { 443 compatible = "ti,omap-ocp2scp"; 444 reg = <0x0 0x1f>; 445 #address-cells = <1>; 446 #size-cells = <1>; 447 ranges = <0 0 0x1000>; 448 usb2_phy: usb2phy@80 { 449 compatible = "ti,omap-usb2"; 450 reg = <0x80 0x58>; 451 ctrl-module = <&omap_control_usb2phy>; 452 clocks = <&usb_phy_cm_clk32k>; 453 clock-names = "wkupclk"; 454 #phy-cells = <0>; 455 }; 456 }; 457 }; 458 459 target-module@36000 { /* 0x4a0b6000, ap 69 60.0 */ 460 compatible = "ti,sysc"; 461 status = "disabled"; 462 #address-cells = <1>; 463 #size-cells = <1>; 464 ranges = <0x0 0x36000 0x1000>; 465 }; 466 467 target-module@4d000 { /* 0x4a0cd000, ap 78 58.0 */ 468 compatible = "ti,sysc"; 469 status = "disabled"; 470 #address-cells = <1>; 471 #size-cells = <1>; 472 ranges = <0x0 0x4d000 0x1000>; 473 }; 474 475 target-module@59000 { /* 0x4a0d9000, ap 13 1a.0 */ 476 compatible = "ti,sysc-omap4-sr", "ti,sysc"; 477 ti,hwmods = "smartreflex_mpu"; 478 reg = <0x59038 0x4>; 479 reg-names = "sysc"; 480 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>; 481 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 482 <SYSC_IDLE_NO>, 483 <SYSC_IDLE_SMART>, 484 <SYSC_IDLE_SMART_WKUP>; 485 /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */ 486 clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_MPU_CLKCTRL 0>; 487 clock-names = "fck"; 488 #address-cells = <1>; 489 #size-cells = <1>; 490 ranges = <0x0 0x59000 0x1000>; 491 492 smartreflex_mpu: smartreflex@0 { 493 compatible = "ti,omap4-smartreflex-mpu"; 494 reg = <0x0 0x80>; 495 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; 496 }; 497 }; 498 499 target-module@5b000 { /* 0x4a0db000, ap 15 08.0 */ 500 compatible = "ti,sysc-omap4-sr", "ti,sysc"; 501 ti,hwmods = "smartreflex_iva"; 502 reg = <0x5b038 0x4>; 503 reg-names = "sysc"; 504 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>; 505 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 506 <SYSC_IDLE_NO>, 507 <SYSC_IDLE_SMART>, 508 <SYSC_IDLE_SMART_WKUP>; 509 /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */ 510 clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_IVA_CLKCTRL 0>; 511 clock-names = "fck"; 512 #address-cells = <1>; 513 #size-cells = <1>; 514 ranges = <0x0 0x5b000 0x1000>; 515 516 smartreflex_iva: smartreflex@0 { 517 compatible = "ti,omap4-smartreflex-iva"; 518 reg = <0x0 0x80>; 519 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 520 }; 521 }; 522 523 target-module@5d000 { /* 0x4a0dd000, ap 17 22.0 */ 524 compatible = "ti,sysc-omap4-sr", "ti,sysc"; 525 ti,hwmods = "smartreflex_core"; 526 reg = <0x5d038 0x4>; 527 reg-names = "sysc"; 528 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>; 529 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 530 <SYSC_IDLE_NO>, 531 <SYSC_IDLE_SMART>, 532 <SYSC_IDLE_SMART_WKUP>; 533 /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */ 534 clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_CORE_CLKCTRL 0>; 535 clock-names = "fck"; 536 #address-cells = <1>; 537 #size-cells = <1>; 538 ranges = <0x0 0x5d000 0x1000>; 539 540 smartreflex_core: smartreflex@0 { 541 compatible = "ti,omap4-smartreflex-core"; 542 reg = <0x0 0x80>; 543 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 544 }; 545 }; 546 547 target-module@60000 { /* 0x4a0e0000, ap 19 1c.0 */ 548 compatible = "ti,sysc"; 549 status = "disabled"; 550 #address-cells = <1>; 551 #size-cells = <1>; 552 ranges = <0x0 0x60000 0x1000>; 553 }; 554 555 target-module@74000 { /* 0x4a0f4000, ap 27 24.0 */ 556 compatible = "ti,sysc-omap4", "ti,sysc"; 557 ti,hwmods = "mailbox"; 558 reg = <0x74000 0x4>, 559 <0x74010 0x4>; 560 reg-names = "rev", "sysc"; 561 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 562 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 563 <SYSC_IDLE_NO>, 564 <SYSC_IDLE_SMART>; 565 /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */ 566 clocks = <&l4_cfg_clkctrl OMAP4_MAILBOX_CLKCTRL 0>; 567 clock-names = "fck"; 568 #address-cells = <1>; 569 #size-cells = <1>; 570 ranges = <0x0 0x74000 0x1000>; 571 572 mailbox: mailbox@0 { 573 compatible = "ti,omap4-mailbox"; 574 reg = <0x0 0x200>; 575 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 576 #mbox-cells = <1>; 577 ti,mbox-num-users = <3>; 578 ti,mbox-num-fifos = <8>; 579 mbox_ipu: mbox_ipu { 580 ti,mbox-tx = <0 0 0>; 581 ti,mbox-rx = <1 0 0>; 582 }; 583 mbox_dsp: mbox_dsp { 584 ti,mbox-tx = <3 0 0>; 585 ti,mbox-rx = <2 0 0>; 586 }; 587 }; 588 }; 589 590 target-module@76000 { /* 0x4a0f6000, ap 29 3a.0 */ 591 compatible = "ti,sysc-omap2", "ti,sysc"; 592 ti,hwmods = "spinlock"; 593 reg = <0x76000 0x4>, 594 <0x76010 0x4>, 595 <0x76014 0x4>; 596 reg-names = "rev", "sysc", "syss"; 597 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 598 SYSC_OMAP2_ENAWAKEUP | 599 SYSC_OMAP2_SOFTRESET | 600 SYSC_OMAP2_AUTOIDLE)>; 601 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 602 <SYSC_IDLE_NO>, 603 <SYSC_IDLE_SMART>; 604 ti,syss-mask = <1>; 605 /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */ 606 clocks = <&l4_cfg_clkctrl OMAP4_SPINLOCK_CLKCTRL 0>; 607 clock-names = "fck"; 608 #address-cells = <1>; 609 #size-cells = <1>; 610 ranges = <0x0 0x76000 0x1000>; 611 612 hwspinlock: spinlock@0 { 613 compatible = "ti,omap4-hwspinlock"; 614 reg = <0x0 0x1000>; 615 #hwlock-cells = <1>; 616 }; 617 }; 618 }; 619 620 segment@100000 { /* 0x4a100000 */ 621 compatible = "simple-bus"; 622 #address-cells = <1>; 623 #size-cells = <1>; 624 ranges = <0x00000000 0x00100000 0x001000>, /* ap 21 */ 625 <0x00001000 0x00101000 0x001000>, /* ap 22 */ 626 <0x00002000 0x00102000 0x001000>, /* ap 61 */ 627 <0x00003000 0x00103000 0x001000>, /* ap 62 */ 628 <0x00008000 0x00108000 0x001000>, /* ap 63 */ 629 <0x00009000 0x00109000 0x001000>, /* ap 64 */ 630 <0x0000a000 0x0010a000 0x001000>, /* ap 65 */ 631 <0x0000b000 0x0010b000 0x001000>; /* ap 66 */ 632 633 target-module@0 { /* 0x4a100000, ap 21 2a.0 */ 634 compatible = "ti,sysc-omap4", "ti,sysc"; 635 ti,hwmods = "ctrl_module_pad_core"; 636 reg = <0x0 0x4>, 637 <0x10 0x4>; 638 reg-names = "rev", "sysc"; 639 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 640 <SYSC_IDLE_NO>, 641 <SYSC_IDLE_SMART>, 642 <SYSC_IDLE_SMART_WKUP>; 643 /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */ 644 #address-cells = <1>; 645 #size-cells = <1>; 646 ranges = <0x0 0x0 0x1000>; 647 648 omap4_pmx_core: pinmux@40 { 649 compatible = "ti,omap4-padconf", 650 "pinctrl-single"; 651 reg = <0x40 0x0196>; 652 #address-cells = <1>; 653 #size-cells = <0>; 654 #pinctrl-cells = <1>; 655 #interrupt-cells = <1>; 656 interrupt-controller; 657 pinctrl-single,register-width = <16>; 658 pinctrl-single,function-mask = <0x7fff>; 659 }; 660 661 omap4_padconf_global: omap4_padconf_global@5a0 { 662 compatible = "syscon", 663 "simple-bus"; 664 reg = <0x5a0 0x170>; 665 #address-cells = <1>; 666 #size-cells = <1>; 667 ranges = <0 0x5a0 0x170>; 668 669 pbias_regulator: pbias_regulator@60 { 670 compatible = "ti,pbias-omap4", "ti,pbias-omap"; 671 reg = <0x60 0x4>; 672 syscon = <&omap4_padconf_global>; 673 pbias_mmc_reg: pbias_mmc_omap4 { 674 regulator-name = "pbias_mmc_omap4"; 675 regulator-min-microvolt = <1800000>; 676 regulator-max-microvolt = <3000000>; 677 }; 678 }; 679 }; 680 }; 681 682 target-module@2000 { /* 0x4a102000, ap 61 3c.0 */ 683 compatible = "ti,sysc"; 684 status = "disabled"; 685 #address-cells = <1>; 686 #size-cells = <1>; 687 ranges = <0x0 0x2000 0x1000>; 688 }; 689 690 target-module@8000 { /* 0x4a108000, ap 63 62.0 */ 691 compatible = "ti,sysc"; 692 status = "disabled"; 693 #address-cells = <1>; 694 #size-cells = <1>; 695 ranges = <0x0 0x8000 0x1000>; 696 }; 697 698 target-module@a000 { /* 0x4a10a000, ap 65 50.0 */ 699 compatible = "ti,sysc-omap4", "ti,sysc"; 700 ti,hwmods = "fdif"; 701 reg = <0xa000 0x4>, 702 <0xa010 0x4>; 703 reg-names = "rev", "sysc"; 704 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 705 ti,sysc-midle = <SYSC_IDLE_FORCE>, 706 <SYSC_IDLE_NO>, 707 <SYSC_IDLE_SMART>; 708 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 709 <SYSC_IDLE_NO>, 710 <SYSC_IDLE_SMART>; 711 ti,sysc-delay-us = <2>; 712 /* Domains (V, P, C): core, cam_pwrdm, iss_clkdm */ 713 clocks = <&iss_clkctrl OMAP4_FDIF_CLKCTRL 0>; 714 clock-names = "fck"; 715 #address-cells = <1>; 716 #size-cells = <1>; 717 ranges = <0x0 0xa000 0x1000>; 718 719 /* No child device binding or driver in mainline */ 720 }; 721 }; 722 723 segment@180000 { /* 0x4a180000 */ 724 compatible = "simple-bus"; 725 #address-cells = <1>; 726 #size-cells = <1>; 727 }; 728 729 segment@200000 { /* 0x4a200000 */ 730 compatible = "simple-bus"; 731 #address-cells = <1>; 732 #size-cells = <1>; 733 ranges = <0x0001e000 0x0021e000 0x001000>, /* ap 31 */ 734 <0x0001f000 0x0021f000 0x001000>, /* ap 32 */ 735 <0x0000a000 0x0020a000 0x001000>, /* ap 33 */ 736 <0x0000b000 0x0020b000 0x001000>, /* ap 34 */ 737 <0x00004000 0x00204000 0x001000>, /* ap 35 */ 738 <0x00005000 0x00205000 0x001000>, /* ap 36 */ 739 <0x00006000 0x00206000 0x001000>, /* ap 37 */ 740 <0x00007000 0x00207000 0x001000>, /* ap 38 */ 741 <0x00012000 0x00212000 0x001000>, /* ap 39 */ 742 <0x00013000 0x00213000 0x001000>, /* ap 40 */ 743 <0x0000c000 0x0020c000 0x001000>, /* ap 41 */ 744 <0x0000d000 0x0020d000 0x001000>, /* ap 42 */ 745 <0x00010000 0x00210000 0x001000>, /* ap 43 */ 746 <0x00011000 0x00211000 0x001000>, /* ap 44 */ 747 <0x00016000 0x00216000 0x001000>, /* ap 45 */ 748 <0x00017000 0x00217000 0x001000>, /* ap 46 */ 749 <0x00014000 0x00214000 0x001000>, /* ap 47 */ 750 <0x00015000 0x00215000 0x001000>, /* ap 48 */ 751 <0x00018000 0x00218000 0x001000>, /* ap 49 */ 752 <0x00019000 0x00219000 0x001000>, /* ap 50 */ 753 <0x00020000 0x00220000 0x001000>, /* ap 51 */ 754 <0x00021000 0x00221000 0x001000>, /* ap 52 */ 755 <0x00026000 0x00226000 0x001000>, /* ap 53 */ 756 <0x00027000 0x00227000 0x001000>, /* ap 54 */ 757 <0x00028000 0x00228000 0x001000>, /* ap 55 */ 758 <0x00029000 0x00229000 0x001000>, /* ap 56 */ 759 <0x0002a000 0x0022a000 0x001000>, /* ap 57 */ 760 <0x0002b000 0x0022b000 0x001000>, /* ap 58 */ 761 <0x0001c000 0x0021c000 0x001000>, /* ap 59 */ 762 <0x0001d000 0x0021d000 0x001000>; /* ap 60 */ 763 764 target-module@4000 { /* 0x4a204000, ap 35 42.0 */ 765 compatible = "ti,sysc"; 766 status = "disabled"; 767 #address-cells = <1>; 768 #size-cells = <1>; 769 ranges = <0x0 0x4000 0x1000>; 770 }; 771 772 target-module@6000 { /* 0x4a206000, ap 37 4a.0 */ 773 compatible = "ti,sysc"; 774 status = "disabled"; 775 #address-cells = <1>; 776 #size-cells = <1>; 777 ranges = <0x0 0x6000 0x1000>; 778 }; 779 780 target-module@a000 { /* 0x4a20a000, ap 33 2c.0 */ 781 compatible = "ti,sysc"; 782 status = "disabled"; 783 #address-cells = <1>; 784 #size-cells = <1>; 785 ranges = <0x0 0xa000 0x1000>; 786 }; 787 788 target-module@c000 { /* 0x4a20c000, ap 41 20.0 */ 789 compatible = "ti,sysc"; 790 status = "disabled"; 791 #address-cells = <1>; 792 #size-cells = <1>; 793 ranges = <0x0 0xc000 0x1000>; 794 }; 795 796 target-module@10000 { /* 0x4a210000, ap 43 52.0 */ 797 compatible = "ti,sysc"; 798 status = "disabled"; 799 #address-cells = <1>; 800 #size-cells = <1>; 801 ranges = <0x0 0x10000 0x1000>; 802 }; 803 804 target-module@12000 { /* 0x4a212000, ap 39 18.0 */ 805 compatible = "ti,sysc"; 806 status = "disabled"; 807 #address-cells = <1>; 808 #size-cells = <1>; 809 ranges = <0x0 0x12000 0x1000>; 810 }; 811 812 target-module@14000 { /* 0x4a214000, ap 47 30.0 */ 813 compatible = "ti,sysc"; 814 status = "disabled"; 815 #address-cells = <1>; 816 #size-cells = <1>; 817 ranges = <0x0 0x14000 0x1000>; 818 }; 819 820 target-module@16000 { /* 0x4a216000, ap 45 28.0 */ 821 compatible = "ti,sysc"; 822 status = "disabled"; 823 #address-cells = <1>; 824 #size-cells = <1>; 825 ranges = <0x0 0x16000 0x1000>; 826 }; 827 828 target-module@18000 { /* 0x4a218000, ap 49 38.0 */ 829 compatible = "ti,sysc"; 830 status = "disabled"; 831 #address-cells = <1>; 832 #size-cells = <1>; 833 ranges = <0x0 0x18000 0x1000>; 834 }; 835 836 target-module@1c000 { /* 0x4a21c000, ap 59 5a.0 */ 837 compatible = "ti,sysc"; 838 status = "disabled"; 839 #address-cells = <1>; 840 #size-cells = <1>; 841 ranges = <0x0 0x1c000 0x1000>; 842 }; 843 844 target-module@1e000 { /* 0x4a21e000, ap 31 10.0 */ 845 compatible = "ti,sysc"; 846 status = "disabled"; 847 #address-cells = <1>; 848 #size-cells = <1>; 849 ranges = <0x0 0x1e000 0x1000>; 850 }; 851 852 target-module@20000 { /* 0x4a220000, ap 51 40.0 */ 853 compatible = "ti,sysc"; 854 status = "disabled"; 855 #address-cells = <1>; 856 #size-cells = <1>; 857 ranges = <0x0 0x20000 0x1000>; 858 }; 859 860 target-module@26000 { /* 0x4a226000, ap 53 34.0 */ 861 compatible = "ti,sysc"; 862 status = "disabled"; 863 #address-cells = <1>; 864 #size-cells = <1>; 865 ranges = <0x0 0x26000 0x1000>; 866 }; 867 868 target-module@28000 { /* 0x4a228000, ap 55 2e.0 */ 869 compatible = "ti,sysc"; 870 status = "disabled"; 871 #address-cells = <1>; 872 #size-cells = <1>; 873 ranges = <0x0 0x28000 0x1000>; 874 }; 875 876 target-module@2a000 { /* 0x4a22a000, ap 57 48.0 */ 877 compatible = "ti,sysc"; 878 status = "disabled"; 879 #address-cells = <1>; 880 #size-cells = <1>; 881 ranges = <0x0 0x2a000 0x1000>; 882 }; 883 }; 884 885 segment@280000 { /* 0x4a280000 */ 886 compatible = "simple-bus"; 887 #address-cells = <1>; 888 #size-cells = <1>; 889 }; 890 891 l4_cfg_segment_300000: segment@300000 { /* 0x4a300000 */ 892 compatible = "simple-bus"; 893 #address-cells = <1>; 894 #size-cells = <1>; 895 ranges = <0x00000000 0x00300000 0x020000>, /* ap 67 */ 896 <0x00040000 0x00340000 0x001000>, /* ap 68 */ 897 <0x00020000 0x00320000 0x004000>, /* ap 71 */ 898 <0x00024000 0x00324000 0x002000>, /* ap 72 */ 899 <0x00026000 0x00326000 0x001000>, /* ap 73 */ 900 <0x00027000 0x00327000 0x001000>, /* ap 74 */ 901 <0x00028000 0x00328000 0x001000>, /* ap 75 */ 902 <0x00029000 0x00329000 0x001000>, /* ap 76 */ 903 <0x00030000 0x00330000 0x010000>, /* ap 77 */ 904 <0x0002a000 0x0032a000 0x002000>, /* ap 90 */ 905 <0x0002c000 0x0032c000 0x004000>; /* ap 91 */ 906 907 l4_cfg_target_0: target-module@0 { /* 0x4a300000, ap 67 14.0 */ 908 compatible = "ti,sysc"; 909 status = "disabled"; 910 #address-cells = <1>; 911 #size-cells = <1>; 912 ranges = <0x00000000 0x00000000 0x00020000>, 913 <0x00020000 0x00020000 0x00004000>, 914 <0x00024000 0x00024000 0x00002000>, 915 <0x00026000 0x00026000 0x00001000>, 916 <0x00027000 0x00027000 0x00001000>, 917 <0x00028000 0x00028000 0x00001000>, 918 <0x00029000 0x00029000 0x00001000>, 919 <0x0002a000 0x0002a000 0x00002000>, 920 <0x0002c000 0x0002c000 0x00004000>, 921 <0x00030000 0x00030000 0x00010000>; 922 }; 923 }; 924}; 925 926&l4_wkup { /* 0x4a300000 */ 927 compatible = "ti,omap4-l4-wkup", "simple-bus"; 928 reg = <0x4a300000 0x800>, 929 <0x4a300800 0x800>, 930 <0x4a301000 0x1000>; 931 reg-names = "ap", "la", "ia0"; 932 #address-cells = <1>; 933 #size-cells = <1>; 934 ranges = <0x00000000 0x4a300000 0x010000>, /* segment 0 */ 935 <0x00010000 0x4a310000 0x010000>, /* segment 1 */ 936 <0x00020000 0x4a320000 0x010000>; /* segment 2 */ 937 938 segment@0 { /* 0x4a300000 */ 939 compatible = "simple-bus"; 940 #address-cells = <1>; 941 #size-cells = <1>; 942 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */ 943 <0x00001000 0x00001000 0x001000>, /* ap 1 */ 944 <0x00000800 0x00000800 0x000800>, /* ap 2 */ 945 <0x00006000 0x00006000 0x002000>, /* ap 3 */ 946 <0x00008000 0x00008000 0x001000>, /* ap 4 */ 947 <0x0000a000 0x0000a000 0x001000>, /* ap 15 */ 948 <0x0000b000 0x0000b000 0x001000>, /* ap 16 */ 949 <0x00004000 0x00004000 0x001000>, /* ap 17 */ 950 <0x00005000 0x00005000 0x001000>, /* ap 18 */ 951 <0x0000c000 0x0000c000 0x001000>, /* ap 19 */ 952 <0x0000d000 0x0000d000 0x001000>; /* ap 20 */ 953 954 target-module@4000 { /* 0x4a304000, ap 17 24.0 */ 955 compatible = "ti,sysc-omap2", "ti,sysc"; 956 ti,hwmods = "counter_32k"; 957 reg = <0x4000 0x4>, 958 <0x4004 0x4>; 959 reg-names = "rev", "sysc"; 960 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 961 <SYSC_IDLE_NO>; 962 /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */ 963 clocks = <&l4_wkup_clkctrl OMAP4_COUNTER_32K_CLKCTRL 0>; 964 clock-names = "fck"; 965 #address-cells = <1>; 966 #size-cells = <1>; 967 ranges = <0x0 0x4000 0x1000>; 968 969 counter32k: counter@0 { 970 compatible = "ti,omap-counter32k"; 971 reg = <0x0 0x20>; 972 }; 973 }; 974 975 target-module@6000 { /* 0x4a306000, ap 3 08.0 */ 976 compatible = "ti,sysc-omap4", "ti,sysc"; 977 reg = <0x6000 0x4>; 978 reg-names = "rev"; 979 #address-cells = <1>; 980 #size-cells = <1>; 981 ranges = <0x0 0x6000 0x2000>; 982 983 prm: prm@0 { 984 compatible = "ti,omap4-prm"; 985 reg = <0x0 0x2000>; 986 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 987 #address-cells = <1>; 988 #size-cells = <1>; 989 ranges = <0 0 0x2000>; 990 991 prm_clocks: clocks { 992 #address-cells = <1>; 993 #size-cells = <0>; 994 }; 995 996 prm_clockdomains: clockdomains { 997 }; 998 }; 999 }; 1000 1001 target-module@a000 { /* 0x4a30a000, ap 15 34.0 */ 1002 compatible = "ti,sysc-omap4", "ti,sysc"; 1003 reg = <0xa000 0x4>; 1004 reg-names = "rev"; 1005 #address-cells = <1>; 1006 #size-cells = <1>; 1007 ranges = <0x0 0xa000 0x1000>; 1008 1009 scrm: scrm@0 { 1010 compatible = "ti,omap4-scrm"; 1011 reg = <0x0 0x2000>; 1012 1013 scrm_clocks: clocks { 1014 #address-cells = <1>; 1015 #size-cells = <0>; 1016 }; 1017 1018 scrm_clockdomains: clockdomains { 1019 }; 1020 }; 1021 }; 1022 1023 target-module@c000 { /* 0x4a30c000, ap 19 2c.0 */ 1024 compatible = "ti,sysc-omap4", "ti,sysc"; 1025 ti,hwmods = "ctrl_module_wkup"; 1026 reg = <0xc000 0x4>, 1027 <0xc010 0x4>; 1028 reg-names = "rev", "sysc"; 1029 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1030 <SYSC_IDLE_NO>, 1031 <SYSC_IDLE_SMART>, 1032 <SYSC_IDLE_SMART_WKUP>; 1033 /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */ 1034 #address-cells = <1>; 1035 #size-cells = <1>; 1036 ranges = <0x0 0xc000 0x1000>; 1037 1038 omap4_scm_wkup: scm@c000 { 1039 compatible = "ti,omap4-scm-wkup"; 1040 reg = <0xc000 0x1000>; 1041 }; 1042 }; 1043 }; 1044 1045 segment@10000 { /* 0x4a310000 */ 1046 compatible = "simple-bus"; 1047 #address-cells = <1>; 1048 #size-cells = <1>; 1049 ranges = <0x00000000 0x00010000 0x001000>, /* ap 5 */ 1050 <0x00001000 0x00011000 0x001000>, /* ap 6 */ 1051 <0x00004000 0x00014000 0x001000>, /* ap 7 */ 1052 <0x00005000 0x00015000 0x001000>, /* ap 8 */ 1053 <0x00008000 0x00018000 0x001000>, /* ap 9 */ 1054 <0x00009000 0x00019000 0x001000>, /* ap 10 */ 1055 <0x0000c000 0x0001c000 0x001000>, /* ap 11 */ 1056 <0x0000d000 0x0001d000 0x001000>, /* ap 12 */ 1057 <0x0000e000 0x0001e000 0x001000>, /* ap 21 */ 1058 <0x0000f000 0x0001f000 0x001000>; /* ap 22 */ 1059 1060 gpio1_target: target-module@0 { /* 0x4a310000, ap 5 14.0 */ 1061 compatible = "ti,sysc-omap2", "ti,sysc"; 1062 ti,hwmods = "gpio1"; 1063 reg = <0x0 0x4>, 1064 <0x10 0x4>, 1065 <0x114 0x4>; 1066 reg-names = "rev", "sysc", "syss"; 1067 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1068 SYSC_OMAP2_SOFTRESET | 1069 SYSC_OMAP2_AUTOIDLE)>; 1070 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1071 <SYSC_IDLE_NO>, 1072 <SYSC_IDLE_SMART>, 1073 <SYSC_IDLE_SMART_WKUP>; 1074 ti,syss-mask = <1>; 1075 /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */ 1076 clocks = <&l4_wkup_clkctrl OMAP4_GPIO1_CLKCTRL 0>, 1077 <&l4_wkup_clkctrl OMAP4_GPIO1_CLKCTRL 8>; 1078 clock-names = "fck", "dbclk"; 1079 #address-cells = <1>; 1080 #size-cells = <1>; 1081 ranges = <0x0 0x0 0x1000>; 1082 1083 gpio1: gpio@0 { 1084 compatible = "ti,omap4-gpio"; 1085 reg = <0x0 0x200>; 1086 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 1087 ti,gpio-always-on; 1088 gpio-controller; 1089 #gpio-cells = <2>; 1090 interrupt-controller; 1091 #interrupt-cells = <2>; 1092 }; 1093 }; 1094 1095 target-module@4000 { /* 0x4a314000, ap 7 18.0 */ 1096 compatible = "ti,sysc-omap2", "ti,sysc"; 1097 ti,hwmods = "wd_timer2"; 1098 reg = <0x4000 0x4>, 1099 <0x4010 0x4>, 1100 <0x4014 0x4>; 1101 reg-names = "rev", "sysc", "syss"; 1102 ti,sysc-mask = <(SYSC_OMAP2_EMUFREE | 1103 SYSC_OMAP2_SOFTRESET)>; 1104 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1105 <SYSC_IDLE_NO>, 1106 <SYSC_IDLE_SMART>, 1107 <SYSC_IDLE_SMART_WKUP>; 1108 ti,syss-mask = <1>; 1109 /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */ 1110 clocks = <&l4_wkup_clkctrl OMAP4_WD_TIMER2_CLKCTRL 0>; 1111 clock-names = "fck"; 1112 #address-cells = <1>; 1113 #size-cells = <1>; 1114 ranges = <0x0 0x4000 0x1000>; 1115 1116 wdt2: wdt@0 { 1117 compatible = "ti,omap4-wdt", "ti,omap3-wdt"; 1118 reg = <0x0 0x80>; 1119 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; 1120 }; 1121 }; 1122 1123 target-module@8000 { /* 0x4a318000, ap 9 1c.0 */ 1124 compatible = "ti,sysc-omap2-timer", "ti,sysc"; 1125 ti,hwmods = "timer1"; 1126 reg = <0x8000 0x4>, 1127 <0x8010 0x4>, 1128 <0x8014 0x4>; 1129 reg-names = "rev", "sysc", "syss"; 1130 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1131 SYSC_OMAP2_EMUFREE | 1132 SYSC_OMAP2_ENAWAKEUP | 1133 SYSC_OMAP2_SOFTRESET | 1134 SYSC_OMAP2_AUTOIDLE)>; 1135 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1136 <SYSC_IDLE_NO>, 1137 <SYSC_IDLE_SMART>; 1138 ti,syss-mask = <1>; 1139 /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */ 1140 clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 0>; 1141 clock-names = "fck"; 1142 #address-cells = <1>; 1143 #size-cells = <1>; 1144 ranges = <0x0 0x8000 0x1000>; 1145 1146 timer1: timer@0 { 1147 compatible = "ti,omap3430-timer"; 1148 reg = <0x0 0x80>; 1149 clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>; 1150 clock-names = "fck"; 1151 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 1152 ti,timer-alwon; 1153 }; 1154 }; 1155 1156 target-module@c000 { /* 0x4a31c000, ap 11 20.0 */ 1157 compatible = "ti,sysc-omap2", "ti,sysc"; 1158 ti,hwmods = "kbd"; 1159 reg = <0xc000 0x4>, 1160 <0xc010 0x4>, 1161 <0xc014 0x4>; 1162 reg-names = "rev", "sysc", "syss"; 1163 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1164 SYSC_OMAP2_EMUFREE | 1165 SYSC_OMAP2_ENAWAKEUP | 1166 SYSC_OMAP2_SOFTRESET | 1167 SYSC_OMAP2_AUTOIDLE)>; 1168 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1169 <SYSC_IDLE_NO>, 1170 <SYSC_IDLE_SMART>; 1171 ti,syss-mask = <1>; 1172 /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */ 1173 clocks = <&l4_wkup_clkctrl OMAP4_KBD_CLKCTRL 0>; 1174 clock-names = "fck"; 1175 #address-cells = <1>; 1176 #size-cells = <1>; 1177 ranges = <0x0 0xc000 0x1000>; 1178 1179 keypad: keypad@0 { 1180 compatible = "ti,omap4-keypad"; 1181 reg = <0x0 0x80>; 1182 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 1183 reg-names = "mpu"; 1184 }; 1185 }; 1186 1187 target-module@e000 { /* 0x4a31e000, ap 21 30.0 */ 1188 compatible = "ti,sysc-omap4", "ti,sysc"; 1189 ti,hwmods = "ctrl_module_pad_wkup"; 1190 reg = <0xe000 0x4>, 1191 <0xe010 0x4>; 1192 reg-names = "rev", "sysc"; 1193 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1194 <SYSC_IDLE_NO>, 1195 <SYSC_IDLE_SMART>, 1196 <SYSC_IDLE_SMART_WKUP>; 1197 /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */ 1198 #address-cells = <1>; 1199 #size-cells = <1>; 1200 ranges = <0x0 0xe000 0x1000>; 1201 1202 omap4_pmx_wkup: pinmux@40 { 1203 compatible = "ti,omap4-padconf", 1204 "pinctrl-single"; 1205 reg = <0x40 0x0038>; 1206 #address-cells = <1>; 1207 #size-cells = <0>; 1208 #pinctrl-cells = <1>; 1209 #interrupt-cells = <1>; 1210 interrupt-controller; 1211 pinctrl-single,register-width = <16>; 1212 pinctrl-single,function-mask = <0x7fff>; 1213 }; 1214 }; 1215 }; 1216 1217 segment@20000 { /* 0x4a320000 */ 1218 compatible = "simple-bus"; 1219 #address-cells = <1>; 1220 #size-cells = <1>; 1221 ranges = <0x00006000 0x00026000 0x001000>, /* ap 13 */ 1222 <0x0000a000 0x0002a000 0x001000>, /* ap 14 */ 1223 <0x00000000 0x00020000 0x001000>, /* ap 23 */ 1224 <0x00001000 0x00021000 0x001000>, /* ap 24 */ 1225 <0x00002000 0x00022000 0x001000>, /* ap 25 */ 1226 <0x00003000 0x00023000 0x001000>, /* ap 26 */ 1227 <0x00004000 0x00024000 0x001000>, /* ap 27 */ 1228 <0x00005000 0x00025000 0x001000>, /* ap 28 */ 1229 <0x00007000 0x00027000 0x000400>, /* ap 29 */ 1230 <0x00008000 0x00028000 0x000800>, /* ap 30 */ 1231 <0x00009000 0x00029000 0x000400>; /* ap 31 */ 1232 1233 target-module@0 { /* 0x4a320000, ap 23 04.0 */ 1234 compatible = "ti,sysc"; 1235 status = "disabled"; 1236 #address-cells = <1>; 1237 #size-cells = <1>; 1238 ranges = <0x0 0x0 0x1000>; 1239 }; 1240 1241 target-module@2000 { /* 0x4a322000, ap 25 0c.0 */ 1242 compatible = "ti,sysc"; 1243 status = "disabled"; 1244 #address-cells = <1>; 1245 #size-cells = <1>; 1246 ranges = <0x0 0x2000 0x1000>; 1247 }; 1248 1249 target-module@4000 { /* 0x4a324000, ap 27 10.0 */ 1250 compatible = "ti,sysc"; 1251 status = "disabled"; 1252 #address-cells = <1>; 1253 #size-cells = <1>; 1254 ranges = <0x0 0x4000 0x1000>; 1255 }; 1256 1257 target-module@6000 { /* 0x4a326000, ap 13 28.0 */ 1258 compatible = "ti,sysc"; 1259 status = "disabled"; 1260 #address-cells = <1>; 1261 #size-cells = <1>; 1262 ranges = <0x00000000 0x00006000 0x00001000>, 1263 <0x00001000 0x00007000 0x00000400>, 1264 <0x00002000 0x00008000 0x00000800>, 1265 <0x00003000 0x00009000 0x00000400>; 1266 }; 1267 }; 1268}; 1269 1270&l4_per { /* 0x48000000 */ 1271 compatible = "ti,omap4-l4-per", "simple-bus"; 1272 reg = <0x48000000 0x800>, 1273 <0x48000800 0x800>, 1274 <0x48001000 0x400>, 1275 <0x48001400 0x400>, 1276 <0x48001800 0x400>, 1277 <0x48001c00 0x400>; 1278 reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3"; 1279 #address-cells = <1>; 1280 #size-cells = <1>; 1281 ranges = <0x00000000 0x48000000 0x200000>, /* segment 0 */ 1282 <0x00200000 0x48200000 0x200000>; /* segment 1 */ 1283 1284 segment@0 { /* 0x48000000 */ 1285 compatible = "simple-bus"; 1286 #address-cells = <1>; 1287 #size-cells = <1>; 1288 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */ 1289 <0x00001000 0x00001000 0x000400>, /* ap 1 */ 1290 <0x00000800 0x00000800 0x000800>, /* ap 2 */ 1291 <0x00020000 0x00020000 0x001000>, /* ap 3 */ 1292 <0x00021000 0x00021000 0x001000>, /* ap 4 */ 1293 <0x00032000 0x00032000 0x001000>, /* ap 5 */ 1294 <0x00033000 0x00033000 0x001000>, /* ap 6 */ 1295 <0x00034000 0x00034000 0x001000>, /* ap 7 */ 1296 <0x00035000 0x00035000 0x001000>, /* ap 8 */ 1297 <0x00036000 0x00036000 0x001000>, /* ap 9 */ 1298 <0x00037000 0x00037000 0x001000>, /* ap 10 */ 1299 <0x0003e000 0x0003e000 0x001000>, /* ap 11 */ 1300 <0x0003f000 0x0003f000 0x001000>, /* ap 12 */ 1301 <0x00040000 0x00040000 0x010000>, /* ap 13 */ 1302 <0x00050000 0x00050000 0x001000>, /* ap 14 */ 1303 <0x00055000 0x00055000 0x001000>, /* ap 15 */ 1304 <0x00056000 0x00056000 0x001000>, /* ap 16 */ 1305 <0x00057000 0x00057000 0x001000>, /* ap 17 */ 1306 <0x00058000 0x00058000 0x001000>, /* ap 18 */ 1307 <0x00059000 0x00059000 0x001000>, /* ap 19 */ 1308 <0x0005a000 0x0005a000 0x001000>, /* ap 20 */ 1309 <0x0005b000 0x0005b000 0x001000>, /* ap 21 */ 1310 <0x0005c000 0x0005c000 0x001000>, /* ap 22 */ 1311 <0x0005d000 0x0005d000 0x001000>, /* ap 23 */ 1312 <0x0005e000 0x0005e000 0x001000>, /* ap 24 */ 1313 <0x00060000 0x00060000 0x001000>, /* ap 25 */ 1314 <0x0006a000 0x0006a000 0x001000>, /* ap 26 */ 1315 <0x0006b000 0x0006b000 0x001000>, /* ap 27 */ 1316 <0x0006c000 0x0006c000 0x001000>, /* ap 28 */ 1317 <0x0006d000 0x0006d000 0x001000>, /* ap 29 */ 1318 <0x0006e000 0x0006e000 0x001000>, /* ap 30 */ 1319 <0x0006f000 0x0006f000 0x001000>, /* ap 31 */ 1320 <0x00070000 0x00070000 0x001000>, /* ap 32 */ 1321 <0x00071000 0x00071000 0x001000>, /* ap 33 */ 1322 <0x00072000 0x00072000 0x001000>, /* ap 34 */ 1323 <0x00073000 0x00073000 0x001000>, /* ap 35 */ 1324 <0x00061000 0x00061000 0x001000>, /* ap 36 */ 1325 <0x00096000 0x00096000 0x001000>, /* ap 37 */ 1326 <0x00097000 0x00097000 0x001000>, /* ap 38 */ 1327 <0x00076000 0x00076000 0x001000>, /* ap 39 */ 1328 <0x00077000 0x00077000 0x001000>, /* ap 40 */ 1329 <0x00078000 0x00078000 0x001000>, /* ap 41 */ 1330 <0x00079000 0x00079000 0x001000>, /* ap 42 */ 1331 <0x00086000 0x00086000 0x001000>, /* ap 43 */ 1332 <0x00087000 0x00087000 0x001000>, /* ap 44 */ 1333 <0x00088000 0x00088000 0x001000>, /* ap 45 */ 1334 <0x00089000 0x00089000 0x001000>, /* ap 46 */ 1335 <0x000b0000 0x000b0000 0x001000>, /* ap 47 */ 1336 <0x000b1000 0x000b1000 0x001000>, /* ap 48 */ 1337 <0x00098000 0x00098000 0x001000>, /* ap 49 */ 1338 <0x00099000 0x00099000 0x001000>, /* ap 50 */ 1339 <0x0009a000 0x0009a000 0x001000>, /* ap 51 */ 1340 <0x0009b000 0x0009b000 0x001000>, /* ap 52 */ 1341 <0x0009c000 0x0009c000 0x001000>, /* ap 53 */ 1342 <0x0009d000 0x0009d000 0x001000>, /* ap 54 */ 1343 <0x0009e000 0x0009e000 0x001000>, /* ap 55 */ 1344 <0x0009f000 0x0009f000 0x001000>, /* ap 56 */ 1345 <0x00090000 0x00090000 0x002000>, /* ap 57 */ 1346 <0x00092000 0x00092000 0x001000>, /* ap 58 */ 1347 <0x000a4000 0x000a4000 0x001000>, /* ap 59 */ 1348 <0x000a6000 0x000a6000 0x001000>, /* ap 60 */ 1349 <0x000a8000 0x000a8000 0x004000>, /* ap 61 */ 1350 <0x000ac000 0x000ac000 0x001000>, /* ap 62 */ 1351 <0x000ad000 0x000ad000 0x001000>, /* ap 63 */ 1352 <0x000ae000 0x000ae000 0x001000>, /* ap 64 */ 1353 <0x000b2000 0x000b2000 0x001000>, /* ap 65 */ 1354 <0x000b3000 0x000b3000 0x001000>, /* ap 66 */ 1355 <0x000b4000 0x000b4000 0x001000>, /* ap 67 */ 1356 <0x000b5000 0x000b5000 0x001000>, /* ap 68 */ 1357 <0x000b8000 0x000b8000 0x001000>, /* ap 69 */ 1358 <0x000b9000 0x000b9000 0x001000>, /* ap 70 */ 1359 <0x000ba000 0x000ba000 0x001000>, /* ap 71 */ 1360 <0x000bb000 0x000bb000 0x001000>, /* ap 72 */ 1361 <0x000d1000 0x000d1000 0x001000>, /* ap 73 */ 1362 <0x000d2000 0x000d2000 0x001000>, /* ap 74 */ 1363 <0x000d5000 0x000d5000 0x001000>, /* ap 75 */ 1364 <0x000d6000 0x000d6000 0x001000>, /* ap 76 */ 1365 <0x000a2000 0x000a2000 0x001000>, /* ap 79 */ 1366 <0x000a3000 0x000a3000 0x001000>, /* ap 80 */ 1367 <0x00001400 0x00001400 0x000400>, /* ap 81 */ 1368 <0x00001800 0x00001800 0x000400>, /* ap 82 */ 1369 <0x00001c00 0x00001c00 0x000400>, /* ap 83 */ 1370 <0x000a5000 0x000a5000 0x001000>; /* ap 84 */ 1371 1372 target-module@20000 { /* 0x48020000, ap 3 06.0 */ 1373 compatible = "ti,sysc-omap2", "ti,sysc"; 1374 ti,hwmods = "uart3"; 1375 reg = <0x20050 0x4>, 1376 <0x20054 0x4>, 1377 <0x20058 0x4>; 1378 reg-names = "rev", "sysc", "syss"; 1379 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1380 SYSC_OMAP2_SOFTRESET | 1381 SYSC_OMAP2_AUTOIDLE)>; 1382 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1383 <SYSC_IDLE_NO>, 1384 <SYSC_IDLE_SMART>, 1385 <SYSC_IDLE_SMART_WKUP>; 1386 ti,syss-mask = <1>; 1387 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 1388 clocks = <&l4_per_clkctrl OMAP4_UART3_CLKCTRL 0>; 1389 clock-names = "fck"; 1390 #address-cells = <1>; 1391 #size-cells = <1>; 1392 ranges = <0x0 0x20000 0x1000>; 1393 1394 uart3: serial@0 { 1395 compatible = "ti,omap4-uart"; 1396 reg = <0x0 0x100>; 1397 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 1398 clock-frequency = <48000000>; 1399 }; 1400 }; 1401 1402 target-module@32000 { /* 0x48032000, ap 5 02.0 */ 1403 compatible = "ti,sysc-omap2-timer", "ti,sysc"; 1404 ti,hwmods = "timer2"; 1405 reg = <0x32000 0x4>, 1406 <0x32010 0x4>, 1407 <0x32014 0x4>; 1408 reg-names = "rev", "sysc", "syss"; 1409 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1410 SYSC_OMAP2_EMUFREE | 1411 SYSC_OMAP2_ENAWAKEUP | 1412 SYSC_OMAP2_SOFTRESET | 1413 SYSC_OMAP2_AUTOIDLE)>; 1414 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1415 <SYSC_IDLE_NO>, 1416 <SYSC_IDLE_SMART>; 1417 ti,syss-mask = <1>; 1418 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 1419 clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 0>; 1420 clock-names = "fck"; 1421 #address-cells = <1>; 1422 #size-cells = <1>; 1423 ranges = <0x0 0x32000 0x1000>; 1424 1425 timer2: timer@0 { 1426 compatible = "ti,omap3430-timer"; 1427 reg = <0x0 0x80>; 1428 clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 24>; 1429 clock-names = "fck"; 1430 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 1431 }; 1432 }; 1433 1434 target-module@34000 { /* 0x48034000, ap 7 04.0 */ 1435 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1436 ti,hwmods = "timer3"; 1437 reg = <0x34000 0x4>, 1438 <0x34010 0x4>; 1439 reg-names = "rev", "sysc"; 1440 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU | 1441 SYSC_OMAP4_SOFTRESET)>; 1442 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1443 <SYSC_IDLE_NO>, 1444 <SYSC_IDLE_SMART>, 1445 <SYSC_IDLE_SMART_WKUP>; 1446 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 1447 clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 0>; 1448 clock-names = "fck"; 1449 #address-cells = <1>; 1450 #size-cells = <1>; 1451 ranges = <0x0 0x34000 0x1000>; 1452 1453 timer3: timer@0 { 1454 compatible = "ti,omap4430-timer"; 1455 reg = <0x0 0x80>; 1456 clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 24>; 1457 clock-names = "fck"; 1458 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 1459 }; 1460 }; 1461 1462 target-module@36000 { /* 0x48036000, ap 9 0e.0 */ 1463 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1464 ti,hwmods = "timer4"; 1465 reg = <0x36000 0x4>, 1466 <0x36010 0x4>; 1467 reg-names = "rev", "sysc"; 1468 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU | 1469 SYSC_OMAP4_SOFTRESET)>; 1470 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1471 <SYSC_IDLE_NO>, 1472 <SYSC_IDLE_SMART>, 1473 <SYSC_IDLE_SMART_WKUP>; 1474 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 1475 clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 0>; 1476 clock-names = "fck"; 1477 #address-cells = <1>; 1478 #size-cells = <1>; 1479 ranges = <0x0 0x36000 0x1000>; 1480 1481 timer4: timer@0 { 1482 compatible = "ti,omap4430-timer"; 1483 reg = <0x0 0x80>; 1484 clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 24>; 1485 clock-names = "fck"; 1486 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 1487 }; 1488 }; 1489 1490 target-module@3e000 { /* 0x4803e000, ap 11 08.0 */ 1491 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1492 ti,hwmods = "timer9"; 1493 reg = <0x3e000 0x4>, 1494 <0x3e010 0x4>; 1495 reg-names = "rev", "sysc"; 1496 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU | 1497 SYSC_OMAP4_SOFTRESET)>; 1498 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1499 <SYSC_IDLE_NO>, 1500 <SYSC_IDLE_SMART>, 1501 <SYSC_IDLE_SMART_WKUP>; 1502 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 1503 clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 0>; 1504 clock-names = "fck"; 1505 #address-cells = <1>; 1506 #size-cells = <1>; 1507 ranges = <0x0 0x3e000 0x1000>; 1508 1509 timer9: timer@0 { 1510 compatible = "ti,omap4430-timer"; 1511 reg = <0x0 0x80>; 1512 clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>; 1513 clock-names = "fck"; 1514 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 1515 ti,timer-pwm; 1516 }; 1517 }; 1518 1519 target-module@40000 { /* 0x48040000, ap 13 0a.0 */ 1520 compatible = "ti,sysc"; 1521 status = "disabled"; 1522 #address-cells = <1>; 1523 #size-cells = <1>; 1524 ranges = <0x0 0x40000 0x10000>; 1525 }; 1526 1527 target-module@55000 { /* 0x48055000, ap 15 0c.0 */ 1528 compatible = "ti,sysc-omap2", "ti,sysc"; 1529 ti,hwmods = "gpio2"; 1530 reg = <0x55000 0x4>, 1531 <0x55010 0x4>, 1532 <0x55114 0x4>; 1533 reg-names = "rev", "sysc", "syss"; 1534 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1535 SYSC_OMAP2_SOFTRESET | 1536 SYSC_OMAP2_AUTOIDLE)>; 1537 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1538 <SYSC_IDLE_NO>, 1539 <SYSC_IDLE_SMART>, 1540 <SYSC_IDLE_SMART_WKUP>; 1541 ti,syss-mask = <1>; 1542 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 1543 clocks = <&l4_per_clkctrl OMAP4_GPIO2_CLKCTRL 0>, 1544 <&l4_per_clkctrl OMAP4_GPIO2_CLKCTRL 8>; 1545 clock-names = "fck", "dbclk"; 1546 #address-cells = <1>; 1547 #size-cells = <1>; 1548 ranges = <0x0 0x55000 0x1000>; 1549 1550 gpio2: gpio@0 { 1551 compatible = "ti,omap4-gpio"; 1552 reg = <0x0 0x200>; 1553 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1554 gpio-controller; 1555 #gpio-cells = <2>; 1556 interrupt-controller; 1557 #interrupt-cells = <2>; 1558 }; 1559 }; 1560 1561 target-module@57000 { /* 0x48057000, ap 17 16.0 */ 1562 compatible = "ti,sysc-omap2", "ti,sysc"; 1563 ti,hwmods = "gpio3"; 1564 reg = <0x57000 0x4>, 1565 <0x57010 0x4>, 1566 <0x57114 0x4>; 1567 reg-names = "rev", "sysc", "syss"; 1568 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1569 SYSC_OMAP2_SOFTRESET | 1570 SYSC_OMAP2_AUTOIDLE)>; 1571 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1572 <SYSC_IDLE_NO>, 1573 <SYSC_IDLE_SMART>, 1574 <SYSC_IDLE_SMART_WKUP>; 1575 ti,syss-mask = <1>; 1576 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 1577 clocks = <&l4_per_clkctrl OMAP4_GPIO3_CLKCTRL 0>, 1578 <&l4_per_clkctrl OMAP4_GPIO3_CLKCTRL 8>; 1579 clock-names = "fck", "dbclk"; 1580 #address-cells = <1>; 1581 #size-cells = <1>; 1582 ranges = <0x0 0x57000 0x1000>; 1583 1584 gpio3: gpio@0 { 1585 compatible = "ti,omap4-gpio"; 1586 reg = <0x0 0x200>; 1587 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 1588 gpio-controller; 1589 #gpio-cells = <2>; 1590 interrupt-controller; 1591 #interrupt-cells = <2>; 1592 }; 1593 }; 1594 1595 target-module@59000 { /* 0x48059000, ap 19 10.0 */ 1596 compatible = "ti,sysc-omap2", "ti,sysc"; 1597 ti,hwmods = "gpio4"; 1598 reg = <0x59000 0x4>, 1599 <0x59010 0x4>, 1600 <0x59114 0x4>; 1601 reg-names = "rev", "sysc", "syss"; 1602 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1603 SYSC_OMAP2_SOFTRESET | 1604 SYSC_OMAP2_AUTOIDLE)>; 1605 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1606 <SYSC_IDLE_NO>, 1607 <SYSC_IDLE_SMART>, 1608 <SYSC_IDLE_SMART_WKUP>; 1609 ti,syss-mask = <1>; 1610 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 1611 clocks = <&l4_per_clkctrl OMAP4_GPIO4_CLKCTRL 0>, 1612 <&l4_per_clkctrl OMAP4_GPIO4_CLKCTRL 8>; 1613 clock-names = "fck", "dbclk"; 1614 #address-cells = <1>; 1615 #size-cells = <1>; 1616 ranges = <0x0 0x59000 0x1000>; 1617 1618 gpio4: gpio@0 { 1619 compatible = "ti,omap4-gpio"; 1620 reg = <0x0 0x200>; 1621 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 1622 gpio-controller; 1623 #gpio-cells = <2>; 1624 interrupt-controller; 1625 #interrupt-cells = <2>; 1626 }; 1627 }; 1628 1629 target-module@5b000 { /* 0x4805b000, ap 21 12.0 */ 1630 compatible = "ti,sysc-omap2", "ti,sysc"; 1631 ti,hwmods = "gpio5"; 1632 reg = <0x5b000 0x4>, 1633 <0x5b010 0x4>, 1634 <0x5b114 0x4>; 1635 reg-names = "rev", "sysc", "syss"; 1636 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1637 SYSC_OMAP2_SOFTRESET | 1638 SYSC_OMAP2_AUTOIDLE)>; 1639 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1640 <SYSC_IDLE_NO>, 1641 <SYSC_IDLE_SMART>, 1642 <SYSC_IDLE_SMART_WKUP>; 1643 ti,syss-mask = <1>; 1644 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 1645 clocks = <&l4_per_clkctrl OMAP4_GPIO5_CLKCTRL 0>, 1646 <&l4_per_clkctrl OMAP4_GPIO5_CLKCTRL 8>; 1647 clock-names = "fck", "dbclk"; 1648 #address-cells = <1>; 1649 #size-cells = <1>; 1650 ranges = <0x0 0x5b000 0x1000>; 1651 1652 gpio5: gpio@0 { 1653 compatible = "ti,omap4-gpio"; 1654 reg = <0x0 0x200>; 1655 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 1656 gpio-controller; 1657 #gpio-cells = <2>; 1658 interrupt-controller; 1659 #interrupt-cells = <2>; 1660 }; 1661 }; 1662 1663 target-module@5d000 { /* 0x4805d000, ap 23 14.0 */ 1664 compatible = "ti,sysc-omap2", "ti,sysc"; 1665 ti,hwmods = "gpio6"; 1666 reg = <0x5d000 0x4>, 1667 <0x5d010 0x4>, 1668 <0x5d114 0x4>; 1669 reg-names = "rev", "sysc", "syss"; 1670 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1671 SYSC_OMAP2_SOFTRESET | 1672 SYSC_OMAP2_AUTOIDLE)>; 1673 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1674 <SYSC_IDLE_NO>, 1675 <SYSC_IDLE_SMART>, 1676 <SYSC_IDLE_SMART_WKUP>; 1677 ti,syss-mask = <1>; 1678 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 1679 clocks = <&l4_per_clkctrl OMAP4_GPIO6_CLKCTRL 0>, 1680 <&l4_per_clkctrl OMAP4_GPIO6_CLKCTRL 8>; 1681 clock-names = "fck", "dbclk"; 1682 #address-cells = <1>; 1683 #size-cells = <1>; 1684 ranges = <0x0 0x5d000 0x1000>; 1685 1686 gpio6: gpio@0 { 1687 compatible = "ti,omap4-gpio"; 1688 reg = <0x0 0x200>; 1689 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 1690 gpio-controller; 1691 #gpio-cells = <2>; 1692 interrupt-controller; 1693 #interrupt-cells = <2>; 1694 }; 1695 }; 1696 1697 target-module@60000 { /* 0x48060000, ap 25 1e.0 */ 1698 compatible = "ti,sysc-omap2", "ti,sysc"; 1699 ti,hwmods = "i2c3"; 1700 reg = <0x60000 0x8>, 1701 <0x60010 0x8>, 1702 <0x60090 0x8>; 1703 reg-names = "rev", "sysc", "syss"; 1704 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1705 SYSC_OMAP2_ENAWAKEUP | 1706 SYSC_OMAP2_SOFTRESET | 1707 SYSC_OMAP2_AUTOIDLE)>; 1708 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1709 <SYSC_IDLE_NO>, 1710 <SYSC_IDLE_SMART>, 1711 <SYSC_IDLE_SMART_WKUP>; 1712 ti,syss-mask = <1>; 1713 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 1714 clocks = <&l4_per_clkctrl OMAP4_I2C3_CLKCTRL 0>; 1715 clock-names = "fck"; 1716 #address-cells = <1>; 1717 #size-cells = <1>; 1718 ranges = <0x0 0x60000 0x1000>; 1719 1720 i2c3: i2c@0 { 1721 compatible = "ti,omap4-i2c"; 1722 reg = <0x0 0x100>; 1723 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; 1724 #address-cells = <1>; 1725 #size-cells = <0>; 1726 }; 1727 }; 1728 1729 target-module@6a000 { /* 0x4806a000, ap 26 18.0 */ 1730 compatible = "ti,sysc-omap2", "ti,sysc"; 1731 ti,hwmods = "uart1"; 1732 reg = <0x6a050 0x4>, 1733 <0x6a054 0x4>, 1734 <0x6a058 0x4>; 1735 reg-names = "rev", "sysc", "syss"; 1736 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1737 SYSC_OMAP2_SOFTRESET | 1738 SYSC_OMAP2_AUTOIDLE)>; 1739 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1740 <SYSC_IDLE_NO>, 1741 <SYSC_IDLE_SMART>, 1742 <SYSC_IDLE_SMART_WKUP>; 1743 ti,syss-mask = <1>; 1744 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 1745 clocks = <&l4_per_clkctrl OMAP4_UART1_CLKCTRL 0>; 1746 clock-names = "fck"; 1747 #address-cells = <1>; 1748 #size-cells = <1>; 1749 ranges = <0x0 0x6a000 0x1000>; 1750 1751 uart1: serial@0 { 1752 compatible = "ti,omap4-uart"; 1753 reg = <0x0 0x100>; 1754 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 1755 clock-frequency = <48000000>; 1756 }; 1757 }; 1758 1759 target-module@6c000 { /* 0x4806c000, ap 28 20.0 */ 1760 compatible = "ti,sysc-omap2", "ti,sysc"; 1761 ti,hwmods = "uart2"; 1762 reg = <0x6c050 0x4>, 1763 <0x6c054 0x4>, 1764 <0x6c058 0x4>; 1765 reg-names = "rev", "sysc", "syss"; 1766 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1767 SYSC_OMAP2_SOFTRESET | 1768 SYSC_OMAP2_AUTOIDLE)>; 1769 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1770 <SYSC_IDLE_NO>, 1771 <SYSC_IDLE_SMART>, 1772 <SYSC_IDLE_SMART_WKUP>; 1773 ti,syss-mask = <1>; 1774 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 1775 clocks = <&l4_per_clkctrl OMAP4_UART2_CLKCTRL 0>; 1776 clock-names = "fck"; 1777 #address-cells = <1>; 1778 #size-cells = <1>; 1779 ranges = <0x0 0x6c000 0x1000>; 1780 1781 uart2: serial@0 { 1782 compatible = "ti,omap4-uart"; 1783 reg = <0x0 0x100>; 1784 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 1785 clock-frequency = <48000000>; 1786 }; 1787 }; 1788 1789 target-module@6e000 { /* 0x4806e000, ap 30 1c.1 */ 1790 compatible = "ti,sysc-omap2", "ti,sysc"; 1791 ti,hwmods = "uart4"; 1792 reg = <0x6e050 0x4>, 1793 <0x6e054 0x4>, 1794 <0x6e058 0x4>; 1795 reg-names = "rev", "sysc", "syss"; 1796 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1797 SYSC_OMAP2_SOFTRESET | 1798 SYSC_OMAP2_AUTOIDLE)>; 1799 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1800 <SYSC_IDLE_NO>, 1801 <SYSC_IDLE_SMART>, 1802 <SYSC_IDLE_SMART_WKUP>; 1803 ti,syss-mask = <1>; 1804 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 1805 clocks = <&l4_per_clkctrl OMAP4_UART4_CLKCTRL 0>; 1806 clock-names = "fck"; 1807 #address-cells = <1>; 1808 #size-cells = <1>; 1809 ranges = <0x0 0x6e000 0x1000>; 1810 1811 uart4: serial@0 { 1812 compatible = "ti,omap4-uart"; 1813 reg = <0x0 0x100>; 1814 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 1815 clock-frequency = <48000000>; 1816 }; 1817 }; 1818 1819 target-module@70000 { /* 0x48070000, ap 32 28.0 */ 1820 compatible = "ti,sysc-omap2", "ti,sysc"; 1821 ti,hwmods = "i2c1"; 1822 reg = <0x70000 0x8>, 1823 <0x70010 0x8>, 1824 <0x70090 0x8>; 1825 reg-names = "rev", "sysc", "syss"; 1826 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1827 SYSC_OMAP2_ENAWAKEUP | 1828 SYSC_OMAP2_SOFTRESET | 1829 SYSC_OMAP2_AUTOIDLE)>; 1830 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1831 <SYSC_IDLE_NO>, 1832 <SYSC_IDLE_SMART>, 1833 <SYSC_IDLE_SMART_WKUP>; 1834 ti,syss-mask = <1>; 1835 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 1836 clocks = <&l4_per_clkctrl OMAP4_I2C1_CLKCTRL 0>; 1837 clock-names = "fck"; 1838 #address-cells = <1>; 1839 #size-cells = <1>; 1840 ranges = <0x0 0x70000 0x1000>; 1841 1842 i2c1: i2c@0 { 1843 compatible = "ti,omap4-i2c"; 1844 reg = <0x0 0x100>; 1845 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 1846 #address-cells = <1>; 1847 #size-cells = <0>; 1848 }; 1849 }; 1850 1851 target-module@72000 { /* 0x48072000, ap 34 30.0 */ 1852 compatible = "ti,sysc-omap2", "ti,sysc"; 1853 ti,hwmods = "i2c2"; 1854 reg = <0x72000 0x8>, 1855 <0x72010 0x8>, 1856 <0x72090 0x8>; 1857 reg-names = "rev", "sysc", "syss"; 1858 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1859 SYSC_OMAP2_ENAWAKEUP | 1860 SYSC_OMAP2_SOFTRESET | 1861 SYSC_OMAP2_AUTOIDLE)>; 1862 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1863 <SYSC_IDLE_NO>, 1864 <SYSC_IDLE_SMART>, 1865 <SYSC_IDLE_SMART_WKUP>; 1866 ti,syss-mask = <1>; 1867 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 1868 clocks = <&l4_per_clkctrl OMAP4_I2C2_CLKCTRL 0>; 1869 clock-names = "fck"; 1870 #address-cells = <1>; 1871 #size-cells = <1>; 1872 ranges = <0x0 0x72000 0x1000>; 1873 1874 i2c2: i2c@0 { 1875 compatible = "ti,omap4-i2c"; 1876 reg = <0x0 0x100>; 1877 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; 1878 #address-cells = <1>; 1879 #size-cells = <0>; 1880 }; 1881 }; 1882 1883 target-module@76000 { /* 0x48076000, ap 39 38.0 */ 1884 compatible = "ti,sysc-omap4", "ti,sysc"; 1885 ti,hwmods = "slimbus2"; 1886 reg = <0x76000 0x4>, 1887 <0x76010 0x4>; 1888 reg-names = "rev", "sysc"; 1889 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1890 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1891 <SYSC_IDLE_NO>, 1892 <SYSC_IDLE_SMART>, 1893 <SYSC_IDLE_SMART_WKUP>; 1894 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 1895 clocks = <&l4_per_clkctrl OMAP4_SLIMBUS2_CLKCTRL 0>; 1896 clock-names = "fck"; 1897 #address-cells = <1>; 1898 #size-cells = <1>; 1899 ranges = <0x0 0x76000 0x1000>; 1900 1901 /* No child device binding or driver in mainline */ 1902 }; 1903 1904 target-module@78000 { /* 0x48078000, ap 41 1a.0 */ 1905 compatible = "ti,sysc-omap2", "ti,sysc"; 1906 ti,hwmods = "elm"; 1907 reg = <0x78000 0x4>, 1908 <0x78010 0x4>, 1909 <0x78014 0x4>; 1910 reg-names = "rev", "sysc", "syss"; 1911 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1912 SYSC_OMAP2_SOFTRESET | 1913 SYSC_OMAP2_AUTOIDLE)>; 1914 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1915 <SYSC_IDLE_NO>, 1916 <SYSC_IDLE_SMART>; 1917 ti,syss-mask = <1>; 1918 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 1919 clocks = <&l4_per_clkctrl OMAP4_ELM_CLKCTRL 0>; 1920 clock-names = "fck"; 1921 #address-cells = <1>; 1922 #size-cells = <1>; 1923 ranges = <0x0 0x78000 0x1000>; 1924 1925 elm: elm@0 { 1926 compatible = "ti,am3352-elm"; 1927 reg = <0x0 0x2000>; 1928 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 1929 status = "disabled"; 1930 }; 1931 }; 1932 1933 target-module@86000 { /* 0x48086000, ap 43 24.0 */ 1934 compatible = "ti,sysc-omap2-timer", "ti,sysc"; 1935 ti,hwmods = "timer10"; 1936 reg = <0x86000 0x4>, 1937 <0x86010 0x4>, 1938 <0x86014 0x4>; 1939 reg-names = "rev", "sysc", "syss"; 1940 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1941 SYSC_OMAP2_EMUFREE | 1942 SYSC_OMAP2_ENAWAKEUP | 1943 SYSC_OMAP2_SOFTRESET | 1944 SYSC_OMAP2_AUTOIDLE)>; 1945 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1946 <SYSC_IDLE_NO>, 1947 <SYSC_IDLE_SMART>; 1948 ti,syss-mask = <1>; 1949 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 1950 clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 0>; 1951 clock-names = "fck"; 1952 #address-cells = <1>; 1953 #size-cells = <1>; 1954 ranges = <0x0 0x86000 0x1000>; 1955 1956 timer10: timer@0 { 1957 compatible = "ti,omap3430-timer"; 1958 reg = <0x0 0x80>; 1959 clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 24>; 1960 clock-names = "fck"; 1961 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 1962 ti,timer-pwm; 1963 }; 1964 }; 1965 1966 target-module@88000 { /* 0x48088000, ap 45 2e.0 */ 1967 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1968 ti,hwmods = "timer11"; 1969 reg = <0x88000 0x4>, 1970 <0x88010 0x4>; 1971 reg-names = "rev", "sysc"; 1972 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU | 1973 SYSC_OMAP4_SOFTRESET)>; 1974 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1975 <SYSC_IDLE_NO>, 1976 <SYSC_IDLE_SMART>, 1977 <SYSC_IDLE_SMART_WKUP>; 1978 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 1979 clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 0>; 1980 clock-names = "fck"; 1981 #address-cells = <1>; 1982 #size-cells = <1>; 1983 ranges = <0x0 0x88000 0x1000>; 1984 1985 timer11: timer@0 { 1986 compatible = "ti,omap4430-timer"; 1987 reg = <0x0 0x80>; 1988 clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 24>; 1989 clock-names = "fck"; 1990 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 1991 ti,timer-pwm; 1992 }; 1993 }; 1994 1995 target-module@90000 { /* 0x48090000, ap 57 2a.0 */ 1996 compatible = "ti,sysc"; 1997 status = "disabled"; 1998 #address-cells = <1>; 1999 #size-cells = <1>; 2000 ranges = <0x0 0x90000 0x2000>; 2001 }; 2002 2003 target-module@96000 { /* 0x48096000, ap 37 26.0 */ 2004 compatible = "ti,sysc-omap2", "ti,sysc"; 2005 ti,hwmods = "mcbsp4"; 2006 reg = <0x9608c 0x4>; 2007 reg-names = "sysc"; 2008 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 2009 SYSC_OMAP2_ENAWAKEUP | 2010 SYSC_OMAP2_SOFTRESET)>; 2011 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2012 <SYSC_IDLE_NO>, 2013 <SYSC_IDLE_SMART>; 2014 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 2015 clocks = <&l4_per_clkctrl OMAP4_MCBSP4_CLKCTRL 0>; 2016 clock-names = "fck"; 2017 #address-cells = <1>; 2018 #size-cells = <1>; 2019 ranges = <0x0 0x96000 0x1000>; 2020 2021 mcbsp4: mcbsp@0 { 2022 compatible = "ti,omap4-mcbsp"; 2023 reg = <0x0 0xff>; /* L4 Interconnect */ 2024 reg-names = "mpu"; 2025 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 2026 interrupt-names = "common"; 2027 ti,buffer-size = <128>; 2028 dmas = <&sdma 31>, 2029 <&sdma 32>; 2030 dma-names = "tx", "rx"; 2031 status = "disabled"; 2032 }; 2033 }; 2034 2035 target-module@98000 { /* 0x48098000, ap 49 22.0 */ 2036 compatible = "ti,sysc-omap4", "ti,sysc"; 2037 ti,hwmods = "mcspi1"; 2038 reg = <0x98000 0x4>, 2039 <0x98010 0x4>; 2040 reg-names = "rev", "sysc"; 2041 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU | 2042 SYSC_OMAP4_SOFTRESET)>; 2043 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2044 <SYSC_IDLE_NO>, 2045 <SYSC_IDLE_SMART>, 2046 <SYSC_IDLE_SMART_WKUP>; 2047 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 2048 clocks = <&l4_per_clkctrl OMAP4_MCSPI1_CLKCTRL 0>; 2049 clock-names = "fck"; 2050 #address-cells = <1>; 2051 #size-cells = <1>; 2052 ranges = <0x0 0x98000 0x1000>; 2053 2054 mcspi1: spi@0 { 2055 compatible = "ti,omap4-mcspi"; 2056 reg = <0x0 0x200>; 2057 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 2058 #address-cells = <1>; 2059 #size-cells = <0>; 2060 ti,spi-num-cs = <4>; 2061 dmas = <&sdma 35>, 2062 <&sdma 36>, 2063 <&sdma 37>, 2064 <&sdma 38>, 2065 <&sdma 39>, 2066 <&sdma 40>, 2067 <&sdma 41>, 2068 <&sdma 42>; 2069 dma-names = "tx0", "rx0", "tx1", "rx1", 2070 "tx2", "rx2", "tx3", "rx3"; 2071 }; 2072 }; 2073 2074 target-module@9a000 { /* 0x4809a000, ap 51 2c.0 */ 2075 compatible = "ti,sysc-omap4", "ti,sysc"; 2076 ti,hwmods = "mcspi2"; 2077 reg = <0x9a000 0x4>, 2078 <0x9a010 0x4>; 2079 reg-names = "rev", "sysc"; 2080 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU | 2081 SYSC_OMAP4_SOFTRESET)>; 2082 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2083 <SYSC_IDLE_NO>, 2084 <SYSC_IDLE_SMART>, 2085 <SYSC_IDLE_SMART_WKUP>; 2086 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 2087 clocks = <&l4_per_clkctrl OMAP4_MCSPI2_CLKCTRL 0>; 2088 clock-names = "fck"; 2089 #address-cells = <1>; 2090 #size-cells = <1>; 2091 ranges = <0x0 0x9a000 0x1000>; 2092 2093 mcspi2: spi@0 { 2094 compatible = "ti,omap4-mcspi"; 2095 reg = <0x0 0x200>; 2096 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 2097 #address-cells = <1>; 2098 #size-cells = <0>; 2099 ti,spi-num-cs = <2>; 2100 dmas = <&sdma 43>, 2101 <&sdma 44>, 2102 <&sdma 45>, 2103 <&sdma 46>; 2104 dma-names = "tx0", "rx0", "tx1", "rx1"; 2105 }; 2106 }; 2107 2108 target-module@9c000 { /* 0x4809c000, ap 53 36.0 */ 2109 compatible = "ti,sysc-omap4", "ti,sysc"; 2110 ti,hwmods = "mmc1"; 2111 reg = <0x9c000 0x4>, 2112 <0x9c010 0x4>; 2113 reg-names = "rev", "sysc"; 2114 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU | 2115 SYSC_OMAP4_SOFTRESET)>; 2116 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2117 <SYSC_IDLE_NO>, 2118 <SYSC_IDLE_SMART>, 2119 <SYSC_IDLE_SMART_WKUP>; 2120 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2121 <SYSC_IDLE_NO>, 2122 <SYSC_IDLE_SMART>, 2123 <SYSC_IDLE_SMART_WKUP>; 2124 /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */ 2125 clocks = <&l3_init_clkctrl OMAP4_MMC1_CLKCTRL 0>; 2126 clock-names = "fck"; 2127 #address-cells = <1>; 2128 #size-cells = <1>; 2129 ranges = <0x0 0x9c000 0x1000>; 2130 2131 mmc1: mmc@0 { 2132 compatible = "ti,omap4-hsmmc"; 2133 reg = <0x0 0x400>; 2134 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 2135 ti,dual-volt; 2136 ti,needs-special-reset; 2137 dmas = <&sdma 61>, <&sdma 62>; 2138 dma-names = "tx", "rx"; 2139 pbias-supply = <&pbias_mmc_reg>; 2140 }; 2141 }; 2142 2143 target-module@9e000 { /* 0x4809e000, ap 55 48.0 */ 2144 compatible = "ti,sysc"; 2145 status = "disabled"; 2146 #address-cells = <1>; 2147 #size-cells = <1>; 2148 ranges = <0x0 0x9e000 0x1000>; 2149 }; 2150 2151 target-module@a2000 { /* 0x480a2000, ap 79 3a.0 */ 2152 compatible = "ti,sysc"; 2153 status = "disabled"; 2154 #address-cells = <1>; 2155 #size-cells = <1>; 2156 ranges = <0x0 0xa2000 0x1000>; 2157 }; 2158 2159 target-module@a4000 { /* 0x480a4000, ap 59 34.0 */ 2160 compatible = "ti,sysc"; 2161 status = "disabled"; 2162 #address-cells = <1>; 2163 #size-cells = <1>; 2164 ranges = <0x00000000 0x000a4000 0x00001000>, 2165 <0x00001000 0x000a5000 0x00001000>; 2166 }; 2167 2168 target-module@a8000 { /* 0x480a8000, ap 61 3e.0 */ 2169 compatible = "ti,sysc"; 2170 status = "disabled"; 2171 #address-cells = <1>; 2172 #size-cells = <1>; 2173 ranges = <0x0 0xa8000 0x4000>; 2174 }; 2175 2176 target-module@ad000 { /* 0x480ad000, ap 63 50.0 */ 2177 compatible = "ti,sysc-omap4", "ti,sysc"; 2178 ti,hwmods = "mmc3"; 2179 reg = <0xad000 0x4>, 2180 <0xad010 0x4>; 2181 reg-names = "rev", "sysc"; 2182 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU | 2183 SYSC_OMAP4_SOFTRESET)>; 2184 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2185 <SYSC_IDLE_NO>, 2186 <SYSC_IDLE_SMART>, 2187 <SYSC_IDLE_SMART_WKUP>; 2188 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2189 <SYSC_IDLE_NO>, 2190 <SYSC_IDLE_SMART>, 2191 <SYSC_IDLE_SMART_WKUP>; 2192 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 2193 clocks = <&l4_per_clkctrl OMAP4_MMC3_CLKCTRL 0>; 2194 clock-names = "fck"; 2195 #address-cells = <1>; 2196 #size-cells = <1>; 2197 ranges = <0x0 0xad000 0x1000>; 2198 2199 mmc3: mmc@0 { 2200 compatible = "ti,omap4-hsmmc"; 2201 reg = <0x0 0x400>; 2202 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 2203 ti,needs-special-reset; 2204 dmas = <&sdma 77>, <&sdma 78>; 2205 dma-names = "tx", "rx"; 2206 }; 2207 }; 2208 2209 target-module@b0000 { /* 0x480b0000, ap 47 40.0 */ 2210 compatible = "ti,sysc"; 2211 status = "disabled"; 2212 #address-cells = <1>; 2213 #size-cells = <1>; 2214 ranges = <0x0 0xb0000 0x1000>; 2215 }; 2216 2217 target-module@b2000 { /* 0x480b2000, ap 65 3c.0 */ 2218 compatible = "ti,sysc-omap2", "ti,sysc"; 2219 ti,hwmods = "hdq1w"; 2220 reg = <0xb2000 0x4>, 2221 <0xb2014 0x4>, 2222 <0xb2018 0x4>; 2223 reg-names = "rev", "sysc", "syss"; 2224 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | 2225 SYSC_OMAP2_AUTOIDLE)>; 2226 ti,syss-mask = <1>; 2227 ti,no-reset-on-init; 2228 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 2229 clocks = <&l4_per_clkctrl OMAP4_HDQ1W_CLKCTRL 0>; 2230 clock-names = "fck"; 2231 #address-cells = <1>; 2232 #size-cells = <1>; 2233 ranges = <0x0 0xb2000 0x1000>; 2234 2235 hdqw1w: 1w@0 { 2236 compatible = "ti,omap3-1w"; 2237 reg = <0x0 0x1000>; 2238 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 2239 }; 2240 }; 2241 2242 target-module@b4000 { /* 0x480b4000, ap 67 46.0 */ 2243 compatible = "ti,sysc-omap4", "ti,sysc"; 2244 ti,hwmods = "mmc2"; 2245 reg = <0xb4000 0x4>, 2246 <0xb4010 0x4>; 2247 reg-names = "rev", "sysc"; 2248 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU | 2249 SYSC_OMAP4_SOFTRESET)>; 2250 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2251 <SYSC_IDLE_NO>, 2252 <SYSC_IDLE_SMART>, 2253 <SYSC_IDLE_SMART_WKUP>; 2254 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2255 <SYSC_IDLE_NO>, 2256 <SYSC_IDLE_SMART>, 2257 <SYSC_IDLE_SMART_WKUP>; 2258 /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */ 2259 clocks = <&l3_init_clkctrl OMAP4_MMC2_CLKCTRL 0>; 2260 clock-names = "fck"; 2261 #address-cells = <1>; 2262 #size-cells = <1>; 2263 ranges = <0x0 0xb4000 0x1000>; 2264 2265 mmc2: mmc@0 { 2266 compatible = "ti,omap4-hsmmc"; 2267 reg = <0x0 0x400>; 2268 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 2269 ti,needs-special-reset; 2270 dmas = <&sdma 47>, <&sdma 48>; 2271 dma-names = "tx", "rx"; 2272 }; 2273 }; 2274 2275 target-module@b8000 { /* 0x480b8000, ap 69 58.0 */ 2276 compatible = "ti,sysc-omap4", "ti,sysc"; 2277 ti,hwmods = "mcspi3"; 2278 reg = <0xb8000 0x4>, 2279 <0xb8010 0x4>; 2280 reg-names = "rev", "sysc"; 2281 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU | 2282 SYSC_OMAP4_SOFTRESET)>; 2283 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2284 <SYSC_IDLE_NO>, 2285 <SYSC_IDLE_SMART>, 2286 <SYSC_IDLE_SMART_WKUP>; 2287 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 2288 clocks = <&l4_per_clkctrl OMAP4_MCSPI3_CLKCTRL 0>; 2289 clock-names = "fck"; 2290 #address-cells = <1>; 2291 #size-cells = <1>; 2292 ranges = <0x0 0xb8000 0x1000>; 2293 2294 mcspi3: spi@0 { 2295 compatible = "ti,omap4-mcspi"; 2296 reg = <0x0 0x200>; 2297 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 2298 #address-cells = <1>; 2299 #size-cells = <0>; 2300 ti,spi-num-cs = <2>; 2301 dmas = <&sdma 15>, <&sdma 16>; 2302 dma-names = "tx0", "rx0"; 2303 }; 2304 }; 2305 2306 target-module@ba000 { /* 0x480ba000, ap 71 32.0 */ 2307 compatible = "ti,sysc-omap4", "ti,sysc"; 2308 ti,hwmods = "mcspi4"; 2309 reg = <0xba000 0x4>, 2310 <0xba010 0x4>; 2311 reg-names = "rev", "sysc"; 2312 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU | 2313 SYSC_OMAP4_SOFTRESET)>; 2314 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2315 <SYSC_IDLE_NO>, 2316 <SYSC_IDLE_SMART>, 2317 <SYSC_IDLE_SMART_WKUP>; 2318 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 2319 clocks = <&l4_per_clkctrl OMAP4_MCSPI4_CLKCTRL 0>; 2320 clock-names = "fck"; 2321 #address-cells = <1>; 2322 #size-cells = <1>; 2323 ranges = <0x0 0xba000 0x1000>; 2324 2325 mcspi4: spi@0 { 2326 compatible = "ti,omap4-mcspi"; 2327 reg = <0x0 0x200>; 2328 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 2329 #address-cells = <1>; 2330 #size-cells = <0>; 2331 ti,spi-num-cs = <1>; 2332 dmas = <&sdma 70>, <&sdma 71>; 2333 dma-names = "tx0", "rx0"; 2334 }; 2335 }; 2336 2337 target-module@d1000 { /* 0x480d1000, ap 73 44.0 */ 2338 compatible = "ti,sysc-omap4", "ti,sysc"; 2339 ti,hwmods = "mmc4"; 2340 reg = <0xd1000 0x4>, 2341 <0xd1010 0x4>; 2342 reg-names = "rev", "sysc"; 2343 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU | 2344 SYSC_OMAP4_SOFTRESET)>; 2345 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2346 <SYSC_IDLE_NO>, 2347 <SYSC_IDLE_SMART>, 2348 <SYSC_IDLE_SMART_WKUP>; 2349 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2350 <SYSC_IDLE_NO>, 2351 <SYSC_IDLE_SMART>, 2352 <SYSC_IDLE_SMART_WKUP>; 2353 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 2354 clocks = <&l4_per_clkctrl OMAP4_MMC4_CLKCTRL 0>; 2355 clock-names = "fck"; 2356 #address-cells = <1>; 2357 #size-cells = <1>; 2358 ranges = <0x0 0xd1000 0x1000>; 2359 2360 mmc4: mmc@0 { 2361 compatible = "ti,omap4-hsmmc"; 2362 reg = <0x0 0x400>; 2363 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 2364 ti,needs-special-reset; 2365 dmas = <&sdma 57>, <&sdma 58>; 2366 dma-names = "tx", "rx"; 2367 }; 2368 }; 2369 2370 target-module@d5000 { /* 0x480d5000, ap 75 4e.0 */ 2371 compatible = "ti,sysc-omap4", "ti,sysc"; 2372 ti,hwmods = "mmc5"; 2373 reg = <0xd5000 0x4>, 2374 <0xd5010 0x4>; 2375 reg-names = "rev", "sysc"; 2376 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU | 2377 SYSC_OMAP4_SOFTRESET)>; 2378 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2379 <SYSC_IDLE_NO>, 2380 <SYSC_IDLE_SMART>, 2381 <SYSC_IDLE_SMART_WKUP>; 2382 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2383 <SYSC_IDLE_NO>, 2384 <SYSC_IDLE_SMART>, 2385 <SYSC_IDLE_SMART_WKUP>; 2386 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 2387 clocks = <&l4_per_clkctrl OMAP4_MMC5_CLKCTRL 0>; 2388 clock-names = "fck"; 2389 #address-cells = <1>; 2390 #size-cells = <1>; 2391 ranges = <0x0 0xd5000 0x1000>; 2392 2393 mmc5: mmc@0 { 2394 compatible = "ti,omap4-hsmmc"; 2395 reg = <0x0 0x400>; 2396 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 2397 ti,needs-special-reset; 2398 dmas = <&sdma 59>, <&sdma 60>; 2399 dma-names = "tx", "rx"; 2400 }; 2401 }; 2402 }; 2403 2404 segment@200000 { /* 0x48200000 */ 2405 compatible = "simple-bus"; 2406 #address-cells = <1>; 2407 #size-cells = <1>; 2408 ranges = <0x00150000 0x00350000 0x001000>, /* ap 77 */ 2409 <0x00151000 0x00351000 0x001000>; /* ap 78 */ 2410 2411 target-module@150000 { /* 0x48350000, ap 77 4c.0 */ 2412 compatible = "ti,sysc-omap2", "ti,sysc"; 2413 ti,hwmods = "i2c4"; 2414 reg = <0x150000 0x8>, 2415 <0x150010 0x8>, 2416 <0x150090 0x8>; 2417 reg-names = "rev", "sysc", "syss"; 2418 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 2419 SYSC_OMAP2_ENAWAKEUP | 2420 SYSC_OMAP2_SOFTRESET | 2421 SYSC_OMAP2_AUTOIDLE)>; 2422 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2423 <SYSC_IDLE_NO>, 2424 <SYSC_IDLE_SMART>, 2425 <SYSC_IDLE_SMART_WKUP>; 2426 ti,syss-mask = <1>; 2427 /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */ 2428 clocks = <&l4_per_clkctrl OMAP4_I2C4_CLKCTRL 0>; 2429 clock-names = "fck"; 2430 #address-cells = <1>; 2431 #size-cells = <1>; 2432 ranges = <0x0 0x150000 0x1000>; 2433 2434 i2c4: i2c@0 { 2435 compatible = "ti,omap4-i2c"; 2436 reg = <0x0 0x100>; 2437 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 2438 #address-cells = <1>; 2439 #size-cells = <0>; 2440 }; 2441 }; 2442 }; 2443}; 2444 2445
