1/*
2 * Copyright 2017-2018 Sean Wang <sean.wang@mediatek.com>
3 *
4 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 */
6
7/dts-v1/;
8#include <dt-bindings/input/input.h>
9#include "mt7623.dtsi"
10#include "mt6323.dtsi"
11
12/ {
13	model = "Bananapi BPI-R2";
14	compatible = "bananapi,bpi-r2", "mediatek,mt7623";
15
16	aliases {
17		serial2 = &uart2;
18	};
19
20	chosen {
21		stdout-path = "serial2:115200n8";
22	};
23
24	cpus {
25		cpu@0 {
26			proc-supply = <&mt6323_vproc_reg>;
27		};
28
29		cpu@1 {
30			proc-supply = <&mt6323_vproc_reg>;
31		};
32
33		cpu@2 {
34			proc-supply = <&mt6323_vproc_reg>;
35		};
36
37		cpu@3 {
38			proc-supply = <&mt6323_vproc_reg>;
39		};
40	};
41
42	reg_1p8v: regulator-1p8v {
43		compatible = "regulator-fixed";
44		regulator-name = "fixed-1.8V";
45		regulator-min-microvolt = <1800000>;
46		regulator-max-microvolt = <1800000>;
47		regulator-boot-on;
48		regulator-always-on;
49	};
50
51	reg_3p3v: regulator-3p3v {
52		compatible = "regulator-fixed";
53		regulator-name = "fixed-3.3V";
54		regulator-min-microvolt = <3300000>;
55		regulator-max-microvolt = <3300000>;
56		regulator-boot-on;
57		regulator-always-on;
58	};
59
60	reg_5v: regulator-5v {
61		compatible = "regulator-fixed";
62		regulator-name = "fixed-5V";
63		regulator-min-microvolt = <5000000>;
64		regulator-max-microvolt = <5000000>;
65		regulator-boot-on;
66		regulator-always-on;
67	};
68
69	gpio-keys {
70		compatible = "gpio-keys";
71		pinctrl-names = "default";
72		pinctrl-0 = <&key_pins_a>;
73
74		factory {
75			label = "factory";
76			linux,code = <BTN_0>;
77			gpios = <&pio 256 GPIO_ACTIVE_LOW>;
78		};
79
80		wps {
81			label = "wps";
82			linux,code = <KEY_WPS_BUTTON>;
83			gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
84		};
85	};
86
87	leds {
88		compatible = "gpio-leds";
89		pinctrl-names = "default";
90		pinctrl-0 = <&led_pins_a>;
91
92		blue {
93			label = "bpi-r2:pio:blue";
94			gpios = <&pio 240 GPIO_ACTIVE_LOW>;
95			default-state = "off";
96		};
97
98		green {
99			label = "bpi-r2:pio:green";
100			gpios = <&pio 241 GPIO_ACTIVE_LOW>;
101			default-state = "off";
102		};
103
104		red {
105			label = "bpi-r2:pio:red";
106			gpios = <&pio 239 GPIO_ACTIVE_LOW>;
107			default-state = "off";
108		};
109	};
110
111	memory@80000000 {
112		device_type = "memory";
113		reg = <0 0x80000000 0 0x80000000>;
114	};
115};
116
117&btif {
118	status = "okay";
119};
120
121&cir {
122	pinctrl-names = "default";
123	pinctrl-0 = <&cir_pins_a>;
124	status = "okay";
125};
126
127&crypto {
128	status = "okay";
129};
130
131&eth {
132	status = "okay";
133
134	gmac0: mac@0 {
135		compatible = "mediatek,eth-mac";
136		reg = <0>;
137		phy-mode = "trgmii";
138
139		fixed-link {
140			speed = <1000>;
141			full-duplex;
142			pause;
143		};
144	};
145
146	mdio: mdio-bus {
147		#address-cells = <1>;
148		#size-cells = <0>;
149
150		switch@0 {
151			compatible = "mediatek,mt7530";
152			reg = <0>;
153			reset-gpios = <&pio 33 0>;
154			core-supply = <&mt6323_vpa_reg>;
155			io-supply = <&mt6323_vemc3v3_reg>;
156
157			ports {
158				#address-cells = <1>;
159				#size-cells = <0>;
160
161				port@0 {
162					reg = <0>;
163					label = "wan";
164				};
165
166				port@1 {
167					reg = <1>;
168					label = "lan0";
169				};
170
171				port@2 {
172					reg = <2>;
173					label = "lan1";
174				};
175
176				port@3 {
177					reg = <3>;
178					label = "lan2";
179				};
180
181				port@4 {
182					reg = <4>;
183					label = "lan3";
184				};
185
186				port@6 {
187					reg = <6>;
188					label = "cpu";
189					ethernet = <&gmac0>;
190					phy-mode = "trgmii";
191
192					fixed-link {
193						speed = <1000>;
194						full-duplex;
195					};
196				};
197			};
198		};
199	};
200};
201
202&i2c0 {
203	pinctrl-names = "default";
204	pinctrl-0 = <&i2c0_pins_a>;
205	status = "okay";
206};
207
208&i2c1 {
209	pinctrl-names = "default";
210	pinctrl-0 = <&i2c1_pins_a>;
211	status = "okay";
212};
213
214&mmc0 {
215	pinctrl-names = "default", "state_uhs";
216	pinctrl-0 = <&mmc0_pins_default>;
217	pinctrl-1 = <&mmc0_pins_uhs>;
218	status = "okay";
219	bus-width = <8>;
220	max-frequency = <50000000>;
221	cap-mmc-highspeed;
222	vmmc-supply = <&reg_3p3v>;
223	vqmmc-supply = <&reg_1p8v>;
224	non-removable;
225};
226
227&mmc1 {
228	pinctrl-names = "default", "state_uhs";
229	pinctrl-0 = <&mmc1_pins_default>;
230	pinctrl-1 = <&mmc1_pins_uhs>;
231	status = "okay";
232	bus-width = <4>;
233	max-frequency = <50000000>;
234	cap-sd-highspeed;
235	cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
236	vmmc-supply = <&reg_3p3v>;
237	vqmmc-supply = <&reg_3p3v>;
238};
239
240&mt6323_leds {
241	status = "okay";
242
243	led@0 {
244		reg = <0>;
245		label = "bpi-r2:isink:green";
246		default-state = "off";
247	};
248
249	led@1 {
250		reg = <1>;
251		label = "bpi-r2:isink:red";
252		default-state = "off";
253	};
254
255	led@2 {
256		reg = <2>;
257		label = "bpi-r2:isink:blue";
258		default-state = "off";
259	};
260};
261
262&pcie {
263	pinctrl-names = "default";
264	pinctrl-0 = <&pcie_default>;
265	status = "okay";
266
267	pcie@0,0 {
268		status = "okay";
269	};
270
271	pcie@1,0 {
272		status = "okay";
273	};
274};
275
276&pcie0_phy {
277	status = "okay";
278};
279
280&pcie1_phy {
281	status = "okay";
282};
283
284&pwm {
285	pinctrl-names = "default";
286	pinctrl-0 = <&pwm_pins_a>;
287	status = "okay";
288};
289
290&spi0 {
291	pinctrl-names = "default";
292	pinctrl-0 = <&spi0_pins_a>;
293	status = "okay";
294};
295
296&uart0 {
297	pinctrl-names = "default";
298	pinctrl-0 = <&uart0_pins_a>;
299	status = "okay";
300};
301
302&uart1 {
303	pinctrl-names = "default";
304	pinctrl-0 = <&uart1_pins_a>;
305	status = "okay";
306};
307
308&uart2 {
309	pinctrl-names = "default";
310	pinctrl-0 = <&uart2_pins_a>;
311	status = "okay";
312};
313
314&usb1 {
315	vusb33-supply = <&reg_3p3v>;
316	vbus-supply = <&reg_5v>;
317	status = "okay";
318};
319
320&usb2 {
321	vusb33-supply = <&reg_3p3v>;
322	vbus-supply = <&reg_5v>;
323	status = "okay";
324};
325
326&u3phy1 {
327	status = "okay";
328};
329
330&u3phy2 {
331	status = "okay";
332};
333
334