1/*
2 * Copyright (C) 2016 Amarula Solutions B.V.
3 * Copyright (C) 2016 Engicam S.r.l.
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 *  a) This file is free software; you can redistribute it and/or
11 *     modify it under the terms of the GNU General Public License
12 *     version 2 as published by the Free Software Foundation.
13 *
14 *     This file is distributed in the hope that it will be useful,
15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 *     GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 *  b) Permission is hereby granted, free of charge, to any person
22 *     obtaining a copy of this software and associated documentation
23 *     files (the "Software"), to deal in the Software without
24 *     restriction, including without limitation the rights to use,
25 *     copy, modify, merge, publish, distribute, sublicense, and/or
26 *     sell copies of the Software, and to permit persons to whom the
27 *     Software is furnished to do so, subject to the following
28 *     conditions:
29 *
30 *     The above copyright notice and this permission notice shall be
31 *     included in all copies or substantial portions of the Software.
32 *
33 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 *     OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43#include <dt-bindings/gpio/gpio.h>
44#include <dt-bindings/input/input.h>
45#include "imx6ul.dtsi"
46
47/ {
48	memory@80000000 {
49		reg = <0x80000000 0x20000000>;
50	};
51
52	chosen {
53		stdout-path = &uart1;
54	};
55
56	backlight {
57		compatible = "pwm-backlight";
58		pwms = <&pwm8 0 100000>;
59		brightness-levels = < 0  1  2  3  4  5  6  7  8  9
60				     10 11 12 13 14 15 16 17 18 19
61				     20 21 22 23 24 25 26 27 28 29
62				     30 31 32 33 34 35 36 37 38 39
63				     40 41 42 43 44 45 46 47 48 49
64				     50 51 52 53 54 55 56 57 58 59
65				     60 61 62 63 64 65 66 67 68 69
66				     70 71 72 73 74 75 76 77 78 79
67				     80 81 82 83 84 85 86 87 88 89
68				     90 91 92 93 94 95 96 97 98 99
69				    100>;
70		default-brightness-level = <100>;
71	};
72
73	reg_1p8v: regulator-1p8v {
74		compatible = "regulator-fixed";
75		regulator-name = "1P8V";
76		regulator-min-microvolt = <1800000>;
77		regulator-max-microvolt = <1800000>;
78		regulator-always-on;
79		regulator-boot-on;
80	};
81
82	reg_3p3v: regulator-3p3v {
83		compatible = "regulator-fixed";
84		regulator-name = "3P3V";
85		regulator-min-microvolt = <3300000>;
86		regulator-max-microvolt = <3300000>;
87		regulator-always-on;
88		regulator-boot-on;
89	};
90
91	sound {
92		compatible = "simple-audio-card";
93		simple-audio-card,name = "imx6ul-isiot-sgtl5000";
94		simple-audio-card,format = "i2s";
95		simple-audio-card,bitclock-master = <&dailink_master>;
96		simple-audio-card,frame-master = <&dailink_master>;
97		simple-audio-card,widgets =
98			"Microphone", "Mic Jack",
99			"Line", "Line In",
100			"Line", "Line Out",
101			"Headphone", "Headphone Jack";
102		simple-audio-card,routing =
103			"MIC_IN", "Mic Jack",
104			"Mic Jack", "Mic Bias",
105			"Headphone Jack", "HP_OUT";
106
107		simple-audio-card,cpu {
108			sound-dai = <&sai2>;
109		};
110
111		dailink_master: simple-audio-card,codec {
112			sound-dai = <&sgtl5000>;
113			clocks = <&clks IMX6UL_CLK_SAI2>;
114		};
115	};
116};
117
118&fec1 {
119	pinctrl-names = "default";
120	pinctrl-0 = <&pinctrl_enet1>;
121	phy-mode = "rmii";
122	phy-handle = <&ethphy0>;
123	status = "okay";
124
125	mdio {
126		#address-cells = <1>;
127		#size-cells = <0>;
128
129		ethphy0: ethernet-phy@0 {
130			compatible = "ethernet-phy-ieee802.3-c22";
131			reg = <0>;
132		};
133	};
134};
135
136&i2c1 {
137	clock-frequency = <100000>;
138	pinctrl-names = "default";
139	pinctrl-0 = <&pinctrl_i2c1>;
140	status = "okay";
141
142	sgtl5000: codec@a {
143		compatible = "fsl,sgtl5000";
144		reg = <0x0a>;
145		#sound-dai-cells = <0>;
146		clocks = <&clks IMX6UL_CLK_OSC>;
147		clock-names = "mclk";
148		VDDA-supply = <&reg_3p3v>;
149		VDDIO-supply = <&reg_3p3v>;
150		VDDD-supply = <&reg_1p8v>;
151	};
152
153	stmpe811: gpio-expander@44 {
154		compatible = "st,stmpe811";
155		reg = <0x44>;
156		pinctrl-names = "default";
157		pinctrl-0 = <&pinctrl_stmpe>;
158		interrupt-parent = <&gpio1>;
159		interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
160		interrupt-controller;
161		#interrupt-cells = <2>;
162
163		stmpe: touchscreen {
164			compatible = "st,stmpe-ts";
165			st,sample-time = <4>;
166			st,mod-12b = <1>;
167			st,ref-sel = <0>;
168			st,adc-freq = <1>;
169			st,ave-ctrl = <1>;
170			st,touch-det-delay = <2>;
171			st,settling = <2>;
172			st,fraction-z = <7>;
173			st,i-drive = <1>;
174		};
175	};
176};
177
178&i2c2 {
179	clock_frequency = <100000>;
180	pinctrl-names = "default";
181	pinctrl-0 = <&pinctrl_i2c2>;
182	status = "okay";
183};
184
185&lcdif {
186	pinctrl-names = "default";
187	pinctrl-0 = <&pinctrl_lcdif_dat
188		     &pinctrl_lcdif_ctrl>;
189	display = <&display0>;
190	status = "okay";
191
192	display0: display {
193		bits-per-pixel = <16>;
194		bus-width = <18>;
195
196		display-timings {
197			native-mode = <&timing0>;
198			timing0: timing0 {
199				clock-frequency = <28000000>;
200				hactive = <800>;
201				vactive = <480>;
202				hfront-porch = <30>;
203				hback-porch = <30>;
204				hsync-len = <64>;
205				vback-porch = <5>;
206				vfront-porch = <5>;
207				vsync-len = <20>;
208				hsync-active = <0>;
209				vsync-active = <0>;
210				de-active = <1>;
211				pixelclk-active = <0>;
212			};
213		};
214	};
215};
216
217&pwm8 {
218	pinctrl-names = "default";
219	pinctrl-0 = <&pinctrl_pwm8>;
220	status = "okay";
221};
222
223&sai2 {
224	pinctrl-names = "default";
225	pinctrl-0 = <&pinctrl_sai2>;
226	status = "okay";
227};
228
229&uart1 {
230	pinctrl-names = "default";
231	pinctrl-0 = <&pinctrl_uart1>;
232	status = "okay";
233};
234
235&usdhc1 {
236	pinctrl-names = "default", "state_100mhz", "state_200mhz";
237	pinctrl-0 = <&pinctrl_usdhc1>;
238	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
239	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
240	cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
241	bus-width = <4>;
242	no-1-8-v;
243	status = "okay";
244};
245
246&iomuxc {
247	pinctrl_enet1: enet1grp {
248		fsl,pins = <
249			MX6UL_PAD_ENET2_RX_DATA0__ENET1_MDIO	0x1b0b0
250			MX6UL_PAD_ENET2_RX_DATA1__ENET1_MDC	0x1b0b0
251			MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN	0x1b0b0
252			MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00	0x1b0b0
253			MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01	0x1b0b0
254			MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN	0x1b0b0
255			MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00	0x1b0b0
256			MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01	0x1b0b0
257			MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1	0x4001b031
258			MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10	0x1b0b0
259		>;
260	};
261
262	pinctrl_i2c1: i2c1grp {
263		fsl,pins = <
264			MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
265			MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
266		>;
267	};
268
269	pinctrl_i2c2: i2c2grp {
270		fsl,pins = <
271			MX6UL_PAD_GPIO1_IO00__I2C2_SCL 0x4001b8b0
272			MX6UL_PAD_GPIO1_IO01__I2C2_SDA 0x4001b8b0
273		>;
274	};
275
276	pinctrl_lcdif_ctrl: lcdifctrlgrp {
277		fsl,pins = <
278			MX6UL_PAD_LCD_CLK__LCDIF_CLK	    0x79
279			MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE  0x79
280			MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC    0x79
281			MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC    0x79
282		>;
283	};
284
285	pinctrl_lcdif_dat: lcdifdatgrp {
286		fsl,pins = <
287			MX6UL_PAD_LCD_DATA00__LCDIF_DATA00  0x79
288			MX6UL_PAD_LCD_DATA01__LCDIF_DATA01  0x79
289			MX6UL_PAD_LCD_DATA02__LCDIF_DATA02  0x79
290			MX6UL_PAD_LCD_DATA03__LCDIF_DATA03  0x79
291			MX6UL_PAD_LCD_DATA04__LCDIF_DATA04  0x79
292			MX6UL_PAD_LCD_DATA05__LCDIF_DATA05  0x79
293			MX6UL_PAD_LCD_DATA06__LCDIF_DATA06  0x79
294			MX6UL_PAD_LCD_DATA07__LCDIF_DATA07  0x79
295			MX6UL_PAD_LCD_DATA08__LCDIF_DATA08  0x79
296			MX6UL_PAD_LCD_DATA09__LCDIF_DATA09  0x79
297			MX6UL_PAD_LCD_DATA10__LCDIF_DATA10  0x79
298			MX6UL_PAD_LCD_DATA11__LCDIF_DATA11  0x79
299			MX6UL_PAD_LCD_DATA12__LCDIF_DATA12  0x79
300			MX6UL_PAD_LCD_DATA13__LCDIF_DATA13  0x79
301			MX6UL_PAD_LCD_DATA14__LCDIF_DATA14  0x79
302			MX6UL_PAD_LCD_DATA15__LCDIF_DATA15  0x79
303			MX6UL_PAD_LCD_DATA16__LCDIF_DATA16  0x79
304			MX6UL_PAD_LCD_DATA17__LCDIF_DATA17  0x79
305		>;
306	};
307
308	pinctrl_pwm8: pwm8grp {
309		fsl,pins = <
310			MX6UL_PAD_ENET1_RX_ER__PWM8_OUT   0x110b0
311		>;
312	};
313
314	pinctrl_sai2: sai2grp {
315		fsl,pins = <
316			MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA	0x130b0
317			MX6UL_PAD_JTAG_TMS__CCM_CLKO1		0x4001b031
318			MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK	0x17088
319			MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC	0x17088
320			MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA	0x120b0
321		>;
322	};
323
324	pinctrl_stmpe: stmpegrp  {
325		fsl,pins = <
326			MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x1b0b0
327		>;
328	};
329
330	pinctrl_uart1: uart1grp {
331		fsl,pins = <
332			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
333			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
334		>;
335	};
336
337	pinctrl_usdhc1: usdhc1grp {
338		fsl,pins = <
339			MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x17059
340			MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x10059
341			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
342			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
343			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
344			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
345		>;
346	};
347
348	pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
349		fsl,pins = <
350			MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170b9
351			MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100b9
352			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
353			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
354			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
355			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
356		>;
357	};
358
359	pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
360		fsl,pins = <
361			MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170f9
362			MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100f9
363			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
364			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
365			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
366			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
367		>;
368	};
369};
370