1// SPDX-License-Identifier: GPL-2.0 OR X11
2/*
3 * Copyright 2013 Boundary Devices, Inc.
4 * Copyright 2011 Freescale Semiconductor, Inc.
5 * Copyright 2011 Linaro Ltd.
6 */
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/input/input.h>
9
10/ {
11	chosen {
12		stdout-path = &uart2;
13	};
14
15	memory@10000000 {
16		reg = <0x10000000 0x40000000>;
17	};
18
19	regulators {
20		compatible = "simple-bus";
21		#address-cells = <1>;
22		#size-cells = <0>;
23
24		reg_2p5v: regulator@0 {
25			compatible = "regulator-fixed";
26			reg = <0>;
27			regulator-name = "2P5V";
28			regulator-min-microvolt = <2500000>;
29			regulator-max-microvolt = <2500000>;
30			regulator-always-on;
31		};
32
33		reg_3p3v: regulator@1 {
34			compatible = "regulator-fixed";
35			reg = <1>;
36			regulator-name = "3P3V";
37			regulator-min-microvolt = <3300000>;
38			regulator-max-microvolt = <3300000>;
39			regulator-always-on;
40		};
41
42		reg_usb_otg_vbus: regulator@2 {
43			compatible = "regulator-fixed";
44			reg = <2>;
45			regulator-name = "usb_otg_vbus";
46			regulator-min-microvolt = <5000000>;
47			regulator-max-microvolt = <5000000>;
48			gpio = <&gpio3 22 0>;
49			enable-active-high;
50		};
51
52		reg_can_xcvr: regulator@3 {
53			compatible = "regulator-fixed";
54			reg = <3>;
55			regulator-name = "CAN XCVR";
56			regulator-min-microvolt = <3300000>;
57			regulator-max-microvolt = <3300000>;
58			pinctrl-names = "default";
59			pinctrl-0 = <&pinctrl_can_xcvr>;
60			gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
61		};
62
63		reg_wlan_vmmc: regulator@4 {
64			compatible = "regulator-fixed";
65			reg = <4>;
66			pinctrl-names = "default";
67			pinctrl-0 = <&pinctrl_wlan_vmmc>;
68			regulator-name = "reg_wlan_vmmc";
69			regulator-min-microvolt = <3300000>;
70			regulator-max-microvolt = <3300000>;
71			gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;
72			startup-delay-us = <70000>;
73			enable-active-high;
74		};
75
76		reg_usb_h1_vbus: regulator@5 {
77			compatible = "regulator-fixed";
78			reg = <5>;
79			pinctrl-names = "default";
80			pinctrl-0 = <&pinctrl_usbh1>;
81			regulator-name = "usb_h1_vbus";
82			regulator-min-microvolt = <3300000>;
83			regulator-max-microvolt = <3300000>;
84			gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
85			enable-active-high;
86		};
87	};
88
89	gpio-keys {
90		compatible = "gpio-keys";
91		pinctrl-names = "default";
92		pinctrl-0 = <&pinctrl_gpio_keys>;
93
94		power {
95			label = "Power Button";
96			gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
97			linux,code = <KEY_POWER>;
98			wakeup-source;
99		};
100
101		menu {
102			label = "Menu";
103			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
104			linux,code = <KEY_MENU>;
105		};
106
107		home {
108			label = "Home";
109			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
110			linux,code = <KEY_HOME>;
111		};
112
113		back {
114			label = "Back";
115			gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
116			linux,code = <KEY_BACK>;
117		};
118
119		volume-up {
120			label = "Volume Up";
121			gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
122			linux,code = <KEY_VOLUMEUP>;
123		};
124
125		volume-down {
126			label = "Volume Down";
127			gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
128			linux,code = <KEY_VOLUMEDOWN>;
129		};
130	};
131
132	sound {
133		compatible = "fsl,imx6q-nitrogen6x-sgtl5000",
134			     "fsl,imx-audio-sgtl5000";
135		model = "imx6q-nitrogen6x-sgtl5000";
136		ssi-controller = <&ssi1>;
137		audio-codec = <&codec>;
138		audio-routing =
139			"MIC_IN", "Mic Jack",
140			"Mic Jack", "Mic Bias",
141			"Headphone Jack", "HP_OUT";
142		mux-int-port = <1>;
143		mux-ext-port = <3>;
144	};
145
146	backlight_lcd: backlight-lcd {
147		compatible = "pwm-backlight";
148		pwms = <&pwm1 0 5000000>;
149		brightness-levels = <0 4 8 16 32 64 128 255>;
150		default-brightness-level = <7>;
151		power-supply = <&reg_3p3v>;
152		status = "okay";
153	};
154
155	backlight_lvds: backlight-lvds {
156		compatible = "pwm-backlight";
157		pwms = <&pwm4 0 5000000>;
158		brightness-levels = <0 4 8 16 32 64 128 255>;
159		default-brightness-level = <7>;
160		power-supply = <&reg_3p3v>;
161		status = "okay";
162	};
163
164	lcd_display: disp0 {
165		compatible = "fsl,imx-parallel-display";
166		#address-cells = <1>;
167		#size-cells = <0>;
168		interface-pix-fmt = "bgr666";
169		pinctrl-names = "default";
170		pinctrl-0 = <&pinctrl_j15>;
171		status = "okay";
172
173		port@0 {
174			reg = <0>;
175
176			lcd_display_in: endpoint {
177				remote-endpoint = <&ipu1_di0_disp0>;
178			};
179		};
180
181		port@1 {
182			reg = <1>;
183
184			lcd_display_out: endpoint {
185				remote-endpoint = <&lcd_panel_in>;
186			};
187		};
188	};
189
190	panel-lcd {
191		compatible = "okaya,rs800480t-7x0gp";
192		backlight = <&backlight_lcd>;
193
194		port {
195			lcd_panel_in: endpoint {
196				remote-endpoint = <&lcd_display_out>;
197			};
198		};
199	};
200
201	panel-lvds0 {
202		compatible = "hannstar,hsd100pxn1";
203		backlight = <&backlight_lvds>;
204
205		port {
206			panel_in: endpoint {
207				remote-endpoint = <&lvds0_out>;
208			};
209		};
210	};
211};
212
213&audmux {
214	pinctrl-names = "default";
215	pinctrl-0 = <&pinctrl_audmux>;
216	status = "okay";
217};
218
219&can1 {
220	pinctrl-names = "default";
221	pinctrl-0 = <&pinctrl_can1>;
222	xceiver-supply = <&reg_can_xcvr>;
223	status = "okay";
224};
225
226&clks {
227	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
228			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
229	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
230				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
231};
232
233&ecspi1 {
234	cs-gpios = <&gpio3 19 0>;
235	pinctrl-names = "default";
236	pinctrl-0 = <&pinctrl_ecspi1>;
237	status = "okay";
238
239	flash: m25p80@0 {
240		compatible = "sst,sst25vf016b", "jedec,spi-nor";
241		spi-max-frequency = <20000000>;
242		reg = <0>;
243		#address-cells = <1>;
244		#size-cells = <1>;
245
246		partition@0 {
247			label = "bootloader";
248			reg = <0x0 0xc0000>;
249		};
250
251		partition@c0000 {
252			label = "env";
253			reg = <0xc0000 0x2000>;
254		};
255
256		partition@c2000 {
257			label = "splash";
258			reg = <0xc2000 0x13e000>;
259		};
260	};
261};
262
263&fec {
264	pinctrl-names = "default";
265	pinctrl-0 = <&pinctrl_enet>;
266	phy-mode = "rgmii";
267	phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
268	txen-skew-ps = <0>;
269	txc-skew-ps = <3000>;
270	rxdv-skew-ps = <0>;
271	rxc-skew-ps = <3000>;
272	rxd0-skew-ps = <0>;
273	rxd1-skew-ps = <0>;
274	rxd2-skew-ps = <0>;
275	rxd3-skew-ps = <0>;
276	txd0-skew-ps = <0>;
277	txd1-skew-ps = <0>;
278	txd2-skew-ps = <0>;
279	txd3-skew-ps = <0>;
280	interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
281			      <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
282	fsl,err006687-workaround-present;
283	status = "okay";
284};
285
286&hdmi {
287	ddc-i2c-bus = <&i2c2>;
288	status = "okay";
289};
290
291&i2c1 {
292	clock-frequency = <100000>;
293	pinctrl-names = "default";
294	pinctrl-0 = <&pinctrl_i2c1>;
295	status = "okay";
296
297	codec: sgtl5000@a {
298		compatible = "fsl,sgtl5000";
299		reg = <0x0a>;
300		clocks = <&clks IMX6QDL_CLK_CKO>;
301		VDDA-supply = <&reg_2p5v>;
302		VDDIO-supply = <&reg_3p3v>;
303	};
304
305	rtc: rtc@6f {
306		compatible = "isil,isl1208";
307		reg = <0x6f>;
308	};
309};
310
311&i2c2 {
312	clock-frequency = <100000>;
313	pinctrl-names = "default";
314	pinctrl-0 = <&pinctrl_i2c2>;
315	status = "okay";
316};
317
318&i2c3 {
319	clock-frequency = <100000>;
320	pinctrl-names = "default";
321	pinctrl-0 = <&pinctrl_i2c3>;
322	status = "okay";
323
324	touchscreen@4 {
325		compatible = "eeti,egalax_ts";
326		reg = <0x04>;
327		interrupt-parent = <&gpio1>;
328		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
329		wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
330	};
331
332	touchscreen@38 {
333		compatible = "edt,edt-ft5x06";
334		reg = <0x38>;
335		interrupt-parent = <&gpio1>;
336		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
337		wakeup-source;
338	};
339};
340
341&iomuxc {
342	pinctrl-names = "default";
343	pinctrl-0 = <&pinctrl_hog>;
344
345	imx6q-nitrogen6x {
346		pinctrl_hog: hoggrp {
347			fsl,pins = <
348				/* SGTL5000 sys_mclk */
349				MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x030b0
350				MX6QDL_PAD_GPIO_9__GPIO1_IO09	0x1b0b0
351			>;
352		};
353
354		pinctrl_audmux: audmuxgrp {
355			fsl,pins = <
356				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
357				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0
358				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0
359				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0
360			>;
361		};
362
363		pinctrl_can1: can1grp {
364			fsl,pins = <
365				MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0
366				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0
367			>;
368		};
369
370		pinctrl_can_xcvr: can-xcvrgrp {
371			fsl,pins = <
372				/* Flexcan XCVR enable */
373				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1b0b0
374			>;
375		};
376
377		pinctrl_ecspi1: ecspi1grp {
378			fsl,pins = <
379				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
380				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
381				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
382				MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x000b1	/* CS */
383			>;
384		};
385
386		pinctrl_enet: enetgrp {
387			fsl,pins = <
388				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x100b0
389				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x100b0
390				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x10030
391				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x10030
392				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x10030
393				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x10030
394				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x10030
395				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x10030
396				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0
397				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
398				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
399				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
400				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
401				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
402				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
403				/* Phy reset */
404				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x000b0
405				MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1
406			>;
407		};
408
409		pinctrl_gpio_keys: gpio-keysgrp {
410			fsl,pins = <
411				/* Power Button */
412				MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x1b0b0
413				/* Menu Button */
414				MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0
415				/* Home Button */
416				MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x1b0b0
417				/* Back Button */
418				MX6QDL_PAD_NANDF_D2__GPIO2_IO02		0x1b0b0
419				/* Volume Up Button */
420				MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b0
421				/* Volume Down Button */
422				MX6QDL_PAD_GPIO_19__GPIO4_IO05		0x1b0b0
423			>;
424		};
425
426		pinctrl_i2c1: i2c1grp {
427			fsl,pins = <
428				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
429				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
430			>;
431		};
432
433		pinctrl_i2c2: i2c2grp {
434			fsl,pins = <
435				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
436				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
437			>;
438		};
439
440		pinctrl_i2c3: i2c3grp {
441			fsl,pins = <
442				MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1
443				MX6QDL_PAD_GPIO_16__I2C3_SDA		0x4001b8b1
444			>;
445		};
446
447		pinctrl_j15: j15grp {
448			fsl,pins = <
449				MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
450				MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
451				MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
452				MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
453				MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
454				MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
455				MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
456				MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
457				MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
458				MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
459				MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
460				MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
461				MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
462				MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
463				MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
464				MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
465				MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
466				MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
467				MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
468				MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
469				MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
470				MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
471				MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
472				MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
473				MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
474				MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
475				MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
476				MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
477			>;
478		};
479
480		pinctrl_pwm1: pwm1grp {
481			fsl,pins = <
482				MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
483			>;
484		};
485
486		pinctrl_pwm3: pwm3grp {
487			fsl,pins = <
488				MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
489			>;
490		};
491
492		pinctrl_pwm4: pwm4grp {
493			fsl,pins = <
494				MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
495			>;
496		};
497
498		pinctrl_uart1: uart1grp {
499			fsl,pins = <
500				MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
501				MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
502			>;
503		};
504
505		pinctrl_uart2: uart2grp {
506			fsl,pins = <
507				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1
508				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1
509			>;
510		};
511
512		pinctrl_usbh1: usbh1grp {
513			fsl,pins = <
514				MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x030b0
515			>;
516		};
517
518		pinctrl_usbotg: usbotggrp {
519			fsl,pins = <
520				MX6QDL_PAD_GPIO_1__USB_OTG_ID	0x17059
521				MX6QDL_PAD_KEY_COL4__USB_OTG_OC	0x1b0b0
522				/* power enable, high active */
523				MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x000b0
524			>;
525		};
526
527		pinctrl_usdhc2: usdhc2grp {
528			fsl,pins = <
529				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17071
530				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10071
531				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17071
532				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17071
533				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17071
534				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17071
535			>;
536		};
537
538		pinctrl_usdhc3: usdhc3grp {
539			fsl,pins = <
540				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
541				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
542				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
543				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
544				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
545				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
546				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0	/* CD */
547			>;
548		};
549
550		pinctrl_usdhc4: usdhc4grp {
551			fsl,pins = <
552				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
553				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
554				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
555				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
556				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
557				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
558				MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0	/* CD */
559			>;
560		};
561
562		pinctrl_wlan_vmmc: wlan-vmmcgrp {
563			fsl,pins = <
564				MX6QDL_PAD_NANDF_CS0__GPIO6_IO11	0x100b0
565				MX6QDL_PAD_NANDF_CS2__GPIO6_IO15	0x000b0
566				MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x000b0
567				MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT	0x000b0
568			>;
569		};
570	};
571};
572
573&ipu1_di0_disp0 {
574	remote-endpoint = <&lcd_display_in>;
575};
576
577&ldb {
578	status = "okay";
579
580	lvds-channel@0 {
581		status = "okay";
582
583		port@4 {
584			reg = <4>;
585
586			lvds0_out: endpoint {
587				remote-endpoint = <&panel_in>;
588			};
589		};
590	};
591};
592
593&pcie {
594	status = "okay";
595};
596
597&pwm1 {
598	pinctrl-names = "default";
599	pinctrl-0 = <&pinctrl_pwm1>;
600	status = "okay";
601};
602
603&pwm3 {
604	pinctrl-names = "default";
605	pinctrl-0 = <&pinctrl_pwm3>;
606	status = "okay";
607};
608
609&pwm4 {
610	pinctrl-names = "default";
611	pinctrl-0 = <&pinctrl_pwm4>;
612	status = "okay";
613};
614
615&ssi1 {
616	status = "okay";
617};
618
619&uart1 {
620	pinctrl-names = "default";
621	pinctrl-0 = <&pinctrl_uart1>;
622	status = "okay";
623};
624
625&uart2 {
626	pinctrl-names = "default";
627	pinctrl-0 = <&pinctrl_uart2>;
628	status = "okay";
629};
630
631&usbh1 {
632	vbus-supply = <&reg_usb_h1_vbus>;
633	status = "okay";
634};
635
636&usbotg {
637	vbus-supply = <&reg_usb_otg_vbus>;
638	pinctrl-names = "default";
639	pinctrl-0 = <&pinctrl_usbotg>;
640	disable-over-current;
641	status = "okay";
642};
643
644&usdhc2 {
645	pinctrl-names = "default";
646	pinctrl-0 = <&pinctrl_usdhc2>;
647	bus-width = <4>;
648	non-removable;
649	vmmc-supply = <&reg_wlan_vmmc>;
650	cap-power-off-card;
651	keep-power-in-suspend;
652	status = "okay";
653
654	#address-cells = <1>;
655	#size-cells = <0>;
656	wlcore: wlcore@2 {
657		compatible = "ti,wl1271";
658		reg = <2>;
659		interrupt-parent = <&gpio6>;
660		interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
661		ref-clock-frequency = <38400000>;
662	};
663};
664
665&usdhc3 {
666	pinctrl-names = "default";
667	pinctrl-0 = <&pinctrl_usdhc3>;
668	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
669	vmmc-supply = <&reg_3p3v>;
670	status = "okay";
671};
672
673&usdhc4 {
674	pinctrl-names = "default";
675	pinctrl-0 = <&pinctrl_usdhc4>;
676	cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
677	vmmc-supply = <&reg_3p3v>;
678	status = "okay";
679};
680