1/* 2 * Copyright (C) 2016 Amarula Solutions B.V. 3 * Copyright (C) 2016 Engicam S.r.l. 4 * 5 * This file is dual-licensed: you can use it either under the terms 6 * of the GPL or the X11 license, at your option. Note that this dual 7 * licensing only applies to this file, and not this project as a 8 * whole. 9 * 10 * a) This file is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License 12 * version 2 as published by the Free Software Foundation. 13 * 14 * This file is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * Or, alternatively, 20 * 21 * b) Permission is hereby granted, free of charge, to any person 22 * obtaining a copy of this software and associated documentation 23 * files (the "Software"), to deal in the Software without 24 * restriction, including without limitation the rights to use, 25 * copy, modify, merge, publish, distribute, sublicense, and/or 26 * sell copies of the Software, and to permit persons to whom the 27 * Software is furnished to do so, subject to the following 28 * conditions: 29 * 30 * The above copyright notice and this permission notice shall be 31 * included in all copies or substantial portions of the Software. 32 * 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42 43#include <dt-bindings/gpio/gpio.h> 44#include <dt-bindings/input/input.h> 45#include <dt-bindings/sound/fsl-imx-audmux.h> 46 47/ { 48 memory@10000000 { 49 reg = <0x10000000 0x80000000>; 50 }; 51 52 backlight_lvds: backlight-lvds { 53 compatible = "pwm-backlight"; 54 pwms = <&pwm3 0 100000>; 55 brightness-levels = <0 4 8 16 32 64 128 255>; 56 default-brightness-level = <7>; 57 }; 58 59 reg_1p8v: regulator-1p8v { 60 compatible = "regulator-fixed"; 61 regulator-name = "1P8V"; 62 regulator-min-microvolt = <1800000>; 63 regulator-max-microvolt = <1800000>; 64 regulator-boot-on; 65 regulator-always-on; 66 }; 67 68 reg_2p5v: regulator-2p5v { 69 compatible = "regulator-fixed"; 70 regulator-name = "2P5V"; 71 regulator-min-microvolt = <2500000>; 72 regulator-max-microvolt = <2500000>; 73 regulator-boot-on; 74 regulator-always-on; 75 }; 76 77 reg_3p3v: regulator-3p3v { 78 compatible = "regulator-fixed"; 79 regulator-name = "3P3V"; 80 regulator-min-microvolt = <3300000>; 81 regulator-max-microvolt = <3300000>; 82 regulator-boot-on; 83 regulator-always-on; 84 }; 85 86 reg_usb_h1_vbus: regulator-usb-h1-vbus { 87 compatible = "regulator-fixed"; 88 regulator-name = "usb_h1_vbus"; 89 regulator-min-microvolt = <5000000>; 90 regulator-max-microvolt = <5000000>; 91 regulator-boot-on; 92 regulator-always-on; 93 }; 94 95 reg_usb_otg_vbus: regulator-usb-otg-vbus { 96 compatible = "regulator-fixed"; 97 regulator-name = "usb_otg_vbus"; 98 regulator-min-microvolt = <5000000>; 99 regulator-max-microvolt = <5000000>; 100 regulator-boot-on; 101 regulator-always-on; 102 }; 103 104 rmii_clk: clock-rmii-clk { 105 compatible = "fixed-clock"; 106 #clock-cells = <0>; 107 clock-frequency = <25000000>; /* 25MHz for example */ 108 }; 109 110 sound { 111 compatible = "simple-audio-card"; 112 simple-audio-card,name = "imx6qdl-icore-sgtl5000"; 113 simple-audio-card,format = "i2s"; 114 simple-audio-card,bitclock-master = <&dailink_master>; 115 simple-audio-card,frame-master = <&dailink_master>; 116 simple-audio-card,widgets = 117 "Microphone", "Mic Jack", 118 "Headphone", "Headphone Jack", 119 "Line", "Line In Jack", 120 "Speaker", "Line Out Jack", 121 "Speaker", "Ext Spk"; 122 simple-audio-card,routing = 123 "MIC_IN", "Mic Jack", 124 "Mic Jack", "Mic Bias", 125 "Headphone Jack", "HP_OUT"; 126 127 simple-audio-card,cpu { 128 sound-dai = <&ssi1>; 129 }; 130 131 dailink_master: simple-audio-card,codec { 132 sound-dai = <&sgtl5000>; 133 }; 134 }; 135}; 136 137&audmux { 138 pinctrl-names = "default"; 139 pinctrl-0 = <&pinctrl_audmux>; 140 status = "okay"; 141 142 143 audmux_ssi1 { 144 fsl,audmux-port = <MX51_AUDMUX_PORT1_SSI0>; 145 fsl,port-config = < 146 (IMX_AUDMUX_V2_PTCR_TFSDIR | 147 IMX_AUDMUX_V2_PTCR_TFSEL(MX51_AUDMUX_PORT4) | 148 IMX_AUDMUX_V2_PTCR_TCLKDIR | 149 IMX_AUDMUX_V2_PTCR_TCSEL(MX51_AUDMUX_PORT4) | 150 IMX_AUDMUX_V2_PTCR_SYN) 151 IMX_AUDMUX_V2_PDCR_RXDSEL(MX51_AUDMUX_PORT4) 152 >; 153 }; 154 155 audmux_aud4 { 156 fsl,audmux-port = <MX51_AUDMUX_PORT4>; 157 fsl,port-config = < 158 IMX_AUDMUX_V2_PTCR_SYN 159 IMX_AUDMUX_V2_PDCR_RXDSEL(MX51_AUDMUX_PORT1_SSI0) 160 >; 161 }; 162}; 163 164&can1 { 165 pinctrl-names = "default"; 166 pinctrl-0 = <&pinctrl_flexcan1>; 167 xceiver-supply = <®_3p3v>; 168}; 169 170&can2 { 171 pinctrl-names = "default"; 172 pinctrl-0 = <&pinctrl_flexcan2>; 173 xceiver-supply = <®_3p3v>; 174}; 175 176&clks { 177 assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>; 178 assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>; 179}; 180 181&fec { 182 pinctrl-names = "default"; 183 pinctrl-0 = <&pinctrl_enet>; 184 phy-reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; 185 clocks = <&clks IMX6QDL_CLK_ENET>, <&clks IMX6QDL_CLK_ENET>, <&rmii_clk>; 186 phy-mode = "rmii"; 187 status = "okay"; 188}; 189 190&gpmi { 191 pinctrl-names = "default"; 192 pinctrl-0 = <&pinctrl_gpmi_nand>; 193 nand-on-flash-bbt; 194 status = "okay"; 195}; 196 197&i2c1 { 198 clock-frequency = <100000>; 199 pinctrl-names = "default"; 200 pinctrl-0 = <&pinctrl_i2c1>; 201 status = "okay"; 202}; 203 204&i2c2 { 205 clock-frequency = <100000>; 206 pinctrl-names = "default"; 207 pinctrl-0 = <&pinctrl_i2c2>; 208 status = "okay"; 209}; 210 211&i2c3 { 212 clock-frequency = <100000>; 213 pinctrl-names = "default"; 214 pinctrl-0 = <&pinctrl_i2c3>; 215 status = "okay"; 216 217 ov5640: camera@3c { 218 compatible = "ovti,ov5640"; 219 pinctrl-names = "default"; 220 pinctrl-0 = <&pinctrl_ov5640>; 221 reg = <0x3c>; 222 clocks = <&clks IMX6QDL_CLK_CKO>; 223 clock-names = "xclk"; 224 DOVDD-supply = <®_1p8v>; 225 AVDD-supply = <®_3p3v>; 226 DVDD-supply = <®_3p3v>; 227 powerdown-gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>; 228 reset-gpios = <&gpio5 31 GPIO_ACTIVE_LOW>; 229 status = "disabled"; 230 231 port { 232 ov5640_to_mipi_csi2: endpoint { 233 remote-endpoint = <&mipi_csi2_in>; 234 clock-lanes = <0>; 235 data-lanes = <1 2>; 236 }; 237 }; 238 }; 239 240 sgtl5000: codec@a { 241 #sound-dai-cells = <0>; 242 compatible = "fsl,sgtl5000"; 243 reg = <0x0a>; 244 clocks = <&clks IMX6QDL_CLK_CKO>; 245 VDDA-supply = <®_2p5v>; 246 VDDIO-supply = <®_3p3v>; 247 VDDD-supply = <®_1p8v>; 248 }; 249}; 250 251&mipi_csi { 252 status = "disabled"; 253 254 port@0 { 255 reg = <0>; 256 257 mipi_csi2_in: endpoint { 258 remote-endpoint = <&ov5640_to_mipi_csi2>; 259 clock-lanes = <0>; 260 data-lanes = <1 2>; 261 }; 262 }; 263}; 264 265&pwm3 { 266 pinctrl-names = "default"; 267 pinctrl-0 = <&pinctrl_pwm3>; 268 status = "okay"; 269}; 270 271&ssi1 { 272 fsl,mode = "i2s-slave"; 273 status = "okay"; 274}; 275 276&uart4 { 277 pinctrl-names = "default"; 278 pinctrl-0 = <&pinctrl_uart4>; 279 status = "okay"; 280}; 281 282&usbh1 { 283 vbus-supply = <®_usb_h1_vbus>; 284 disable-over-current; 285 status = "okay"; 286}; 287 288&usbotg { 289 vbus-supply = <®_usb_otg_vbus>; 290 pinctrl-names = "default"; 291 pinctrl-0 = <&pinctrl_usbotg>; 292 disable-over-current; 293 status = "okay"; 294}; 295 296&usdhc1 { 297 pinctrl-names = "default"; 298 pinctrl-0 = <&pinctrl_usdhc1>; 299 cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; 300 no-1-8-v; 301 status = "okay"; 302}; 303 304&usdhc3 { 305 pinctrl-names = "default"; 306 pinctrl-0 = <&pinctrl_usdhc3>; 307 no-1-8-v; 308 non-removable; 309 status = "disabled"; 310}; 311 312&iomuxc { 313 pinctrl_audmux: audmux { 314 fsl,pins = < 315 MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0 316 MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0 317 MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0 318 MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0 319 >; 320 }; 321 322 pinctrl_enet: enetgrp { 323 fsl,pins = < 324 MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 325 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b1 326 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 327 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 328 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 329 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 330 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 331 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 332 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 333 MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1b0b0 334 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 335 >; 336 }; 337 338 pinctrl_flexcan1: flexcan1grp { 339 fsl,pins = < 340 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b020 341 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b020 342 >; 343 }; 344 345 pinctrl_flexcan2: flexcan2grp { 346 fsl,pins = < 347 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b020 348 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b020 349 >; 350 }; 351 352 pinctrl_gpmi_nand: gpmi-nand { 353 fsl,pins = < 354 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 355 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 356 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 357 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 358 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 359 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 360 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 361 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 362 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 363 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 364 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 365 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 366 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 367 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 368 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 369 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 370 MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 371 >; 372 }; 373 374 pinctrl_i2c1: i2c1grp { 375 fsl,pins = < 376 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 377 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 378 >; 379 }; 380 381 pinctrl_i2c2: i2c2grp { 382 fsl,pins = < 383 MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 384 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 385 >; 386 }; 387 388 pinctrl_i2c3: i2c3grp { 389 fsl,pins = < 390 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 391 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 392 >; 393 }; 394 395 pinctrl_ov5640: ov5640grp { 396 fsl,pins = < 397 MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30 0x1b0b0 398 MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x1b0b0 399 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 400 >; 401 }; 402 403 pinctrl_uart4: uart4grp { 404 fsl,pins = < 405 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 406 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 407 >; 408 }; 409 410 pinctrl_pwm3: pwm3grp { 411 fsl,pins = < 412 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 413 >; 414 }; 415 416 pinctrl_usbotg: usbotggrp { 417 fsl,pins = < 418 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 419 >; 420 }; 421 422 pinctrl_usdhc1: usdhc1grp { 423 fsl,pins = < 424 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17070 425 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10070 426 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17070 427 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17070 428 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17070 429 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17070 430 >; 431 }; 432 433 pinctrl_usdhc3: usdhc3grp { 434 fsl,pins = < 435 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 436 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 437 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 438 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 439 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 440 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 441 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 442 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 443 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 444 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 445 >; 446 }; 447}; 448
