1/* 2 * Copyright 2017 Beckhoff Automation GmbH & Co. KG 3 * based on imx53-qsb.dts 4 * 5 * The code contained herein is licensed under the GNU General Public 6 * License. You may obtain a copy of the GNU General Public License 7 * Version 2 or later at the following locations: 8 * 9 * http://www.opensource.org/licenses/gpl-license.html 10 * http://www.gnu.org/copyleft/gpl.html 11 */ 12 13/dts-v1/; 14#include "imx53.dtsi" 15 16/ { 17 model = "Beckhoff CX9020 Embedded PC"; 18 compatible = "bhf,cx9020", "fsl,imx53"; 19 20 chosen { 21 stdout-path = &uart2; 22 }; 23 24 memory@70000000 { 25 reg = <0x70000000 0x20000000>, 26 <0xb0000000 0x20000000>; 27 }; 28 29 display-0 { 30 #address-cells =<1>; 31 #size-cells = <0>; 32 compatible = "fsl,imx-parallel-display"; 33 interface-pix-fmt = "rgb24"; 34 pinctrl-names = "default"; 35 pinctrl-0 = <&pinctrl_ipu_disp0>; 36 37 port@0 { 38 reg = <0>; 39 40 display0_in: endpoint { 41 remote-endpoint = <&ipu_di0_disp0>; 42 }; 43 }; 44 45 port@1 { 46 reg = <1>; 47 48 display0_out: endpoint { 49 remote-endpoint = <&tfp410_in>; 50 }; 51 }; 52 }; 53 54 dvi-connector { 55 compatible = "dvi-connector"; 56 ddc-i2c-bus = <&i2c2>; 57 digital; 58 59 port { 60 dvi_connector_in: endpoint { 61 remote-endpoint = <&tfp410_out>; 62 }; 63 }; 64 }; 65 66 dvi-converter { 67 #address-cells = <1>; 68 #size-cells = <0>; 69 compatible = "ti,tfp410"; 70 71 port@0 { 72 reg = <0>; 73 74 tfp410_in: endpoint { 75 remote-endpoint = <&display0_out>; 76 }; 77 }; 78 79 port@1 { 80 reg = <1>; 81 82 tfp410_out: endpoint { 83 remote-endpoint = <&dvi_connector_in>; 84 }; 85 }; 86 }; 87 88 leds { 89 compatible = "gpio-leds"; 90 91 pwr-r { 92 gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; 93 default-state = "off"; 94 }; 95 96 pwr-g { 97 gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; 98 default-state = "on"; 99 }; 100 101 pwr-b { 102 gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; 103 default-state = "off"; 104 }; 105 106 sd1-b { 107 linux,default-trigger = "mmc0"; 108 gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>; 109 }; 110 111 sd2-b { 112 linux,default-trigger = "mmc1"; 113 gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>; 114 }; 115 }; 116 117 regulator-3p2v { 118 compatible = "regulator-fixed"; 119 regulator-name = "3P2V"; 120 regulator-min-microvolt = <3200000>; 121 regulator-max-microvolt = <3200000>; 122 regulator-always-on; 123 }; 124 125 reg_usb_vbus: regulator-vbus { 126 compatible = "regulator-fixed"; 127 regulator-name = "usb_vbus"; 128 regulator-min-microvolt = <5000000>; 129 regulator-max-microvolt = <5000000>; 130 gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>; 131 enable-active-high; 132 }; 133}; 134 135&esdhc1 { 136 pinctrl-names = "default"; 137 pinctrl-0 = <&pinctrl_esdhc1>; 138 cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; 139 bus-width = <4>; 140 status = "okay"; 141}; 142 143&esdhc2 { 144 pinctrl-names = "default"; 145 pinctrl-0 = <&pinctrl_esdhc2>; 146 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 147 bus-width = <4>; 148 status = "okay"; 149}; 150 151&fec { 152 pinctrl-names = "default"; 153 pinctrl-0 = <&pinctrl_fec>; 154 phy-mode = "rmii"; 155 phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; 156 status = "okay"; 157}; 158 159&i2c2 { 160 pinctrl-names = "default"; 161 pinctrl-0 = <&pinctrl_i2c2>; 162 status = "okay"; 163}; 164 165&ipu_di0_disp0 { 166 remote-endpoint = <&display0_in>; 167}; 168 169&uart2 { 170 pinctrl-names = "default"; 171 pinctrl-0 = <&pinctrl_uart2>; 172 fsl,dte-mode; 173 status = "okay"; 174}; 175 176&usbh1 { 177 vbus-supply = <®_usb_vbus>; 178 phy_type = "utmi"; 179 status = "okay"; 180}; 181 182&usbotg { 183 dr_mode = "peripheral"; 184 status = "okay"; 185}; 186 187&vpu { 188 status = "okay"; 189}; 190 191&iomuxc { 192 pinctrl-names = "default"; 193 pinctrl-0 = <&pinctrl_hog>; 194 195 pinctrl_hog: hoggrp { 196 fsl,pins = < 197 MX53_PAD_GPIO_0__CCM_CLKO 0x1c4 198 MX53_PAD_GPIO_16__I2C3_SDA 0x1c4 199 MX53_PAD_EIM_D22__GPIO3_22 0x1c4 200 MX53_PAD_EIM_D23__GPIO3_23 0x1e4 201 MX53_PAD_EIM_D24__GPIO3_24 0x1e4 202 >; 203 }; 204 205 pinctrl_esdhc1: esdhc1grp { 206 fsl,pins = < 207 MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 208 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 209 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 210 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 211 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 212 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 213 MX53_PAD_GPIO_1__ESDHC1_CD 0x1c4 214 MX53_PAD_EIM_D17__GPIO3_17 0x1e4 215 MX53_PAD_GPIO_3__GPIO1_3 0x1c4 216 >; 217 }; 218 219 pinctrl_esdhc2: esdhc2grp { 220 fsl,pins = < 221 MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5 222 MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5 223 MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5 224 MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5 225 MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5 226 MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5 227 MX53_PAD_GPIO_4__ESDHC2_CD 0x1e4 228 MX53_PAD_EIM_D20__GPIO3_20 0x1e4 229 MX53_PAD_GPIO_8__GPIO1_8 0x1c4 230 >; 231 }; 232 233 pinctrl_fec: fecgrp { 234 fsl,pins = < 235 MX53_PAD_FEC_MDC__FEC_MDC 0x4 236 MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc 237 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x180 238 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x180 239 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x180 240 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x180 241 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x180 242 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x4 243 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x4 244 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x4 245 >; 246 }; 247 248 pinctrl_i2c2: i2c2grp { 249 fsl,pins = < 250 MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000 251 MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000 252 >; 253 }; 254 255 pinctrl_ipu_disp0: ipudisp0grp { 256 fsl,pins = < 257 MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5 258 MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5 259 MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5 260 MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5 261 MX53_PAD_DI0_PIN4__IPU_DI0_PIN4 0x5 262 MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5 263 MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5 264 MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5 265 MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5 266 MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5 267 MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5 268 MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5 269 MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 0x5 270 MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 0x5 271 MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 0x5 272 MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 0x5 273 MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 0x5 274 MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 0x5 275 MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 0x5 276 MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 0x5 277 MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 0x5 278 MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 0x5 279 MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 0x5 280 MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 0x5 281 MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 0x5 282 MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 0x5 283 MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 0x5 284 MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 0x5 285 MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 0x5 286 >; 287 }; 288 289 pinctrl_uart2: uart2grp { 290 fsl,pins = < 291 MX53_PAD_EIM_D26__UART2_RXD_MUX 0x1e4 292 MX53_PAD_EIM_D27__UART2_TXD_MUX 0x1e4 293 MX53_PAD_EIM_D28__UART2_RTS 0x1e4 294 MX53_PAD_EIM_D29__UART2_CTS 0x1e4 295 >; 296 }; 297}; 298
