1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14#include <dt-bindings/input/input.h>
15#include "imx53.dtsi"
16
17/ {
18	model = "Freescale i.MX53 Automotive Reference Design Board";
19	compatible = "fsl,imx53-ard", "fsl,imx53";
20
21	memory@70000000 {
22		reg = <0x70000000 0x40000000>;
23	};
24
25	eim-cs1@f4000000 {
26		#address-cells = <1>;
27		#size-cells = <1>;
28		compatible = "fsl,eim-bus", "simple-bus";
29		reg = <0xf4000000 0x3ff0000>;
30		ranges;
31
32		lan9220@f4000000 {
33			compatible = "smsc,lan9220", "smsc,lan9115";
34			reg = <0xf4000000 0x2000000>;
35			phy-mode = "mii";
36			interrupt-parent = <&gpio2>;
37			interrupts = <31 0x8>;
38			reg-io-width = <4>;
39			/*
40			 * VDD33A and VDDVARIO of LAN9220 are supplied by
41			 * SW4_3V3 of LTC3589.  Before the regulator driver
42			 * for this PMIC is available, we use a fixed dummy
43			 * 3V3 regulator to get LAN9220 driver probing work.
44			 */
45			vdd33a-supply = <&reg_3p3v>;
46			vddvario-supply = <&reg_3p3v>;
47			smsc,irq-push-pull;
48		};
49	};
50
51	regulators {
52		compatible = "simple-bus";
53		#address-cells = <1>;
54		#size-cells = <0>;
55
56		reg_3p3v: regulator@0 {
57			compatible = "regulator-fixed";
58			reg = <0>;
59			regulator-name = "3P3V";
60			regulator-min-microvolt = <3300000>;
61			regulator-max-microvolt = <3300000>;
62			regulator-always-on;
63		};
64	};
65
66	gpio-keys {
67		compatible = "gpio-keys";
68
69		home {
70			label = "Home";
71			gpios = <&gpio5 10 0>;
72			linux,code = <KEY_HOME>;
73			wakeup-source;
74		};
75
76		back {
77			label = "Back";
78			gpios = <&gpio5 11 0>;
79			linux,code = <KEY_BACK>;
80			wakeup-source;
81		};
82
83		program {
84			label = "Program";
85			gpios = <&gpio5 12 0>;
86			linux,code = <KEY_PROGRAM >;
87			wakeup-source;
88		};
89
90		volume-up {
91			label = "Volume Up";
92			gpios = <&gpio5 13 0>;
93			linux,code = <KEY_VOLUMEUP>;
94		};
95
96		volume-down {
97			label = "Volume Down";
98			gpios = <&gpio4 0 0>;
99			linux,code = <KEY_VOLUMEDOWN>;
100		};
101	};
102};
103
104&esdhc1 {
105	pinctrl-names = "default";
106	pinctrl-0 = <&pinctrl_esdhc1>;
107	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
108	wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
109	status = "okay";
110};
111
112&iomuxc {
113	pinctrl-names = "default";
114	pinctrl-0 = <&pinctrl_hog>;
115
116	imx53-ard {
117		pinctrl_hog: hoggrp {
118			fsl,pins = <
119				MX53_PAD_GPIO_1__GPIO1_1             0x80000000
120				MX53_PAD_GPIO_9__GPIO1_9             0x80000000
121				MX53_PAD_EIM_EB3__GPIO2_31           0x80000000
122				MX53_PAD_GPIO_10__GPIO4_0            0x80000000
123				MX53_PAD_DISP0_DAT16__GPIO5_10	     0x80000000
124				MX53_PAD_DISP0_DAT17__GPIO5_11       0x80000000
125				MX53_PAD_DISP0_DAT18__GPIO5_12       0x80000000
126				MX53_PAD_DISP0_DAT19__GPIO5_13       0x80000000
127				MX53_PAD_EIM_D16__EMI_WEIM_D_16      0x80000000
128				MX53_PAD_EIM_D17__EMI_WEIM_D_17      0x80000000
129				MX53_PAD_EIM_D18__EMI_WEIM_D_18      0x80000000
130				MX53_PAD_EIM_D19__EMI_WEIM_D_19      0x80000000
131				MX53_PAD_EIM_D20__EMI_WEIM_D_20      0x80000000
132				MX53_PAD_EIM_D21__EMI_WEIM_D_21      0x80000000
133				MX53_PAD_EIM_D22__EMI_WEIM_D_22      0x80000000
134				MX53_PAD_EIM_D23__EMI_WEIM_D_23      0x80000000
135				MX53_PAD_EIM_D24__EMI_WEIM_D_24      0x80000000
136				MX53_PAD_EIM_D25__EMI_WEIM_D_25      0x80000000
137				MX53_PAD_EIM_D26__EMI_WEIM_D_26      0x80000000
138				MX53_PAD_EIM_D27__EMI_WEIM_D_27      0x80000000
139				MX53_PAD_EIM_D28__EMI_WEIM_D_28      0x80000000
140				MX53_PAD_EIM_D29__EMI_WEIM_D_29      0x80000000
141				MX53_PAD_EIM_D30__EMI_WEIM_D_30      0x80000000
142				MX53_PAD_EIM_D31__EMI_WEIM_D_31      0x80000000
143				MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0x80000000
144				MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0x80000000
145				MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0x80000000
146				MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0x80000000
147				MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0x80000000
148				MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0x80000000
149				MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0x80000000
150				MX53_PAD_EIM_OE__EMI_WEIM_OE	     0x80000000
151				MX53_PAD_EIM_RW__EMI_WEIM_RW	     0x80000000
152				MX53_PAD_EIM_CS1__EMI_WEIM_CS_1	     0x80000000
153			>;
154		};
155
156		pinctrl_esdhc1: esdhc1grp {
157			fsl,pins = <
158				MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1d5
159				MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1d5
160				MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1d5
161				MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1d5
162				MX53_PAD_PATA_DATA8__ESDHC1_DAT4	0x1d5
163				MX53_PAD_PATA_DATA9__ESDHC1_DAT5	0x1d5
164				MX53_PAD_PATA_DATA10__ESDHC1_DAT6	0x1d5
165				MX53_PAD_PATA_DATA11__ESDHC1_DAT7	0x1d5
166				MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1d5
167				MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1d5
168			>;
169		};
170
171		pinctrl_uart1: uart1grp {
172			fsl,pins = <
173				MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4
174				MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4
175			>;
176		};
177	};
178};
179
180&uart1 {
181	pinctrl-names = "default";
182	pinctrl-0 = <&pinctrl_uart1>;
183	status = "okay";
184};
185