1// SPDX-License-Identifier: GPL-2.0 2// 3// Copyright 2012 Steffen Trumtrar, Pengutronix 4// 5// based on imx27.dtsi 6 7#include "imx35-pinfunc.h" 8 9/ { 10 #address-cells = <1>; 11 #size-cells = <1>; 12 /* 13 * The decompressor and also some bootloaders rely on a 14 * pre-existing /chosen node to be available to insert the 15 * command line and merge other ATAGS info. 16 * Also for U-Boot there must be a pre-existing /memory node. 17 */ 18 chosen {}; 19 memory { device_type = "memory"; }; 20 21 aliases { 22 ethernet0 = &fec; 23 gpio0 = &gpio1; 24 gpio1 = &gpio2; 25 gpio2 = &gpio3; 26 serial0 = &uart1; 27 serial1 = &uart2; 28 serial2 = &uart3; 29 spi0 = &spi1; 30 spi1 = &spi2; 31 }; 32 33 cpus { 34 #address-cells = <1>; 35 #size-cells = <0>; 36 37 cpu@0 { 38 compatible = "arm,arm1136jf-s"; 39 device_type = "cpu"; 40 reg = <0>; 41 }; 42 }; 43 44 avic: avic-interrupt-controller@68000000 { 45 compatible = "fsl,imx35-avic", "fsl,avic"; 46 interrupt-controller; 47 #interrupt-cells = <1>; 48 reg = <0x68000000 0x10000000>; 49 }; 50 51 soc { 52 #address-cells = <1>; 53 #size-cells = <1>; 54 compatible = "simple-bus"; 55 interrupt-parent = <&avic>; 56 ranges; 57 58 L2: l2-cache@30000000 { 59 compatible = "arm,l210-cache"; 60 reg = <0x30000000 0x1000>; 61 cache-unified; 62 cache-level = <2>; 63 }; 64 65 aips1: aips@43f00000 { 66 compatible = "fsl,aips", "simple-bus"; 67 #address-cells = <1>; 68 #size-cells = <1>; 69 reg = <0x43f00000 0x100000>; 70 ranges; 71 72 i2c1: i2c@43f80000 { 73 #address-cells = <1>; 74 #size-cells = <0>; 75 compatible = "fsl,imx35-i2c", "fsl,imx1-i2c"; 76 reg = <0x43f80000 0x4000>; 77 clocks = <&clks 51>; 78 clock-names = "ipg_per"; 79 interrupts = <10>; 80 status = "disabled"; 81 }; 82 83 i2c3: i2c@43f84000 { 84 #address-cells = <1>; 85 #size-cells = <0>; 86 compatible = "fsl,imx35-i2c", "fsl,imx1-i2c"; 87 reg = <0x43f84000 0x4000>; 88 clocks = <&clks 53>; 89 clock-names = "ipg_per"; 90 interrupts = <3>; 91 status = "disabled"; 92 }; 93 94 uart1: serial@43f90000 { 95 compatible = "fsl,imx35-uart", "fsl,imx21-uart"; 96 reg = <0x43f90000 0x4000>; 97 clocks = <&clks 9>, <&clks 70>; 98 clock-names = "ipg", "per"; 99 interrupts = <45>; 100 status = "disabled"; 101 }; 102 103 uart2: serial@43f94000 { 104 compatible = "fsl,imx35-uart", "fsl,imx21-uart"; 105 reg = <0x43f94000 0x4000>; 106 clocks = <&clks 9>, <&clks 71>; 107 clock-names = "ipg", "per"; 108 interrupts = <32>; 109 status = "disabled"; 110 }; 111 112 i2c2: i2c@43f98000 { 113 #address-cells = <1>; 114 #size-cells = <0>; 115 compatible = "fsl,imx35-i2c", "fsl,imx1-i2c"; 116 reg = <0x43f98000 0x4000>; 117 clocks = <&clks 52>; 118 clock-names = "ipg_per"; 119 interrupts = <4>; 120 status = "disabled"; 121 }; 122 123 ssi1: ssi@43fa0000 { 124 #sound-dai-cells = <0>; 125 compatible = "fsl,imx35-ssi", "fsl,imx21-ssi"; 126 reg = <0x43fa0000 0x4000>; 127 interrupts = <11>; 128 clocks = <&clks 68>; 129 dmas = <&sdma 28 0 0>, 130 <&sdma 29 0 0>; 131 dma-names = "rx", "tx"; 132 fsl,fifo-depth = <15>; 133 status = "disabled"; 134 }; 135 136 spi1: cspi@43fa4000 { 137 #address-cells = <1>; 138 #size-cells = <0>; 139 compatible = "fsl,imx35-cspi"; 140 reg = <0x43fa4000 0x4000>; 141 clocks = <&clks 35 &clks 35>; 142 clock-names = "ipg", "per"; 143 interrupts = <14>; 144 status = "disabled"; 145 }; 146 147 kpp: kpp@43fa8000 { 148 compatible = "fsl,imx35-kpp", "fsl,imx21-kpp"; 149 reg = <0x43fa8000 0x4000>; 150 interrupts = <24>; 151 clocks = <&clks 56>; 152 status = "disabled"; 153 }; 154 155 iomuxc: iomuxc@43fac000 { 156 compatible = "fsl,imx35-iomuxc"; 157 reg = <0x43fac000 0x4000>; 158 }; 159 }; 160 161 spba: spba-bus@50000000 { 162 compatible = "fsl,spba-bus", "simple-bus"; 163 #address-cells = <1>; 164 #size-cells = <1>; 165 reg = <0x50000000 0x100000>; 166 ranges; 167 168 uart3: serial@5000c000 { 169 compatible = "fsl,imx35-uart", "fsl,imx21-uart"; 170 reg = <0x5000c000 0x4000>; 171 clocks = <&clks 9>, <&clks 72>; 172 clock-names = "ipg", "per"; 173 interrupts = <18>; 174 status = "disabled"; 175 }; 176 177 spi2: cspi@50010000 { 178 #address-cells = <1>; 179 #size-cells = <0>; 180 compatible = "fsl,imx35-cspi"; 181 reg = <0x50010000 0x4000>; 182 interrupts = <13>; 183 clocks = <&clks 36 &clks 36>; 184 clock-names = "ipg", "per"; 185 status = "disabled"; 186 }; 187 188 fec: fec@50038000 { 189 compatible = "fsl,imx35-fec", "fsl,imx27-fec"; 190 reg = <0x50038000 0x4000>; 191 clocks = <&clks 46>, <&clks 8>; 192 clock-names = "ipg", "ahb"; 193 interrupts = <57>; 194 status = "disabled"; 195 }; 196 }; 197 198 aips2: aips@53f00000 { 199 compatible = "fsl,aips", "simple-bus"; 200 #address-cells = <1>; 201 #size-cells = <1>; 202 reg = <0x53f00000 0x100000>; 203 ranges; 204 205 clks: ccm@53f80000 { 206 compatible = "fsl,imx35-ccm"; 207 reg = <0x53f80000 0x4000>; 208 interrupts = <31>; 209 #clock-cells = <1>; 210 }; 211 212 gpt: timer@53f90000 { 213 compatible = "fsl,imx35-gpt", "fsl,imx31-gpt"; 214 reg = <0x53f90000 0x4000>; 215 interrupts = <29>; 216 clocks = <&clks 9>, <&clks 50>; 217 clock-names = "ipg", "per"; 218 }; 219 220 gpio3: gpio@53fa4000 { 221 compatible = "fsl,imx35-gpio", "fsl,imx31-gpio"; 222 reg = <0x53fa4000 0x4000>; 223 interrupts = <56>; 224 gpio-controller; 225 #gpio-cells = <2>; 226 interrupt-controller; 227 #interrupt-cells = <2>; 228 }; 229 230 esdhc1: esdhc@53fb4000 { 231 compatible = "fsl,imx35-esdhc"; 232 reg = <0x53fb4000 0x4000>; 233 interrupts = <7>; 234 clocks = <&clks 9>, <&clks 8>, <&clks 43>; 235 clock-names = "ipg", "ahb", "per"; 236 status = "disabled"; 237 }; 238 239 esdhc2: esdhc@53fb8000 { 240 compatible = "fsl,imx35-esdhc"; 241 reg = <0x53fb8000 0x4000>; 242 interrupts = <8>; 243 clocks = <&clks 9>, <&clks 8>, <&clks 44>; 244 clock-names = "ipg", "ahb", "per"; 245 status = "disabled"; 246 }; 247 248 esdhc3: esdhc@53fbc000 { 249 compatible = "fsl,imx35-esdhc"; 250 reg = <0x53fbc000 0x4000>; 251 interrupts = <9>; 252 clocks = <&clks 9>, <&clks 8>, <&clks 45>; 253 clock-names = "ipg", "ahb", "per"; 254 status = "disabled"; 255 }; 256 257 audmux: audmux@53fc4000 { 258 compatible = "fsl,imx35-audmux", "fsl,imx31-audmux"; 259 reg = <0x53fc4000 0x4000>; 260 status = "disabled"; 261 }; 262 263 gpio1: gpio@53fcc000 { 264 compatible = "fsl,imx35-gpio", "fsl,imx31-gpio"; 265 reg = <0x53fcc000 0x4000>; 266 interrupts = <52>; 267 gpio-controller; 268 #gpio-cells = <2>; 269 interrupt-controller; 270 #interrupt-cells = <2>; 271 }; 272 273 gpio2: gpio@53fd0000 { 274 compatible = "fsl,imx35-gpio", "fsl,imx31-gpio"; 275 reg = <0x53fd0000 0x4000>; 276 interrupts = <51>; 277 gpio-controller; 278 #gpio-cells = <2>; 279 interrupt-controller; 280 #interrupt-cells = <2>; 281 }; 282 283 sdma: sdma@53fd4000 { 284 compatible = "fsl,imx35-sdma"; 285 reg = <0x53fd4000 0x4000>; 286 clocks = <&clks 9>, <&clks 65>; 287 clock-names = "ipg", "ahb"; 288 #dma-cells = <3>; 289 interrupts = <34>; 290 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx35.bin"; 291 }; 292 293 wdog: wdog@53fdc000 { 294 compatible = "fsl,imx35-wdt", "fsl,imx21-wdt"; 295 reg = <0x53fdc000 0x4000>; 296 clocks = <&clks 74>; 297 clock-names = ""; 298 interrupts = <55>; 299 }; 300 301 can1: can@53fe4000 { 302 compatible = "fsl,imx35-flexcan", "fsl,imx25-flexcan"; 303 reg = <0x53fe4000 0x1000>; 304 clocks = <&clks 33>, <&clks 33>; 305 clock-names = "ipg", "per"; 306 interrupts = <43>; 307 status = "disabled"; 308 }; 309 310 can2: can@53fe8000 { 311 compatible = "fsl,imx35-flexcan", "fsl,imx25-flexcan"; 312 reg = <0x53fe8000 0x1000>; 313 clocks = <&clks 34>, <&clks 34>; 314 clock-names = "ipg", "per"; 315 interrupts = <44>; 316 status = "disabled"; 317 }; 318 319 iim@53ff0000 { 320 compatible = "fsl,imx35-iim"; 321 reg = <0x53ff0000 0x4000>; 322 interrupts = <19>; 323 clocks = <&clks 80>; 324 }; 325 326 usbotg: usb@53ff4000 { 327 compatible = "fsl,imx35-usb", "fsl,imx27-usb"; 328 reg = <0x53ff4000 0x0200>; 329 interrupts = <37>; 330 clocks = <&clks 9>, <&clks 73>, <&clks 28>; 331 clock-names = "ipg", "ahb", "per"; 332 fsl,usbmisc = <&usbmisc 0>; 333 fsl,usbphy = <&usbphy0>; 334 status = "disabled"; 335 }; 336 337 usbhost1: usb@53ff4400 { 338 compatible = "fsl,imx35-usb", "fsl,imx27-usb"; 339 reg = <0x53ff4400 0x0200>; 340 interrupts = <35>; 341 clocks = <&clks 9>, <&clks 73>, <&clks 28>; 342 clock-names = "ipg", "ahb", "per"; 343 fsl,usbmisc = <&usbmisc 1>; 344 fsl,usbphy = <&usbphy1>; 345 dr_mode = "host"; 346 status = "disabled"; 347 }; 348 349 usbmisc: usbmisc@53ff4600 { 350 #index-cells = <1>; 351 compatible = "fsl,imx35-usbmisc"; 352 reg = <0x53ff4600 0x00f>; 353 }; 354 }; 355 356 emi@80000000 { /* External Memory Interface */ 357 compatible = "fsl,emi", "simple-bus"; 358 #address-cells = <1>; 359 #size-cells = <1>; 360 reg = <0x80000000 0x40000000>; 361 ranges; 362 363 nfc: nand@bb000000 { 364 #address-cells = <1>; 365 #size-cells = <1>; 366 compatible = "fsl,imx35-nand", "fsl,imx25-nand"; 367 reg = <0xbb000000 0x2000>; 368 clocks = <&clks 29>; 369 clock-names = ""; 370 interrupts = <33>; 371 status = "disabled"; 372 }; 373 374 weim: weim@b8002000 { 375 #address-cells = <2>; 376 #size-cells = <1>; 377 clocks = <&clks 0>; 378 compatible = "fsl,imx35-weim", "fsl,imx27-weim"; 379 reg = <0xb8002000 0x1000>; 380 ranges = < 381 0 0 0xa0000000 0x8000000 382 1 0 0xa8000000 0x8000000 383 2 0 0xb0000000 0x2000000 384 3 0 0xb2000000 0x2000000 385 4 0 0xb4000000 0x2000000 386 5 0 0xb6000000 0x2000000 387 >; 388 status = "disabled"; 389 }; 390 }; 391 }; 392 393 usbphy { 394 compatible = "simple-bus"; 395 #address-cells = <1>; 396 #size-cells = <0>; 397 398 usbphy0: usb-phy@0 { 399 reg = <0>; 400 compatible = "usb-nop-xceiv"; 401 #phy-cells = <0>; 402 }; 403 404 usbphy1: usb-phy@1 { 405 reg = <1>; 406 compatible = "usb-nop-xceiv"; 407 #phy-cells = <0>; 408 }; 409 }; 410}; 411