1// SPDX-License-Identifier: GPL-2.0+ 2// 3// Copyright 2012 Freescale Semiconductor, Inc. 4 5#include "imx23-pinfunc.h" 6 7/ { 8 #address-cells = <1>; 9 #size-cells = <1>; 10 11 interrupt-parent = <&icoll>; 12 /* 13 * The decompressor and also some bootloaders rely on a 14 * pre-existing /chosen node to be available to insert the 15 * command line and merge other ATAGS info. 16 * Also for U-Boot there must be a pre-existing /memory node. 17 */ 18 chosen {}; 19 memory { device_type = "memory"; }; 20 21 aliases { 22 gpio0 = &gpio0; 23 gpio1 = &gpio1; 24 gpio2 = &gpio2; 25 serial0 = &auart0; 26 serial1 = &auart1; 27 spi0 = &ssp0; 28 spi1 = &ssp1; 29 usbphy0 = &usbphy0; 30 }; 31 32 cpus { 33 #address-cells = <1>; 34 #size-cells = <0>; 35 36 cpu@0 { 37 compatible = "arm,arm926ej-s"; 38 device_type = "cpu"; 39 reg = <0>; 40 }; 41 }; 42 43 apb@80000000 { 44 compatible = "simple-bus"; 45 #address-cells = <1>; 46 #size-cells = <1>; 47 reg = <0x80000000 0x80000>; 48 ranges; 49 50 apbh@80000000 { 51 compatible = "simple-bus"; 52 #address-cells = <1>; 53 #size-cells = <1>; 54 reg = <0x80000000 0x40000>; 55 ranges; 56 57 icoll: interrupt-controller@80000000 { 58 compatible = "fsl,imx23-icoll", "fsl,icoll"; 59 interrupt-controller; 60 #interrupt-cells = <1>; 61 reg = <0x80000000 0x2000>; 62 }; 63 64 dma_apbh: dma-apbh@80004000 { 65 compatible = "fsl,imx23-dma-apbh"; 66 reg = <0x80004000 0x2000>; 67 interrupts = <0 14 20 0 68 13 13 13 13>; 69 interrupt-names = "empty", "ssp0", "ssp1", "empty", 70 "gpmi0", "gpmi1", "gpmi2", "gpmi3"; 71 #dma-cells = <1>; 72 dma-channels = <8>; 73 clocks = <&clks 15>; 74 }; 75 76 ecc@80008000 { 77 reg = <0x80008000 0x2000>; 78 status = "disabled"; 79 }; 80 81 gpmi-nand@8000c000 { 82 compatible = "fsl,imx23-gpmi-nand"; 83 #address-cells = <1>; 84 #size-cells = <1>; 85 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>; 86 reg-names = "gpmi-nand", "bch"; 87 interrupts = <56>; 88 interrupt-names = "bch"; 89 clocks = <&clks 34>; 90 clock-names = "gpmi_io"; 91 dmas = <&dma_apbh 4>; 92 dma-names = "rx-tx"; 93 status = "disabled"; 94 }; 95 96 ssp0: ssp@80010000 { 97 reg = <0x80010000 0x2000>; 98 interrupts = <15>; 99 clocks = <&clks 33>; 100 dmas = <&dma_apbh 1>; 101 dma-names = "rx-tx"; 102 status = "disabled"; 103 }; 104 105 etm@80014000 { 106 reg = <0x80014000 0x2000>; 107 status = "disabled"; 108 }; 109 110 pinctrl@80018000 { 111 #address-cells = <1>; 112 #size-cells = <0>; 113 compatible = "fsl,imx23-pinctrl", "simple-bus"; 114 reg = <0x80018000 0x2000>; 115 116 gpio0: gpio@0 { 117 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; 118 reg = <0>; 119 interrupts = <16>; 120 gpio-controller; 121 #gpio-cells = <2>; 122 interrupt-controller; 123 #interrupt-cells = <2>; 124 }; 125 126 gpio1: gpio@1 { 127 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; 128 reg = <1>; 129 interrupts = <17>; 130 gpio-controller; 131 #gpio-cells = <2>; 132 interrupt-controller; 133 #interrupt-cells = <2>; 134 }; 135 136 gpio2: gpio@2 { 137 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; 138 reg = <2>; 139 interrupts = <18>; 140 gpio-controller; 141 #gpio-cells = <2>; 142 interrupt-controller; 143 #interrupt-cells = <2>; 144 }; 145 146 duart_pins_a: duart@0 { 147 reg = <0>; 148 fsl,pinmux-ids = < 149 MX23_PAD_PWM0__DUART_RX 150 MX23_PAD_PWM1__DUART_TX 151 >; 152 fsl,drive-strength = <MXS_DRIVE_4mA>; 153 fsl,voltage = <MXS_VOLTAGE_HIGH>; 154 fsl,pull-up = <MXS_PULL_DISABLE>; 155 }; 156 157 auart0_pins_a: auart0@0 { 158 reg = <0>; 159 fsl,pinmux-ids = < 160 MX23_PAD_AUART1_RX__AUART1_RX 161 MX23_PAD_AUART1_TX__AUART1_TX 162 MX23_PAD_AUART1_CTS__AUART1_CTS 163 MX23_PAD_AUART1_RTS__AUART1_RTS 164 >; 165 fsl,drive-strength = <MXS_DRIVE_4mA>; 166 fsl,voltage = <MXS_VOLTAGE_HIGH>; 167 fsl,pull-up = <MXS_PULL_DISABLE>; 168 }; 169 170 auart0_2pins_a: auart0-2pins@0 { 171 reg = <0>; 172 fsl,pinmux-ids = < 173 MX23_PAD_I2C_SCL__AUART1_TX 174 MX23_PAD_I2C_SDA__AUART1_RX 175 >; 176 fsl,drive-strength = <MXS_DRIVE_4mA>; 177 fsl,voltage = <MXS_VOLTAGE_HIGH>; 178 fsl,pull-up = <MXS_PULL_DISABLE>; 179 }; 180 181 auart1_2pins_a: auart1-2pins@0 { 182 reg = <0>; 183 fsl,pinmux-ids = < 184 MX23_PAD_GPMI_D14__AUART2_RX 185 MX23_PAD_GPMI_D15__AUART2_TX 186 >; 187 fsl,drive-strength = <MXS_DRIVE_4mA>; 188 fsl,voltage = <MXS_VOLTAGE_HIGH>; 189 fsl,pull-up = <MXS_PULL_DISABLE>; 190 }; 191 192 gpmi_pins_a: gpmi-nand@0 { 193 reg = <0>; 194 fsl,pinmux-ids = < 195 MX23_PAD_GPMI_D00__GPMI_D00 196 MX23_PAD_GPMI_D01__GPMI_D01 197 MX23_PAD_GPMI_D02__GPMI_D02 198 MX23_PAD_GPMI_D03__GPMI_D03 199 MX23_PAD_GPMI_D04__GPMI_D04 200 MX23_PAD_GPMI_D05__GPMI_D05 201 MX23_PAD_GPMI_D06__GPMI_D06 202 MX23_PAD_GPMI_D07__GPMI_D07 203 MX23_PAD_GPMI_CLE__GPMI_CLE 204 MX23_PAD_GPMI_ALE__GPMI_ALE 205 MX23_PAD_GPMI_RDY0__GPMI_RDY0 206 MX23_PAD_GPMI_RDY1__GPMI_RDY1 207 MX23_PAD_GPMI_WPN__GPMI_WPN 208 MX23_PAD_GPMI_WRN__GPMI_WRN 209 MX23_PAD_GPMI_RDN__GPMI_RDN 210 MX23_PAD_GPMI_CE1N__GPMI_CE1N 211 MX23_PAD_GPMI_CE0N__GPMI_CE0N 212 >; 213 fsl,drive-strength = <MXS_DRIVE_4mA>; 214 fsl,voltage = <MXS_VOLTAGE_HIGH>; 215 fsl,pull-up = <MXS_PULL_DISABLE>; 216 }; 217 218 gpmi_pins_fixup: gpmi-pins-fixup@0 { 219 reg = <0>; 220 fsl,pinmux-ids = < 221 MX23_PAD_GPMI_WPN__GPMI_WPN 222 MX23_PAD_GPMI_WRN__GPMI_WRN 223 MX23_PAD_GPMI_RDN__GPMI_RDN 224 >; 225 fsl,drive-strength = <MXS_DRIVE_12mA>; 226 }; 227 228 mmc0_4bit_pins_a: mmc0-4bit@0 { 229 reg = <0>; 230 fsl,pinmux-ids = < 231 MX23_PAD_SSP1_DATA0__SSP1_DATA0 232 MX23_PAD_SSP1_DATA1__SSP1_DATA1 233 MX23_PAD_SSP1_DATA2__SSP1_DATA2 234 MX23_PAD_SSP1_DATA3__SSP1_DATA3 235 MX23_PAD_SSP1_CMD__SSP1_CMD 236 MX23_PAD_SSP1_SCK__SSP1_SCK 237 >; 238 fsl,drive-strength = <MXS_DRIVE_8mA>; 239 fsl,voltage = <MXS_VOLTAGE_HIGH>; 240 fsl,pull-up = <MXS_PULL_ENABLE>; 241 }; 242 243 mmc0_8bit_pins_a: mmc0-8bit@0 { 244 reg = <0>; 245 fsl,pinmux-ids = < 246 MX23_PAD_SSP1_DATA0__SSP1_DATA0 247 MX23_PAD_SSP1_DATA1__SSP1_DATA1 248 MX23_PAD_SSP1_DATA2__SSP1_DATA2 249 MX23_PAD_SSP1_DATA3__SSP1_DATA3 250 MX23_PAD_GPMI_D08__SSP1_DATA4 251 MX23_PAD_GPMI_D09__SSP1_DATA5 252 MX23_PAD_GPMI_D10__SSP1_DATA6 253 MX23_PAD_GPMI_D11__SSP1_DATA7 254 MX23_PAD_SSP1_CMD__SSP1_CMD 255 MX23_PAD_SSP1_DETECT__SSP1_DETECT 256 MX23_PAD_SSP1_SCK__SSP1_SCK 257 >; 258 fsl,drive-strength = <MXS_DRIVE_8mA>; 259 fsl,voltage = <MXS_VOLTAGE_HIGH>; 260 fsl,pull-up = <MXS_PULL_ENABLE>; 261 }; 262 263 mmc0_pins_fixup: mmc0-pins-fixup@0 { 264 reg = <0>; 265 fsl,pinmux-ids = < 266 MX23_PAD_SSP1_DETECT__SSP1_DETECT 267 MX23_PAD_SSP1_SCK__SSP1_SCK 268 >; 269 fsl,pull-up = <MXS_PULL_DISABLE>; 270 }; 271 272 mmc1_4bit_pins_a: mmc1-4bit@0 { 273 reg = <0>; 274 fsl,pinmux-ids = < 275 MX23_PAD_GPMI_D00__SSP2_DATA0 276 MX23_PAD_GPMI_D01__SSP2_DATA1 277 MX23_PAD_GPMI_D02__SSP2_DATA2 278 MX23_PAD_GPMI_D03__SSP2_DATA3 279 MX23_PAD_GPMI_RDY1__SSP2_CMD 280 MX23_PAD_GPMI_WRN__SSP2_SCK 281 >; 282 fsl,drive-strength = <MXS_DRIVE_8mA>; 283 fsl,voltage = <MXS_VOLTAGE_HIGH>; 284 fsl,pull-up = <MXS_PULL_ENABLE>; 285 }; 286 287 mmc1_8bit_pins_a: mmc1-8bit@0 { 288 reg = <0>; 289 fsl,pinmux-ids = < 290 MX23_PAD_GPMI_D00__SSP2_DATA0 291 MX23_PAD_GPMI_D01__SSP2_DATA1 292 MX23_PAD_GPMI_D02__SSP2_DATA2 293 MX23_PAD_GPMI_D03__SSP2_DATA3 294 MX23_PAD_GPMI_D04__SSP2_DATA4 295 MX23_PAD_GPMI_D05__SSP2_DATA5 296 MX23_PAD_GPMI_D06__SSP2_DATA6 297 MX23_PAD_GPMI_D07__SSP2_DATA7 298 MX23_PAD_GPMI_RDY1__SSP2_CMD 299 MX23_PAD_GPMI_WRN__SSP2_SCK 300 >; 301 fsl,drive-strength = <MXS_DRIVE_8mA>; 302 fsl,voltage = <MXS_VOLTAGE_HIGH>; 303 fsl,pull-up = <MXS_PULL_ENABLE>; 304 }; 305 306 pwm2_pins_a: pwm2@0 { 307 reg = <0>; 308 fsl,pinmux-ids = < 309 MX23_PAD_PWM2__PWM2 310 >; 311 fsl,drive-strength = <MXS_DRIVE_4mA>; 312 fsl,voltage = <MXS_VOLTAGE_HIGH>; 313 fsl,pull-up = <MXS_PULL_DISABLE>; 314 }; 315 316 lcdif_24bit_pins_a: lcdif-24bit@0 { 317 reg = <0>; 318 fsl,pinmux-ids = < 319 MX23_PAD_LCD_D00__LCD_D00 320 MX23_PAD_LCD_D01__LCD_D01 321 MX23_PAD_LCD_D02__LCD_D02 322 MX23_PAD_LCD_D03__LCD_D03 323 MX23_PAD_LCD_D04__LCD_D04 324 MX23_PAD_LCD_D05__LCD_D05 325 MX23_PAD_LCD_D06__LCD_D06 326 MX23_PAD_LCD_D07__LCD_D07 327 MX23_PAD_LCD_D08__LCD_D08 328 MX23_PAD_LCD_D09__LCD_D09 329 MX23_PAD_LCD_D10__LCD_D10 330 MX23_PAD_LCD_D11__LCD_D11 331 MX23_PAD_LCD_D12__LCD_D12 332 MX23_PAD_LCD_D13__LCD_D13 333 MX23_PAD_LCD_D14__LCD_D14 334 MX23_PAD_LCD_D15__LCD_D15 335 MX23_PAD_LCD_D16__LCD_D16 336 MX23_PAD_LCD_D17__LCD_D17 337 MX23_PAD_GPMI_D08__LCD_D18 338 MX23_PAD_GPMI_D09__LCD_D19 339 MX23_PAD_GPMI_D10__LCD_D20 340 MX23_PAD_GPMI_D11__LCD_D21 341 MX23_PAD_GPMI_D12__LCD_D22 342 MX23_PAD_GPMI_D13__LCD_D23 343 MX23_PAD_LCD_DOTCK__LCD_DOTCK 344 MX23_PAD_LCD_ENABLE__LCD_ENABLE 345 MX23_PAD_LCD_HSYNC__LCD_HSYNC 346 MX23_PAD_LCD_VSYNC__LCD_VSYNC 347 >; 348 fsl,drive-strength = <MXS_DRIVE_4mA>; 349 fsl,voltage = <MXS_VOLTAGE_HIGH>; 350 fsl,pull-up = <MXS_PULL_DISABLE>; 351 }; 352 353 spi2_pins_a: spi2@0 { 354 reg = <0>; 355 fsl,pinmux-ids = < 356 MX23_PAD_GPMI_WRN__SSP2_SCK 357 MX23_PAD_GPMI_RDY1__SSP2_CMD 358 MX23_PAD_GPMI_D00__SSP2_DATA0 359 MX23_PAD_GPMI_D03__SSP2_DATA3 360 >; 361 fsl,drive-strength = <MXS_DRIVE_8mA>; 362 fsl,voltage = <MXS_VOLTAGE_HIGH>; 363 fsl,pull-up = <MXS_PULL_ENABLE>; 364 }; 365 366 i2c_pins_a: i2c@0 { 367 reg = <0>; 368 fsl,pinmux-ids = < 369 MX23_PAD_I2C_SCL__I2C_SCL 370 MX23_PAD_I2C_SDA__I2C_SDA 371 >; 372 fsl,drive-strength = <MXS_DRIVE_8mA>; 373 fsl,voltage = <MXS_VOLTAGE_HIGH>; 374 fsl,pull-up = <MXS_PULL_ENABLE>; 375 }; 376 377 i2c_pins_b: i2c@1 { 378 reg = <1>; 379 fsl,pinmux-ids = < 380 MX23_PAD_LCD_ENABLE__I2C_SCL 381 MX23_PAD_LCD_HSYNC__I2C_SDA 382 >; 383 fsl,drive-strength = <MXS_DRIVE_8mA>; 384 fsl,voltage = <MXS_VOLTAGE_HIGH>; 385 fsl,pull-up = <MXS_PULL_ENABLE>; 386 }; 387 388 i2c_pins_c: i2c@2 { 389 reg = <2>; 390 fsl,pinmux-ids = < 391 MX23_PAD_SSP1_DATA1__I2C_SCL 392 MX23_PAD_SSP1_DATA2__I2C_SDA 393 >; 394 fsl,drive-strength = <MXS_DRIVE_8mA>; 395 fsl,voltage = <MXS_VOLTAGE_HIGH>; 396 fsl,pull-up = <MXS_PULL_ENABLE>; 397 }; 398 }; 399 400 digctl@8001c000 { 401 compatible = "fsl,imx23-digctl"; 402 reg = <0x8001c000 2000>; 403 status = "disabled"; 404 }; 405 406 emi@80020000 { 407 reg = <0x80020000 0x2000>; 408 status = "disabled"; 409 }; 410 411 dma_apbx: dma-apbx@80024000 { 412 compatible = "fsl,imx23-dma-apbx"; 413 reg = <0x80024000 0x2000>; 414 interrupts = <7 5 9 26 415 19 0 25 23 416 60 58 9 0 417 0 0 0 0>; 418 interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c", 419 "saif0", "empty", "auart0-rx", "auart0-tx", 420 "auart1-rx", "auart1-tx", "saif1", "empty", 421 "empty", "empty", "empty", "empty"; 422 #dma-cells = <1>; 423 dma-channels = <16>; 424 clocks = <&clks 16>; 425 }; 426 427 dcp@80028000 { 428 compatible = "fsl,imx23-dcp"; 429 reg = <0x80028000 0x2000>; 430 interrupts = <53 54>; 431 status = "okay"; 432 }; 433 434 pxp@8002a000 { 435 reg = <0x8002a000 0x2000>; 436 status = "disabled"; 437 }; 438 439 ocotp@8002c000 { 440 compatible = "fsl,imx23-ocotp", "fsl,ocotp"; 441 #address-cells = <1>; 442 #size-cells = <1>; 443 reg = <0x8002c000 0x2000>; 444 clocks = <&clks 15>; 445 }; 446 447 axi-ahb@8002e000 { 448 reg = <0x8002e000 0x2000>; 449 status = "disabled"; 450 }; 451 452 lcdif@80030000 { 453 compatible = "fsl,imx23-lcdif"; 454 reg = <0x80030000 2000>; 455 interrupts = <46 45>; 456 clocks = <&clks 38>; 457 status = "disabled"; 458 }; 459 460 ssp1: ssp@80034000 { 461 reg = <0x80034000 0x2000>; 462 interrupts = <2>; 463 clocks = <&clks 33>; 464 dmas = <&dma_apbh 2>; 465 dma-names = "rx-tx"; 466 status = "disabled"; 467 }; 468 469 tvenc@80038000 { 470 reg = <0x80038000 0x2000>; 471 status = "disabled"; 472 }; 473 }; 474 475 apbx@80040000 { 476 compatible = "simple-bus"; 477 #address-cells = <1>; 478 #size-cells = <1>; 479 reg = <0x80040000 0x40000>; 480 ranges; 481 482 clks: clkctrl@80040000 { 483 compatible = "fsl,imx23-clkctrl", "fsl,clkctrl"; 484 reg = <0x80040000 0x2000>; 485 #clock-cells = <1>; 486 }; 487 488 saif0: saif@80042000 { 489 reg = <0x80042000 0x2000>; 490 dmas = <&dma_apbx 4>; 491 dma-names = "rx-tx"; 492 status = "disabled"; 493 }; 494 495 power@80044000 { 496 reg = <0x80044000 0x2000>; 497 status = "disabled"; 498 }; 499 500 saif1: saif@80046000 { 501 reg = <0x80046000 0x2000>; 502 dmas = <&dma_apbx 10>; 503 dma-names = "rx-tx"; 504 status = "disabled"; 505 }; 506 507 audio-out@80048000 { 508 reg = <0x80048000 0x2000>; 509 dmas = <&dma_apbx 1>; 510 dma-names = "tx"; 511 status = "disabled"; 512 }; 513 514 audio-in@8004c000 { 515 reg = <0x8004c000 0x2000>; 516 dmas = <&dma_apbx 0>; 517 dma-names = "rx"; 518 status = "disabled"; 519 }; 520 521 lradc: lradc@80050000 { 522 compatible = "fsl,imx23-lradc"; 523 reg = <0x80050000 0x2000>; 524 interrupts = <36 37 38 39 40 41 42 43 44>; 525 status = "disabled"; 526 clocks = <&clks 26>; 527 #io-channel-cells = <1>; 528 }; 529 530 spdif@80054000 { 531 reg = <0x80054000 2000>; 532 dmas = <&dma_apbx 2>; 533 dma-names = "tx"; 534 status = "disabled"; 535 }; 536 537 i2c: i2c@80058000 { 538 #address-cells = <1>; 539 #size-cells = <0>; 540 compatible = "fsl,imx23-i2c"; 541 reg = <0x80058000 0x2000>; 542 interrupts = <27>; 543 clock-frequency = <100000>; 544 dmas = <&dma_apbx 3>; 545 dma-names = "rx-tx"; 546 status = "disabled"; 547 }; 548 549 rtc@8005c000 { 550 compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc"; 551 reg = <0x8005c000 0x2000>; 552 interrupts = <22>; 553 }; 554 555 pwm: pwm@80064000 { 556 compatible = "fsl,imx23-pwm"; 557 reg = <0x80064000 0x2000>; 558 clocks = <&clks 30>; 559 #pwm-cells = <2>; 560 fsl,pwm-number = <5>; 561 status = "disabled"; 562 }; 563 564 timrot@80068000 { 565 compatible = "fsl,imx23-timrot", "fsl,timrot"; 566 reg = <0x80068000 0x2000>; 567 interrupts = <28 29 30 31>; 568 clocks = <&clks 28>; 569 }; 570 571 auart0: serial@8006c000 { 572 compatible = "fsl,imx23-auart"; 573 reg = <0x8006c000 0x2000>; 574 interrupts = <24>; 575 clocks = <&clks 32>; 576 dmas = <&dma_apbx 6>, <&dma_apbx 7>; 577 dma-names = "rx", "tx"; 578 status = "disabled"; 579 }; 580 581 auart1: serial@8006e000 { 582 compatible = "fsl,imx23-auart"; 583 reg = <0x8006e000 0x2000>; 584 interrupts = <59>; 585 clocks = <&clks 32>; 586 dmas = <&dma_apbx 8>, <&dma_apbx 9>; 587 dma-names = "rx", "tx"; 588 status = "disabled"; 589 }; 590 591 duart: serial@80070000 { 592 compatible = "arm,pl011", "arm,primecell"; 593 reg = <0x80070000 0x2000>; 594 interrupts = <0>; 595 clocks = <&clks 32>, <&clks 16>; 596 clock-names = "uart", "apb_pclk"; 597 status = "disabled"; 598 }; 599 600 usbphy0: usbphy@8007c000 { 601 compatible = "fsl,imx23-usbphy"; 602 reg = <0x8007c000 0x2000>; 603 clocks = <&clks 41>; 604 status = "disabled"; 605 }; 606 }; 607 }; 608 609 ahb@80080000 { 610 compatible = "simple-bus"; 611 #address-cells = <1>; 612 #size-cells = <1>; 613 reg = <0x80080000 0x80000>; 614 ranges; 615 616 usb0: usb@80080000 { 617 compatible = "fsl,imx23-usb", "fsl,imx27-usb"; 618 reg = <0x80080000 0x40000>; 619 interrupts = <11>; 620 fsl,usbphy = <&usbphy0>; 621 clocks = <&clks 40>; 622 status = "disabled"; 623 }; 624 }; 625 626 iio-hwmon { 627 compatible = "iio-hwmon"; 628 io-channels = <&lradc 8>; 629 }; 630}; 631
