1/* 2 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9#include "dra74x.dtsi" 10 11/ { 12 compatible = "ti,dra762", "ti,dra7"; 13 14 ocp { 15 target-module@42c01900 { 16 compatible = "ti,sysc-dra7-mcan", "ti,sysc"; 17 ranges = <0x0 0x42c00000 0x2000>; 18 #address-cells = <1>; 19 #size-cells = <1>; 20 reg = <0x42c01900 0x4>, 21 <0x42c01904 0x4>, 22 <0x42c01908 0x4>; 23 reg-names = "rev", "sysc", "syss"; 24 ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET | 25 SYSC_DRA7_MCAN_ENAWAKEUP)>; 26 ti,syss-mask = <1>; 27 clocks = <&wkupaon_clkctrl DRA7_ADC_CLKCTRL 0>; 28 clock-names = "fck"; 29 30 m_can0: mcan@1a00 { 31 compatible = "bosch,m_can"; 32 reg = <0x1a00 0x4000>, <0x0 0x18FC>; 33 reg-names = "m_can", "message_ram"; 34 interrupt-parent = <&gic>; 35 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 36 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 37 interrupt-names = "int0", "int1"; 38 clocks = <&mcan_clk>, <&l3_iclk_div>; 39 clock-names = "cclk", "hclk"; 40 bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>; 41 }; 42 }; 43 }; 44 45}; 46 47/* MCAN interrupts are hard-wired to irqs 67, 68 */ 48&crossbar_mpu { 49 ti,irqs-skip = <10 67 68 133 139 140>; 50}; 51 52&scm_conf_clocks { 53 dpll_gmac_h14x2_ctrl_ck: dpll_gmac_h14x2_ctrl_ck@3fc { 54 #clock-cells = <0>; 55 compatible = "ti,divider-clock"; 56 clocks = <&dpll_gmac_x2_ck>; 57 ti,max-div = <63>; 58 reg = <0x03fc>; 59 ti,bit-shift=<20>; 60 ti,latch-bit=<26>; 61 assigned-clocks = <&dpll_gmac_h14x2_ctrl_ck>; 62 assigned-clock-rates = <80000000>; 63 }; 64 65 dpll_gmac_h14x2_ctrl_mux_ck: dpll_gmac_h14x2_ctrl_mux_ck@3fc { 66 #clock-cells = <0>; 67 compatible = "ti,mux-clock"; 68 clocks = <&dpll_gmac_ck>, <&dpll_gmac_h14x2_ctrl_ck>; 69 reg = <0x3fc>; 70 ti,bit-shift = <29>; 71 ti,latch-bit=<26>; 72 assigned-clocks = <&dpll_gmac_h14x2_ctrl_mux_ck>; 73 assigned-clock-parents = <&dpll_gmac_h14x2_ctrl_ck>; 74 }; 75 76 mcan_clk: mcan_clk@3fc { 77 #clock-cells = <0>; 78 compatible = "ti,gate-clock"; 79 clocks = <&dpll_gmac_h14x2_ctrl_mux_ck>; 80 ti,bit-shift = <27>; 81 reg = <0x3fc>; 82 }; 83}; 84