1/* 2 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8/dts-v1/; 9 10#include "dra76x.dtsi" 11#include "dra7-evm-common.dtsi" 12#include "dra76x-mmc-iodelay.dtsi" 13#include <dt-bindings/net/ti-dp83867.h> 14 15/ { 16 model = "TI DRA762 EVM"; 17 compatible = "ti,dra76-evm", "ti,dra762", "ti,dra7"; 18 19 memory@0 { 20 device_type = "memory"; 21 reg = <0x0 0x80000000 0x0 0x80000000>; 22 }; 23 24 vsys_12v0: fixedregulator-vsys12v0 { 25 /* main supply */ 26 compatible = "regulator-fixed"; 27 regulator-name = "vsys_12v0"; 28 regulator-min-microvolt = <12000000>; 29 regulator-max-microvolt = <12000000>; 30 regulator-always-on; 31 regulator-boot-on; 32 }; 33 34 vsys_5v0: fixedregulator-vsys5v0 { 35 /* Output of Cntlr B of TPS43351-Q1 on dra76-evm */ 36 compatible = "regulator-fixed"; 37 regulator-name = "vsys_5v0"; 38 regulator-min-microvolt = <5000000>; 39 regulator-max-microvolt = <5000000>; 40 vin-supply = <&vsys_12v0>; 41 regulator-always-on; 42 regulator-boot-on; 43 }; 44 45 vio_3v6: fixedregulator-vio_3v6 { 46 compatible = "regulator-fixed"; 47 regulator-name = "vio_3v6"; 48 regulator-min-microvolt = <3600000>; 49 regulator-max-microvolt = <3600000>; 50 vin-supply = <&vsys_5v0>; 51 regulator-always-on; 52 regulator-boot-on; 53 }; 54 55 vsys_3v3: fixedregulator-vsys3v3 { 56 /* Output of Cntlr A of TPS43351-Q1 on dra76-evm */ 57 compatible = "regulator-fixed"; 58 regulator-name = "vsys_3v3"; 59 regulator-min-microvolt = <3300000>; 60 regulator-max-microvolt = <3300000>; 61 vin-supply = <&vsys_12v0>; 62 regulator-always-on; 63 regulator-boot-on; 64 }; 65 66 vio_3v3: fixedregulator-vio_3v3 { 67 compatible = "regulator-fixed"; 68 regulator-name = "vio_3v3"; 69 regulator-min-microvolt = <3300000>; 70 regulator-max-microvolt = <3300000>; 71 vin-supply = <&vsys_3v3>; 72 regulator-always-on; 73 regulator-boot-on; 74 }; 75 76 vio_3v3_sd: fixedregulator-sd { 77 compatible = "regulator-fixed"; 78 regulator-name = "vio_3v3_sd"; 79 regulator-min-microvolt = <3300000>; 80 regulator-max-microvolt = <3300000>; 81 vin-supply = <&vio_3v3>; 82 enable-active-high; 83 gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>; 84 }; 85 86 vio_1v8: fixedregulator-vio_1v8 { 87 compatible = "regulator-fixed"; 88 regulator-name = "vio_1v8"; 89 regulator-min-microvolt = <1800000>; 90 regulator-max-microvolt = <1800000>; 91 vin-supply = <&smps5_reg>; 92 }; 93 94 vmmcwl_fixed: fixedregulator-mmcwl { 95 compatible = "regulator-fixed"; 96 regulator-name = "vmmcwl_fixed"; 97 regulator-min-microvolt = <1800000>; 98 regulator-max-microvolt = <1800000>; 99 gpio = <&gpio5 8 0>; /* gpio5_8 */ 100 startup-delay-us = <70000>; 101 enable-active-high; 102 }; 103 104 vtt_fixed: fixedregulator-vtt { 105 compatible = "regulator-fixed"; 106 regulator-name = "vtt_fixed"; 107 regulator-min-microvolt = <1350000>; 108 regulator-max-microvolt = <1350000>; 109 vin-supply = <&vsys_3v3>; 110 regulator-always-on; 111 regulator-boot-on; 112 }; 113 114 aic_dvdd: fixedregulator-aic_dvdd { 115 /* TPS77018DBVT */ 116 compatible = "regulator-fixed"; 117 regulator-name = "aic_dvdd"; 118 vin-supply = <&vio_3v3>; 119 regulator-min-microvolt = <1800000>; 120 regulator-max-microvolt = <1800000>; 121 }; 122}; 123 124&i2c1 { 125 status = "okay"; 126 clock-frequency = <400000>; 127 128 tps65917: tps65917@58 { 129 compatible = "ti,tps65917"; 130 reg = <0x58>; 131 ti,system-power-controller; 132 ti,palmas-override-powerhold; 133 interrupt-controller; 134 #interrupt-cells = <2>; 135 136 tps65917_pmic { 137 compatible = "ti,tps65917-pmic"; 138 139 smps12-in-supply = <&vsys_3v3>; 140 smps3-in-supply = <&vsys_3v3>; 141 smps4-in-supply = <&vsys_3v3>; 142 smps5-in-supply = <&vsys_3v3>; 143 ldo1-in-supply = <&vsys_3v3>; 144 ldo2-in-supply = <&vsys_3v3>; 145 ldo3-in-supply = <&vsys_5v0>; 146 ldo4-in-supply = <&vsys_5v0>; 147 ldo5-in-supply = <&vsys_3v3>; 148 149 tps65917_regulators: regulators { 150 smps12_reg: smps12 { 151 /* VDD_DSPEVE */ 152 regulator-name = "smps12"; 153 regulator-min-microvolt = <850000>; 154 regulator-max-microvolt = <1250000>; 155 regulator-always-on; 156 regulator-boot-on; 157 }; 158 159 smps3_reg: smps3 { 160 /* VDD_CORE */ 161 regulator-name = "smps3"; 162 regulator-min-microvolt = <850000>; 163 regulator-max-microvolt = <1250000>; 164 regulator-boot-on; 165 regulator-always-on; 166 }; 167 168 smps4_reg: smps4 { 169 /* VDD_IVA */ 170 regulator-name = "smps4"; 171 regulator-min-microvolt = <850000>; 172 regulator-max-microvolt = <1250000>; 173 regulator-always-on; 174 regulator-boot-on; 175 }; 176 177 smps5_reg: smps5 { 178 /* VDDS1V8 */ 179 regulator-name = "smps5"; 180 regulator-min-microvolt = <1800000>; 181 regulator-max-microvolt = <1800000>; 182 regulator-boot-on; 183 regulator-always-on; 184 }; 185 186 ldo1_reg: ldo1 { 187 /* LDO1_OUT --> VDA_PHY1_1V8 */ 188 regulator-name = "ldo1"; 189 regulator-min-microvolt = <1800000>; 190 regulator-max-microvolt = <1800000>; 191 regulator-always-on; 192 regulator-boot-on; 193 regulator-allow-bypass; 194 }; 195 196 ldo2_reg: ldo2 { 197 /* LDO2_OUT --> VDA_PHY2_1V8 */ 198 regulator-name = "ldo2"; 199 regulator-min-microvolt = <1800000>; 200 regulator-max-microvolt = <1800000>; 201 regulator-allow-bypass; 202 regulator-always-on; 203 }; 204 205 ldo3_reg: ldo3 { 206 /* VDA_USB_3V3 */ 207 regulator-name = "ldo3"; 208 regulator-min-microvolt = <3300000>; 209 regulator-max-microvolt = <3300000>; 210 regulator-boot-on; 211 regulator-always-on; 212 }; 213 214 ldo5_reg: ldo5 { 215 /* VDDA_1V8_PLL */ 216 regulator-name = "ldo5"; 217 regulator-min-microvolt = <1800000>; 218 regulator-max-microvolt = <1800000>; 219 regulator-always-on; 220 regulator-boot-on; 221 }; 222 223 ldo4_reg: ldo4 { 224 /* VDD_SDIO_DV */ 225 regulator-name = "ldo4"; 226 regulator-min-microvolt = <1800000>; 227 regulator-max-microvolt = <3300000>; 228 regulator-boot-on; 229 regulator-always-on; 230 }; 231 }; 232 }; 233 234 tps65917_power_button { 235 compatible = "ti,palmas-pwrbutton"; 236 interrupt-parent = <&tps65917>; 237 interrupts = <1 IRQ_TYPE_NONE>; 238 wakeup-source; 239 ti,palmas-long-press-seconds = <6>; 240 }; 241 }; 242 243 lp87565: lp87565@60 { 244 compatible = "ti,lp87565-q1"; 245 reg = <0x60>; 246 247 buck10-in-supply =<&vsys_3v3>; 248 buck23-in-supply =<&vsys_3v3>; 249 250 regulators: regulators { 251 buck10_reg: buck10 { 252 /*VDD_MPU*/ 253 regulator-name = "buck10"; 254 regulator-min-microvolt = <850000>; 255 regulator-max-microvolt = <1250000>; 256 regulator-always-on; 257 regulator-boot-on; 258 }; 259 260 buck23_reg: buck23 { 261 /* VDD_GPU*/ 262 regulator-name = "buck23"; 263 regulator-min-microvolt = <850000>; 264 regulator-max-microvolt = <1250000>; 265 regulator-boot-on; 266 regulator-always-on; 267 }; 268 }; 269 }; 270 271 pcf_lcd: pcf8757@20 { 272 compatible = "ti,pcf8575", "nxp,pcf8575"; 273 reg = <0x20>; 274 gpio-controller; 275 #gpio-cells = <2>; 276 interrupt-controller; 277 #interrupt-cells = <2>; 278 interrupt-parent = <&gpio1>; 279 interrupts = <3 IRQ_TYPE_EDGE_FALLING>; 280 }; 281 282 pcf_gpio_21: pcf8757@21 { 283 compatible = "ti,pcf8575", "nxp,pcf8575"; 284 reg = <0x21>; 285 gpio-controller; 286 #gpio-cells = <2>; 287 interrupt-parent = <&gpio1>; 288 interrupts = <3 IRQ_TYPE_EDGE_FALLING>; 289 interrupt-controller; 290 #interrupt-cells = <2>; 291 }; 292 293 pcf_hdmi: pcf8575@26 { 294 compatible = "ti,pcf8575", "nxp,pcf8575"; 295 reg = <0x26>; 296 gpio-controller; 297 #gpio-cells = <2>; 298 p1 { 299 /* vin6_sel_s0: high: VIN6, low: audio */ 300 gpio-hog; 301 gpios = <1 GPIO_ACTIVE_HIGH>; 302 output-low; 303 line-name = "vin6_sel_s0"; 304 }; 305 }; 306 307 tlv320aic3106: tlv320aic3106@19 { 308 #sound-dai-cells = <0>; 309 compatible = "ti,tlv320aic3106"; 310 reg = <0x19>; 311 adc-settle-ms = <40>; 312 ai3x-micbias-vg = <1>; /* 2.0V */ 313 status = "okay"; 314 315 /* Regulators */ 316 AVDD-supply = <&vio_3v3>; 317 IOVDD-supply = <&vio_3v3>; 318 DRVDD-supply = <&vio_3v3>; 319 DVDD-supply = <&aic_dvdd>; 320 }; 321}; 322 323&cpu0 { 324 vdd-supply = <&buck10_reg>; 325}; 326 327&mmc1 { 328 status = "okay"; 329 vmmc-supply = <&vio_3v3_sd>; 330 vqmmc-supply = <&ldo4_reg>; 331 bus-width = <4>; 332 /* 333 * SDCD signal is not being used here - using the fact that GPIO mode 334 * is always hardwired. 335 */ 336 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; 337 pinctrl-names = "default", "hs"; 338 pinctrl-0 = <&mmc1_pins_default>; 339 pinctrl-1 = <&mmc1_pins_hs>; 340}; 341 342&mmc2 { 343 status = "okay"; 344 vmmc-supply = <&vio_1v8>; 345 vqmmc-supply = <&vio_1v8>; 346 bus-width = <8>; 347 non-removable; 348 pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v"; 349 pinctrl-0 = <&mmc2_pins_default>; 350 pinctrl-1 = <&mmc2_pins_default>; 351 pinctrl-2 = <&mmc2_pins_default>; 352 pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_conf>; 353}; 354 355&mmc4 { 356 status = "okay"; 357 vmmc-supply = <&vio_3v6>; 358 vqmmc-supply = <&vmmcwl_fixed>; 359 pinctrl-names = "default", "hs", "sdr12", "sdr25"; 360 pinctrl-0 = <&mmc4_pins_hs &mmc4_iodelay_default_conf>; 361 pinctrl-1 = <&mmc4_pins_hs &mmc4_iodelay_manual1_conf>; 362 pinctrl-2 = <&mmc4_pins_hs &mmc4_iodelay_manual1_conf>; 363 pinctrl-3 = <&mmc4_pins_hs &mmc4_iodelay_manual1_conf>; 364}; 365 366/* No RTC on this device */ 367&rtc { 368 status = "disabled"; 369}; 370 371&mac { 372 status = "okay"; 373 374 dual_emac; 375}; 376 377&cpsw_emac0 { 378 phy_id = <&davinci_mdio>, <2>; 379 phy-mode = "rgmii-id"; 380 dual_emac_res_vlan = <1>; 381}; 382 383&cpsw_emac1 { 384 phy_id = <&davinci_mdio>, <3>; 385 phy-mode = "rgmii-id"; 386 dual_emac_res_vlan = <2>; 387}; 388 389&davinci_mdio { 390 dp83867_0: ethernet-phy@2 { 391 reg = <2>; 392 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; 393 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; 394 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; 395 ti,min-output-impedance; 396 ti,dp83867-rxctrl-strap-quirk; 397 }; 398 399 dp83867_1: ethernet-phy@3 { 400 reg = <3>; 401 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; 402 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; 403 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; 404 ti,min-output-impedance; 405 ti,dp83867-rxctrl-strap-quirk; 406 }; 407}; 408 409&usb2_phy1 { 410 phy-supply = <&ldo3_reg>; 411}; 412 413&usb2_phy2 { 414 phy-supply = <&ldo3_reg>; 415}; 416 417&qspi { 418 spi-max-frequency = <96000000>; 419 m25p80@0 { 420 spi-max-frequency = <96000000>; 421 }; 422}; 423 424&pcie2_phy { 425 status = "okay"; 426}; 427 428&pcie1_rc { 429 num-lanes = <2>; 430 phys = <&pcie1_phy>, <&pcie2_phy>; 431 phy-names = "pcie-phy0", "pcie-phy1"; 432}; 433 434&pcie1_ep { 435 num-lanes = <2>; 436 phys = <&pcie1_phy>, <&pcie2_phy>; 437 phy-names = "pcie-phy0", "pcie-phy1"; 438}; 439 440&extcon_usb1 { 441 vbus-gpio = <&pcf_lcd 14 GPIO_ACTIVE_HIGH>; 442}; 443 444&extcon_usb2 { 445 vbus-gpio = <&pcf_lcd 15 GPIO_ACTIVE_HIGH>; 446}; 447 448&m_can0 { 449 can-transceiver { 450 max-bitrate = <5000000>; 451 }; 452}; 453