1/* 2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9/dts-v1/; 10 11#include "am4372.dtsi" 12#include <dt-bindings/pinctrl/am43xx.h> 13#include <dt-bindings/pwm/pwm.h> 14#include <dt-bindings/gpio/gpio.h> 15#include <dt-bindings/input/input.h> 16 17/ { 18 model = "TI AM437x Industrial Development Kit"; 19 compatible = "ti,am437x-idk-evm","ti,am4372","ti,am43"; 20 21 chosen { 22 stdout-path = &uart0; 23 }; 24 25 v24_0d: fixed-regulator-v24_0d { 26 compatible = "regulator-fixed"; 27 regulator-name = "V24_0D"; 28 regulator-min-microvolt = <24000000>; 29 regulator-max-microvolt = <24000000>; 30 regulator-always-on; 31 regulator-boot-on; 32 }; 33 34 v3_3d: fixed-regulator-v3_3d { 35 compatible = "regulator-fixed"; 36 regulator-name = "V3_3D"; 37 regulator-min-microvolt = <3300000>; 38 regulator-max-microvolt = <3300000>; 39 regulator-always-on; 40 regulator-boot-on; 41 vin-supply = <&v24_0d>; 42 }; 43 44 vdd_corereg: fixed-regulator-vdd_corereg { 45 compatible = "regulator-fixed"; 46 regulator-name = "VDD_COREREG"; 47 regulator-min-microvolt = <1100000>; 48 regulator-max-microvolt = <1100000>; 49 regulator-always-on; 50 regulator-boot-on; 51 vin-supply = <&v24_0d>; 52 }; 53 54 vdd_core: fixed-regulator-vdd_core { 55 compatible = "regulator-fixed"; 56 regulator-name = "VDD_CORE"; 57 regulator-min-microvolt = <1100000>; 58 regulator-max-microvolt = <1100000>; 59 regulator-always-on; 60 regulator-boot-on; 61 vin-supply = <&vdd_corereg>; 62 }; 63 64 v1_8dreg: fixed-regulator-v1_8dreg{ 65 compatible = "regulator-fixed"; 66 regulator-name = "V1_8DREG"; 67 regulator-min-microvolt = <1800000>; 68 regulator-max-microvolt = <1800000>; 69 regulator-always-on; 70 regulator-boot-on; 71 vin-supply = <&v24_0d>; 72 }; 73 74 v1_8d: fixed-regulator-v1_8d{ 75 compatible = "regulator-fixed"; 76 regulator-name = "V1_8D"; 77 regulator-min-microvolt = <1800000>; 78 regulator-max-microvolt = <1800000>; 79 regulator-always-on; 80 regulator-boot-on; 81 vin-supply = <&v1_8dreg>; 82 }; 83 84 v1_5dreg: fixed-regulator-v1_5dreg{ 85 compatible = "regulator-fixed"; 86 regulator-name = "V1_5DREG"; 87 regulator-min-microvolt = <1500000>; 88 regulator-max-microvolt = <1500000>; 89 regulator-always-on; 90 regulator-boot-on; 91 vin-supply = <&v24_0d>; 92 }; 93 94 v1_5d: fixed-regulator-v1_5d{ 95 compatible = "regulator-fixed"; 96 regulator-name = "V1_5D"; 97 regulator-min-microvolt = <1500000>; 98 regulator-max-microvolt = <1500000>; 99 regulator-always-on; 100 regulator-boot-on; 101 vin-supply = <&v1_5dreg>; 102 }; 103 104 gpio_keys: gpio_keys { 105 compatible = "gpio-keys"; 106 pinctrl-names = "default"; 107 pinctrl-0 = <&gpio_keys_pins_default>; 108 #address-cells = <1>; 109 #size-cells = <0>; 110 111 switch0 { 112 label = "power-button"; 113 linux,code = <KEY_POWER>; 114 gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; 115 }; 116 }; 117 118 /* fixed 32k external oscillator clock */ 119 clk_32k_rtc: clk_32k_rtc { 120 #clock-cells = <0>; 121 compatible = "fixed-clock"; 122 clock-frequency = <32768>; 123 }; 124 125 leds-iio { 126 status = "disabled"; 127 compatible = "gpio-leds"; 128 led-out0 { 129 label = "out0"; 130 gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>; 131 default-state = "off"; 132 }; 133 134 led-out1 { 135 label = "out1"; 136 gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>; 137 default-state = "off"; 138 }; 139 140 led-out2 { 141 label = "out2"; 142 gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>; 143 default-state = "off"; 144 }; 145 146 led-out3 { 147 label = "out3"; 148 gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>; 149 default-state = "off"; 150 }; 151 152 led-out4 { 153 label = "out4"; 154 gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>; 155 default-state = "off"; 156 }; 157 158 led-out5 { 159 label = "out5"; 160 gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>; 161 default-state = "off"; 162 }; 163 164 led-out6 { 165 label = "out6"; 166 gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>; 167 default-state = "off"; 168 }; 169 170 led-out7 { 171 label = "out7"; 172 gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>; 173 default-state = "off"; 174 }; 175 }; 176}; 177 178&am43xx_pinmux { 179 gpio_keys_pins_default: gpio_keys_pins_default { 180 pinctrl-single,pins = < 181 AM4372_IOPAD(0x9b8, PIN_INPUT | MUX_MODE7) /* cam0_field.gpio4_2 */ 182 >; 183 }; 184 185 i2c0_pins_default: i2c0_pins_default { 186 pinctrl-single,pins = < 187 AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 188 AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 189 >; 190 }; 191 192 i2c0_pins_sleep: i2c0_pins_sleep { 193 pinctrl-single,pins = < 194 AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7) 195 AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE7) 196 >; 197 }; 198 199 i2c2_pins_default: i2c2_pins_default { 200 pinctrl-single,pins = < 201 AM4372_IOPAD(0x9e8, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */ 202 AM4372_IOPAD(0x9ec, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */ 203 >; 204 }; 205 206 i2c2_pins_sleep: i2c2_pins_sleep { 207 pinctrl-single,pins = < 208 AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN | MUX_MODE7) 209 AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN | MUX_MODE7) 210 >; 211 }; 212 213 mmc1_pins_default: pinmux_mmc1_pins_default { 214 pinctrl-single,pins = < 215 AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ 216 AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ 217 AM4372_IOPAD(0x9f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ 218 AM4372_IOPAD(0x9f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ 219 AM4372_IOPAD(0x9f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ 220 AM4372_IOPAD(0x9fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ 221 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ 222 >; 223 }; 224 225 mmc1_pins_sleep: pinmux_mmc1_pins_sleep { 226 pinctrl-single,pins = < 227 AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN | MUX_MODE7) 228 AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN | MUX_MODE7) 229 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7) 230 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7) 231 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7) 232 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7) 233 AM4372_IOPAD(0x960, PIN_INPUT_PULLDOWN | MUX_MODE7) 234 >; 235 }; 236 237 spi1_pins_default: spi1_pins_default { 238 pinctrl-single,pins = < 239 AM4372_IOPAD(0x908, PIN_INPUT | MUX_MODE2) /* mii1_col.spi1_sclk */ 240 AM4372_IOPAD(0x910, PIN_INPUT | MUX_MODE2) /* mii1_rx_er.spi1_d1 */ 241 AM4372_IOPAD(0x944, PIN_OUTPUT | MUX_MODE2) /* rmii1_ref_clk.spi1_cs0 */ 242 AM4372_IOPAD(0x90c, PIN_OUTPUT | MUX_MODE7) /* mii1_crs.gpio3_1 */ 243 >; 244 }; 245 246 spi1_pins_sleep: spi1_pins_sleep { 247 pinctrl-single,pins = < 248 AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7) 249 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7) 250 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) 251 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7) 252 >; 253 }; 254 255 ecap0_pins_default: backlight_pins_default { 256 pinctrl-single,pins = < 257 AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */ 258 >; 259 }; 260 261 cpsw_default: cpsw_default { 262 pinctrl-single,pins = < 263 AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ 264 AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ 265 AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ 266 AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ 267 AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ 268 AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ 269 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ 270 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ 271 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ 272 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ 273 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ 274 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ 275 >; 276 }; 277 278 cpsw_sleep: cpsw_sleep { 279 pinctrl-single,pins = < 280 AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7) 281 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) 282 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) 283 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) 284 AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7) 285 AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7) 286 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7) 287 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) 288 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) 289 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) 290 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7) 291 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7) 292 >; 293 }; 294 295 davinci_mdio_default: davinci_mdio_default { 296 pinctrl-single,pins = < 297 /* MDIO */ 298 AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 299 AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ 300 >; 301 }; 302 303 davinci_mdio_sleep: davinci_mdio_sleep { 304 pinctrl-single,pins = < 305 /* MDIO reset value */ 306 AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) 307 AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) 308 >; 309 }; 310 311 qspi_pins_default: qspi_pins_default { 312 pinctrl-single,pins = < 313 AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */ 314 AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */ 315 AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */ 316 AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */ 317 AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */ 318 AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */ 319 >; 320 }; 321 322 qspi_pins_sleep: qspi_pins_sleep{ 323 pinctrl-single,pins = < 324 AM4372_IOPAD(0x87c, PIN_INPUT_PULLDOWN | MUX_MODE7) 325 AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7) 326 AM4372_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7) 327 AM4372_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7) 328 AM4372_IOPAD(0x898, PIN_INPUT_PULLDOWN | MUX_MODE7) 329 AM4372_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7) 330 >; 331 }; 332}; 333 334&i2c0 { 335 status = "okay"; 336 pinctrl-names = "default", "sleep"; 337 pinctrl-0 = <&i2c0_pins_default>; 338 pinctrl-1 = <&i2c0_pins_sleep>; 339 clock-frequency = <400000>; 340 341 at24@50 { 342 compatible = "atmel,24c256"; 343 pagesize = <64>; 344 reg = <0x50>; 345 }; 346 347 tps: tps62362@60 { 348 compatible = "ti,tps62362"; 349 reg = <0x60>; 350 regulator-name = "VDD_MPU"; 351 regulator-min-microvolt = <950000>; 352 regulator-max-microvolt = <1330000>; 353 regulator-boot-on; 354 regulator-always-on; 355 ti,vsel0-state-high; 356 ti,vsel1-state-high; 357 vin-supply = <&v3_3d>; 358 }; 359}; 360 361&i2c2 { 362 status = "okay"; 363 pinctrl-names = "default", "sleep"; 364 pinctrl-0 = <&i2c2_pins_default>; 365 pinctrl-1 = <&i2c2_pins_sleep>; 366 clock-frequency = <100000>; 367 368 tpic2810: tpic2810@60 { 369 compatible = "ti,tpic2810"; 370 reg = <0x60>; 371 gpio-controller; 372 #gpio-cells = <2>; 373 }; 374}; 375 376&spi1 { 377 status = "okay"; 378 pinctrl-names = "default", "sleep"; 379 pinctrl-0 = <&spi1_pins_default>; 380 pinctrl-1 = <&spi1_pins_sleep>; 381 ti,pindir-d0-out-d1-in; 382 383 sn65hvs882: sn65hvs882@0 { 384 compatible = "pisosr-gpio"; 385 gpio-controller; 386 #gpio-cells = <2>; 387 388 load-gpios = <&gpio3 1 GPIO_ACTIVE_LOW>; 389 390 reg = <0>; 391 spi-max-frequency = <1000000>; 392 spi-cpol; 393 }; 394}; 395 396&epwmss0 { 397 status = "okay"; 398}; 399 400&ecap0 { 401 status = "okay"; 402 pinctrl-names = "default"; 403 pinctrl-0 = <&ecap0_pins_default>; 404}; 405 406&gpio0 { 407 status = "okay"; 408}; 409 410&gpio1 { 411 status = "okay"; 412}; 413 414&gpio3 { 415 status = "okay"; 416}; 417 418&gpio4 { 419 status = "okay"; 420}; 421 422&gpio5 { 423 status = "okay"; 424}; 425 426&mmc1 { 427 status = "okay"; 428 pinctrl-names = "default", "sleep"; 429 pinctrl-0 = <&mmc1_pins_default>; 430 pinctrl-1 = <&mmc1_pins_sleep>; 431 vmmc-supply = <&v3_3d>; 432 bus-width = <4>; 433 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 434}; 435 436&qspi { 437 status = "okay"; 438 pinctrl-names = "default", "sleep"; 439 pinctrl-0 = <&qspi_pins_default>; 440 pinctrl-1 = <&qspi_pins_sleep>; 441 442 spi-max-frequency = <48000000>; 443 m25p80@0 { 444 compatible = "mx66l51235l"; 445 spi-max-frequency = <48000000>; 446 reg = <0>; 447 spi-cpol; 448 spi-cpha; 449 spi-tx-bus-width = <1>; 450 spi-rx-bus-width = <4>; 451 #address-cells = <1>; 452 #size-cells = <1>; 453 454 /* 455 * MTD partition table. The ROM checks the first 512KiB for a 456 * valid file to boot(XIP). 457 */ 458 partition@0 { 459 label = "QSPI.U_BOOT"; 460 reg = <0x00000000 0x000080000>; 461 }; 462 partition@1 { 463 label = "QSPI.U_BOOT.backup"; 464 reg = <0x00080000 0x00080000>; 465 }; 466 partition@2 { 467 label = "QSPI.U-BOOT-SPL_OS"; 468 reg = <0x00100000 0x00010000>; 469 }; 470 partition@3 { 471 label = "QSPI.U_BOOT_ENV"; 472 reg = <0x00110000 0x00010000>; 473 }; 474 partition@4 { 475 label = "QSPI.U-BOOT-ENV.backup"; 476 reg = <0x00120000 0x00010000>; 477 }; 478 partition@5 { 479 label = "QSPI.KERNEL"; 480 reg = <0x00130000 0x0800000>; 481 }; 482 partition@6 { 483 label = "QSPI.FILESYSTEM"; 484 reg = <0x00930000 0x36D0000>; 485 }; 486 }; 487}; 488 489&mac { 490 slaves = <1>; 491 pinctrl-names = "default", "sleep"; 492 pinctrl-0 = <&cpsw_default>; 493 pinctrl-1 = <&cpsw_sleep>; 494 status = "okay"; 495}; 496 497&davinci_mdio { 498 pinctrl-names = "default", "sleep"; 499 pinctrl-0 = <&davinci_mdio_default>; 500 pinctrl-1 = <&davinci_mdio_sleep>; 501 status = "okay"; 502}; 503 504&cpsw_emac0 { 505 phy_id = <&davinci_mdio>, <0>; 506 phy-mode = "rgmii"; 507}; 508 509&rtc { 510 clocks = <&clk_32k_rtc>, <&clk_32768_ck>; 511 clock-names = "ext-clk", "int-clk"; 512 status = "okay"; 513}; 514 515&wdt { 516 status = "okay"; 517}; 518 519&cpu { 520 cpu0-supply = <&tps>; 521}; 522 523&cpu0_opp_table { 524 /* 525 * Supply voltage supervisor on board will not allow opp50 so 526 * disable it and set opp100 as suspend OPP. 527 */ 528 opp50@300000000 { 529 status = "disabled"; 530 }; 531 532 opp100@600000000 { 533 opp-suspend; 534 }; 535}; 536
