1NVIDIA Tegra xHCI controller
2============================
3
4The Tegra xHCI controller supports both USB2 and USB3 interfaces exposed by
5the Tegra XUSB pad controller.
6
7Required properties:
8--------------------
9- compatible: Must be:
10  - Tegra124: "nvidia,tegra124-xusb"
11  - Tegra132: "nvidia,tegra132-xusb", "nvidia,tegra124-xusb"
12  - Tegra210: "nvidia,tegra210-xusb"
13- reg: Must contain the base and length of the xHCI host registers, XUSB FPCI
14  registers and XUSB IPFS registers.
15- reg-names: Must contain the following entries:
16  - "hcd"
17  - "fpci"
18  - "ipfs"
19- interrupts: Must contain the xHCI host interrupt and the mailbox interrupt.
20- clocks: Must contain an entry for each entry in clock-names.
21  See ../clock/clock-bindings.txt for details.
22- clock-names: Must include the following entries:
23   - xusb_host
24   - xusb_host_src
25   - xusb_falcon_src
26   - xusb_ss
27   - xusb_ss_src
28   - xusb_ss_div2
29   - xusb_hs_src
30   - xusb_fs_src
31   - pll_u_480m
32   - clk_m
33   - pll_e
34- resets: Must contain an entry for each entry in reset-names.
35  See ../reset/reset.txt for details.
36- reset-names: Must include the following entries:
37  - xusb_host
38  - xusb_ss
39  - xusb_src
40  Note that xusb_src is the shared reset for xusb_{ss,hs,fs,falcon,host}_src.
41- nvidia,xusb-padctl: phandle to the XUSB pad controller that is used to
42  configure the USB pads used by the XHCI controller
43
44For Tegra124 and Tegra132:
45- avddio-pex-supply: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
46- dvddio-pex-supply: PCIe/USB3 digital logic power supply. Must supply 1.05 V.
47- avdd-usb-supply: USB controller power supply. Must supply 3.3 V.
48- avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V.
49- avdd-pll-erefe-supply: PLLE reference PLL power supply. Must supply 1.05 V.
50- avdd-usb-ss-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V.
51- hvdd-usb-ss-supply: High-voltage PCIe/USB3 power supply. Must supply 3.3 V.
52- hvdd-usb-ss-pll-e-supply: High-voltage PLLE power supply. Must supply 3.3 V.
53
54For Tegra210:
55- dvddio-pex-supply: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
56- hvddio-pex-supply: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.
57- avdd-usb-supply: USB controller power supply. Must supply 3.3 V.
58- avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V.
59- avdd-pll-uerefe-supply: PLLE reference PLL power supply. Must supply 1.05 V.
60- dvdd-pex-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V.
61- hvdd-pex-pll-e-supply: High-voltage PLLE power supply. Must supply 1.8 V.
62
63Optional properties:
64--------------------
65- phys: Must contain an entry for each entry in phy-names.
66  See ../phy/phy-bindings.txt for details.
67- phy-names: Should include an entry for each PHY used by the controller. The
68  following PHYs are available:
69  - Tegra124: usb2-0, usb2-1, usb2-2, hsic-0, hsic-1, usb3-0, usb3-1
70  - Tegra132: usb2-0, usb2-1, usb2-2, hsic-0, hsic-1, usb3-0, usb3-1
71  - Tegra210: usb2-0, usb2-1, usb2-2, usb2-3, hsic-0, usb3-0, usb3-1, usb3-2,
72              usb3-3
73
74Example:
75--------
76
77	usb@0,70090000 {
78		compatible = "nvidia,tegra124-xusb";
79		reg = <0x0 0x70090000 0x0 0x8000>,
80		      <0x0 0x70098000 0x0 0x1000>,
81		      <0x0 0x70099000 0x0 0x1000>;
82		reg-names = "hcd", "fpci", "ipfs";
83
84		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
85			     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
86
87		clocks = <&tegra_car TEGRA124_CLK_XUSB_HOST>,
88			 <&tegra_car TEGRA124_CLK_XUSB_HOST_SRC>,
89			 <&tegra_car TEGRA124_CLK_XUSB_FALCON_SRC>,
90			 <&tegra_car TEGRA124_CLK_XUSB_SS>,
91			 <&tegra_car TEGRA124_CLK_XUSB_SS_DIV2>,
92			 <&tegra_car TEGRA124_CLK_XUSB_SS_SRC>,
93			 <&tegra_car TEGRA124_CLK_XUSB_HS_SRC>,
94			 <&tegra_car TEGRA124_CLK_XUSB_FS_SRC>,
95			 <&tegra_car TEGRA124_CLK_PLL_U_480M>,
96			 <&tegra_car TEGRA124_CLK_CLK_M>,
97			 <&tegra_car TEGRA124_CLK_PLL_E>;
98		clock-names = "xusb_host", "xusb_host_src", "xusb_falcon_src",
99			      "xusb_ss", "xusb_ss_div2", "xusb_ss_src",
100			      "xusb_hs_src", "xusb_fs_src", "pll_u_480m",
101			      "clk_m", "pll_e";
102		resets = <&tegra_car 89>, <&tegra_car 156>, <&tegra_car 143>;
103		reset-names = "xusb_host", "xusb_ss", "xusb_src";
104
105		nvidia,xusb-padctl = <&padctl>;
106
107		phys = <&{/padctl@0,7009f000/pads/usb2/lanes/usb2-1}>, /* mini-PCIe USB */
108		       <&{/padctl@0,7009f000/pads/usb2/lanes/usb2-2}>, /* USB A */
109		       <&{/padctl@0,7009f000/pads/pcie/lanes/pcie-0}>; /* USB A */
110		phy-names = "usb2-1", "usb2-2", "usb3-0";
111
112		avddio-pex-supply = <&vdd_1v05_run>;
113		dvddio-pex-supply = <&vdd_1v05_run>;
114		avdd-usb-supply = <&vdd_3v3_lp0>;
115		avdd-pll-utmip-supply = <&vddio_1v8>;
116		avdd-pll-erefe-supply = <&avdd_1v05_run>;
117		avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
118		hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
119		hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;
120	};
121