1Amlogic Meson GX DWC3 USB SoC controller
2
3Required properties:
4- compatible:	depending on the SoC this should contain one of:
5			* amlogic,meson-axg-dwc3
6			* amlogic,meson-gxl-dwc3
7- clocks:	a handle for the "USB general" clock
8- clock-names:	must be "usb_general"
9- resets:	a handle for the shared "USB OTG" reset line
10- reset-names:	must be "usb_otg"
11
12Required child node:
13A child node must exist to represent the core DWC3 IP block. The name of
14the node is not important. The content of the node is defined in dwc3.txt.
15
16PHY documentation is provided in the following places:
17- Documentation/devicetree/bindings/phy/meson-gxl-usb2-phy.txt
18- Documentation/devicetree/bindings/phy/meson-gxl-usb3-phy.txt
19
20Example device nodes:
21		usb0: usb@ff500000 {
22			compatible = "amlogic,meson-axg-dwc3";
23			#address-cells = <2>;
24			#size-cells = <2>;
25			ranges;
26
27			clocks = <&clkc CLKID_USB>;
28			clock-names = "usb_general";
29			resets = <&reset RESET_USB_OTG>;
30			reset-names = "usb_otg";
31
32			dwc3: dwc3@ff500000 {
33				compatible = "snps,dwc3";
34				reg = <0x0 0xff500000 0x0 0x100000>;
35				interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
36				dr_mode = "host";
37				maximum-speed = "high-speed";
38				snps,dis_u2_susphy_quirk;
39				phys = <&usb3_phy>, <&usb2_phy0>;
40				phy-names = "usb2-phy", "usb3-phy";
41			};
42		};
43