1* Temperature Sensor ADC (TSADC) on rockchip SoCs
2
3Required properties:
4- compatible : should be "rockchip,<name>-tsadc"
5   "rockchip,rv1108-tsadc": found on RV1108 SoCs
6   "rockchip,rk3228-tsadc": found on RK3228 SoCs
7   "rockchip,rk3288-tsadc": found on RK3288 SoCs
8   "rockchip,rk3328-tsadc": found on RK3328 SoCs
9   "rockchip,rk3368-tsadc": found on RK3368 SoCs
10   "rockchip,rk3399-tsadc": found on RK3399 SoCs
11- reg : physical base address of the controller and length of memory mapped
12	region.
13- interrupts : The interrupt number to the cpu. The interrupt specifier format
14	       depends on the interrupt controller.
15- clocks : Must contain an entry for each entry in clock-names.
16- clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for
17		the peripheral clock.
18- resets : Must contain an entry for each entry in reset-names.
19	   See ../reset/reset.txt for details.
20- reset-names : Must include the name "tsadc-apb".
21- pinctrl-names : The pin control state names;
22- pinctrl-0 : The "init" pinctrl state, it will be set before device probe.
23- pinctrl-1 : The "default" pinctrl state, it will be set after reset the
24	      TSADC controller.
25- pinctrl-2 : The "sleep" pinctrl state, it will be in for suspend.
26- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description.
27
28Optional properties:
29- rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value.
30- rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO.
31- rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW
32			       1:HIGH.
33- rockchip,grf : The phandle of the syscon node for the general register file.
34
35Exiample:
36tsadc: tsadc@ff280000 {
37	compatible = "rockchip,rk3288-tsadc";
38	reg = <0xff280000 0x100>;
39	interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
40	clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
41	clock-names = "tsadc", "apb_pclk";
42	resets = <&cru SRST_TSADC>;
43	reset-names = "tsadc-apb";
44	pinctrl-names = "init", "default", "sleep";
45	pinctrl-0 = <&otp_gpio>;
46	pinctrl-1 = <&otp_out>;
47	pinctrl-2 = <&otp_gpio>;
48	#thermal-sensor-cells = <1>;
49	rockchip,hw-tshut-temp = <95000>;
50	rockchip,hw-tshut-mode = <0>;
51	rockchip,hw-tshut-polarity = <0>;
52};
53
54Example: referring to thermal sensors:
55thermal-zones {
56	cpu_thermal: cpu_thermal {
57		polling-delay-passive = <1000>; /* milliseconds */
58		polling-delay = <5000>; /* milliseconds */
59
60		/* sensor	ID */
61		thermal-sensors = <&tsadc	1>;
62
63		trips {
64			cpu_alert0: cpu_alert {
65				temperature = <70000>; /* millicelsius */
66				hysteresis = <2000>; /* millicelsius */
67				type = "passive";
68			};
69			cpu_crit: cpu_crit {
70				temperature = <90000>; /* millicelsius */
71				hysteresis = <2000>; /* millicelsius */
72				type = "critical";
73			};
74		};
75
76		cooling-maps {
77			map0 {
78				trip = <&cpu_alert0>;
79				cooling-device =
80				    <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
81			};
82		};
83	};
84};
85