1Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface.
2
3Required properties:
4- compatible : "snps,dw-apb-ssi" or "mscc,<soc>-spi", where soc is "ocelot" or
5  "jaguar2"
6- reg : The register base for the controller. For "mscc,<soc>-spi", a second
7  register set is required (named ICPU_CFG:SPI_MST)
8- interrupts : One interrupt, used by the controller.
9- #address-cells : <1>, as required by generic SPI binding.
10- #size-cells : <0>, also as required by generic SPI binding.
11
12Optional properties:
13- cs-gpios : Specifies the gpio pis to be used for chipselects.
14- num-cs : The number of chipselects. If omitted, this will default to 4.
15- reg-io-width : The I/O register width (in bytes) implemented by this
16  device.  Supported values are 2 or 4 (the default).
17
18Child nodes as per the generic SPI binding.
19
20Example:
21
22	spi@fff00000 {
23		compatible = "snps,dw-apb-ssi";
24		reg = <0xfff00000 0x1000>;
25		interrupts = <0 154 4>;
26		#address-cells = <1>;
27		#size-cells = <0>;
28		num-cs = <2>;
29		cs-gpios = <&gpio0 13 0>,
30			   <&gpio0 14 0>;
31	};
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33