1* Freescale (Enhanced) Configurable Serial Peripheral Interface
2  (CSPI/eCSPI) for i.MX
3
4Required properties:
5- compatible :
6  - "fsl,imx1-cspi" for SPI compatible with the one integrated on i.MX1
7  - "fsl,imx21-cspi" for SPI compatible with the one integrated on i.MX21
8  - "fsl,imx27-cspi" for SPI compatible with the one integrated on i.MX27
9  - "fsl,imx31-cspi" for SPI compatible with the one integrated on i.MX31
10  - "fsl,imx35-cspi" for SPI compatible with the one integrated on i.MX35
11  - "fsl,imx51-ecspi" for SPI compatible with the one integrated on i.MX51
12  - "fsl,imx53-ecspi" for SPI compatible with the one integrated on i.MX53 and later Soc
13- reg : Offset and length of the register set for the device
14- interrupts : Should contain CSPI/eCSPI interrupt
15- clocks : Clock specifiers for both ipg and per clocks.
16- clock-names : Clock names should include both "ipg" and "per"
17See the clock consumer binding,
18	Documentation/devicetree/bindings/clock/clock-bindings.txt
19
20Recommended properties:
21- cs-gpios : GPIOs to use as chip selects, see spi-bus.txt.  While the native chip
22select lines can be used, they appear to always generate a pulse between each
23word of a transfer.  Most use cases will require GPIO based chip selects to
24generate a valid transaction.
25
26Optional properties:
27- num-cs :  Number of total chip selects, see spi-bus.txt.
28- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
29Documentation/devicetree/bindings/dma/dma.txt.
30- dma-names: DMA request names, if present, should include "tx" and "rx".
31- fsl,spi-rdy-drctl: Integer, representing the value of DRCTL, the register
32controlling the SPI_READY handling. Note that to enable the DRCTL consideration,
33the SPI_READY mode-flag needs to be set too.
34Valid values are: 0 (disabled), 1 (edge-triggered burst) and 2 (level-triggered burst).
35
36Obsolete properties:
37- fsl,spi-num-chipselects : Contains the number of the chipselect
38
39Example:
40
41ecspi@70010000 {
42	#address-cells = <1>;
43	#size-cells = <0>;
44	compatible = "fsl,imx51-ecspi";
45	reg = <0x70010000 0x4000>;
46	interrupts = <36>;
47	cs-gpios = <&gpio3 24 0>, /* GPIO3_24 */
48		   <&gpio3 25 0>; /* GPIO3_25 */
49	dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
50	dma-names = "rx", "tx";
51	fsl,spi-rdy-drctl = <1>;
52};
53