1Qualcomm PMIC GPIO block 2 3This binding describes the GPIO block(s) found in the 8xxx series of 4PMIC's from Qualcomm. 5 6- compatible: 7 Usage: required 8 Value type: <string> 9 Definition: must be one of: 10 "qcom,pm8005-gpio" 11 "qcom,pm8018-gpio" 12 "qcom,pm8038-gpio" 13 "qcom,pm8058-gpio" 14 "qcom,pm8916-gpio" 15 "qcom,pm8917-gpio" 16 "qcom,pm8921-gpio" 17 "qcom,pm8941-gpio" 18 "qcom,pm8994-gpio" 19 "qcom,pm8998-gpio" 20 "qcom,pma8084-gpio" 21 "qcom,pmi8994-gpio" 22 23 And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio" 24 if the device is on an spmi bus or an ssbi bus respectively 25 26- reg: 27 Usage: required 28 Value type: <prop-encoded-array> 29 Definition: Register base of the GPIO block and length. 30 31- interrupts: 32 Usage: required 33 Value type: <prop-encoded-array> 34 Definition: Must contain an array of encoded interrupt specifiers for 35 each available GPIO 36 37- gpio-controller: 38 Usage: required 39 Value type: <none> 40 Definition: Mark the device node as a GPIO controller 41 42- #gpio-cells: 43 Usage: required 44 Value type: <u32> 45 Definition: Must be 2; 46 the first cell will be used to define gpio number and the 47 second denotes the flags for this gpio 48 49Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for 50a general description of GPIO and interrupt bindings. 51 52Please refer to pinctrl-bindings.txt in this directory for details of the 53common pinctrl bindings used by client devices, including the meaning of the 54phrase "pin configuration node". 55 56The pin configuration nodes act as a container for an arbitrary number of 57subnodes. Each of these subnodes represents some desired configuration for a 58pin or a list of pins. This configuration can include the 59mux function to select on those pin(s), and various pin configuration 60parameters, as listed below. 61 62 63SUBNODES: 64 65The name of each subnode is not important; all subnodes should be enumerated 66and processed purely based on their content. 67 68Each subnode only affects those parameters that are explicitly listed. In 69other words, a subnode that lists a mux function but no pin configuration 70parameters implies no information about any pin configuration parameters. 71Similarly, a pin subnode that describes a pullup parameter implies no 72information about e.g. the mux function. 73 74The following generic properties as defined in pinctrl-bindings.txt are valid 75to specify in a pin configuration subnode: 76 77- pins: 78 Usage: required 79 Value type: <string-array> 80 Definition: List of gpio pins affected by the properties specified in 81 this subnode. Valid pins are: 82 gpio1-gpio4 for pm8005 83 gpio1-gpio6 for pm8018 84 gpio1-gpio12 for pm8038 85 gpio1-gpio40 for pm8058 86 gpio1-gpio4 for pm8916 87 gpio1-gpio38 for pm8917 88 gpio1-gpio44 for pm8921 89 gpio1-gpio36 for pm8941 90 gpio1-gpio22 for pm8994 91 gpio1-gpio26 for pm8998 92 gpio1-gpio22 for pma8084 93 gpio1-gpio10 for pmi8994 94 95- function: 96 Usage: required 97 Value type: <string> 98 Definition: Specify the alternative function to be configured for the 99 specified pins. Valid values are: 100 "normal", 101 "paired", 102 "func1", 103 "func2", 104 "dtest1", 105 "dtest2", 106 "dtest3", 107 "dtest4", 108 And following values are supported by LV/MV GPIO subtypes: 109 "func3", 110 "func4" 111 112- bias-disable: 113 Usage: optional 114 Value type: <none> 115 Definition: The specified pins should be configured as no pull. 116 117- bias-pull-down: 118 Usage: optional 119 Value type: <none> 120 Definition: The specified pins should be configured as pull down. 121 122- bias-pull-up: 123 Usage: optional 124 Value type: <empty> 125 Definition: The specified pins should be configured as pull up. 126 127- qcom,pull-up-strength: 128 Usage: optional 129 Value type: <u32> 130 Definition: Specifies the strength to use for pull up, if selected. 131 Valid values are; as defined in 132 <dt-bindings/pinctrl/qcom,pmic-gpio.h>: 133 1: 30uA (PMIC_GPIO_PULL_UP_30) 134 2: 1.5uA (PMIC_GPIO_PULL_UP_1P5) 135 3: 31.5uA (PMIC_GPIO_PULL_UP_31P5) 136 4: 1.5uA + 30uA boost (PMIC_GPIO_PULL_UP_1P5_30) 137 If this property is omitted 30uA strength will be used if 138 pull up is selected 139 140- bias-high-impedance: 141 Usage: optional 142 Value type: <none> 143 Definition: The specified pins will put in high-Z mode and disabled. 144 145- input-enable: 146 Usage: optional 147 Value type: <none> 148 Definition: The specified pins are put in input mode. 149 150- output-high: 151 Usage: optional 152 Value type: <none> 153 Definition: The specified pins are configured in output mode, driven 154 high. 155 156- output-low: 157 Usage: optional 158 Value type: <none> 159 Definition: The specified pins are configured in output mode, driven 160 low. 161 162- power-source: 163 Usage: optional 164 Value type: <u32> 165 Definition: Selects the power source for the specified pins. Valid 166 power sources are defined per chip in 167 <dt-bindings/pinctrl/qcom,pmic-gpio.h> 168 169- qcom,drive-strength: 170 Usage: optional 171 Value type: <u32> 172 Definition: Selects the drive strength for the specified pins. Value 173 drive strengths are: 174 0: no (PMIC_GPIO_STRENGTH_NO) 175 1: high (PMIC_GPIO_STRENGTH_HIGH) 0.9mA @ 1.8V - 1.9mA @ 2.6V 176 2: medium (PMIC_GPIO_STRENGTH_MED) 0.6mA @ 1.8V - 1.25mA @ 2.6V 177 3: low (PMIC_GPIO_STRENGTH_LOW) 0.15mA @ 1.8V - 0.3mA @ 2.6V 178 as defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h> 179 180- drive-push-pull: 181 Usage: optional 182 Value type: <none> 183 Definition: The specified pins are configured in push-pull mode. 184 185- drive-open-drain: 186 Usage: optional 187 Value type: <none> 188 Definition: The specified pins are configured in open-drain mode. 189 190- drive-open-source: 191 Usage: optional 192 Value type: <none> 193 Definition: The specified pins are configured in open-source mode. 194 195- qcom,analog-pass: 196 Usage: optional 197 Value type: <none> 198 Definition: The specified pins are configured in analog-pass-through mode. 199 200- qcom,atest: 201 Usage: optional 202 Value type: <u32> 203 Definition: Selects ATEST rail to route to GPIO when it's configured 204 in analog-pass-through mode. 205 Valid values are 1-4 corresponding to ATEST1 to ATEST4. 206 207- qcom,dtest-buffer: 208 Usage: optional 209 Value type: <u32> 210 Definition: Selects DTEST rail to route to GPIO when it's configured 211 as digital input. 212 Valid values are 1-4 corresponding to DTEST1 to DTEST4. 213 214Example: 215 216 pm8921_gpio: gpio@150 { 217 compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio"; 218 reg = <0x150 0x160>; 219 interrupts = <192 1>, <193 1>, <194 1>, 220 <195 1>, <196 1>, <197 1>, 221 <198 1>, <199 1>, <200 1>, 222 <201 1>, <202 1>, <203 1>, 223 <204 1>, <205 1>, <206 1>, 224 <207 1>, <208 1>, <209 1>, 225 <210 1>, <211 1>, <212 1>, 226 <213 1>, <214 1>, <215 1>, 227 <216 1>, <217 1>, <218 1>, 228 <219 1>, <220 1>, <221 1>, 229 <222 1>, <223 1>, <224 1>, 230 <225 1>, <226 1>, <227 1>, 231 <228 1>, <229 1>, <230 1>, 232 <231 1>, <232 1>, <233 1>, 233 <234 1>, <235 1>; 234 235 gpio-controller; 236 #gpio-cells = <2>; 237 238 pm8921_gpio_keys: gpio-keys { 239 volume-keys { 240 pins = "gpio20", "gpio21"; 241 function = "normal"; 242 243 input-enable; 244 bias-pull-up; 245 drive-push-pull; 246 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 247 power-source = <PM8921_GPIO_S4>; 248 }; 249 }; 250 }; 251