1Microsemi Ocelot network Switch
2===============================
3
4The Microsemi Ocelot network switch can be found on Microsemi SoCs (VSC7513,
5VSC7514)
6
7Required properties:
8- compatible: Should be "mscc,vsc7514-switch"
9- reg: Must contain an (offset, length) pair of the register set for each
10  entry in reg-names.
11- reg-names: Must include the following entries:
12  - "sys"
13  - "rew"
14  - "qs"
15  - "hsio"
16  - "qsys"
17  - "ana"
18  - "portX" with X from 0 to the number of last port index available on that
19    switch
20- interrupts: Should contain the switch interrupts for frame extraction and
21  frame injection
22- interrupt-names: should contain the interrupt names: "xtr", "inj"
23- ethernet-ports: A container for child nodes representing switch ports.
24
25The ethernet-ports container has the following properties
26
27Required properties:
28
29- #address-cells: Must be 1
30- #size-cells: Must be 0
31
32Each port node must have the following mandatory properties:
33- reg: Describes the port address in the switch
34
35Port nodes may also contain the following optional standardised
36properties, described in binding documents:
37
38- phy-handle: Phandle to a PHY on an MDIO bus. See
39  Documentation/devicetree/bindings/net/ethernet.txt for details.
40
41Example:
42
43	switch@1010000 {
44		compatible = "mscc,vsc7514-switch";
45		reg = <0x1010000 0x10000>,
46		      <0x1030000 0x10000>,
47		      <0x1080000 0x100>,
48		      <0x10d0000 0x10000>,
49		      <0x11e0000 0x100>,
50		      <0x11f0000 0x100>,
51		      <0x1200000 0x100>,
52		      <0x1210000 0x100>,
53		      <0x1220000 0x100>,
54		      <0x1230000 0x100>,
55		      <0x1240000 0x100>,
56		      <0x1250000 0x100>,
57		      <0x1260000 0x100>,
58		      <0x1270000 0x100>,
59		      <0x1280000 0x100>,
60		      <0x1800000 0x80000>,
61		      <0x1880000 0x10000>;
62		reg-names = "sys", "rew", "qs", "hsio", "port0",
63			    "port1", "port2", "port3", "port4", "port5",
64			    "port6", "port7", "port8", "port9", "port10",
65			    "qsys", "ana";
66		interrupts = <21 22>;
67		interrupt-names = "xtr", "inj";
68
69		ethernet-ports {
70			#address-cells = <1>;
71			#size-cells = <0>;
72
73			port0: port@0 {
74				reg = <0>;
75				phy-handle = <&phy0>;
76			};
77			port1: port@1 {
78				reg = <1>;
79				phy-handle = <&phy1>;
80			};
81		};
82	};
83