1* Amlogic Meson DWMAC Ethernet controller
2
3The device inherits all the properties of the dwmac/stmmac devices
4described in the file stmmac.txt in the current directory with the
5following changes.
6
7Required properties on all platforms:
8
9- compatible:	Depending on the platform this should be one of:
10			- "amlogic,meson6-dwmac"
11			- "amlogic,meson8b-dwmac"
12			- "amlogic,meson8m2-dwmac"
13			- "amlogic,meson-gxbb-dwmac"
14			- "amlogic,meson-axg-dwmac"
15		Additionally "snps,dwmac" and any applicable more
16		detailed version number described in net/stmmac.txt
17		should be used.
18
19- reg:	The first register range should be the one of the DWMAC
20	controller. The second range is is for the Amlogic specific
21	configuration (for example the PRG_ETHERNET register range
22	on Meson8b and newer)
23
24Required properties on Meson8b, Meson8m2, GXBB and newer:
25- clock-names:	Should contain the following:
26		- "stmmaceth" - see stmmac.txt
27		- "clkin0" - first parent clock of the internal mux
28		- "clkin1" - second parent clock of the internal mux
29
30Optional properties on Meson8b, Meson8m2, GXBB and newer:
31- amlogic,tx-delay-ns:	The internal RGMII TX clock delay (provided
32			by this driver) in nanoseconds. Allowed values
33			are: 0ns, 2ns, 4ns, 6ns.
34			When phy-mode is set to "rgmii" then the TX
35			delay should be explicitly configured. When
36			not configured a fallback of 2ns is used.
37			When the phy-mode is set to either "rgmii-id"
38			or "rgmii-txid" the TX clock delay is already
39			provided by the PHY. In that case this
40			property should be set to 0ns (which disables
41			the TX clock delay in the MAC to prevent the
42			clock from going off because both PHY and MAC
43			are adding a delay).
44			Any configuration is ignored when the phy-mode
45			is set to "rmii".
46
47Example for Meson6:
48
49	ethmac: ethernet@c9410000 {
50		compatible = "amlogic,meson6-dwmac", "snps,dwmac";
51		reg = <0xc9410000 0x10000
52		       0xc1108108 0x4>;
53		interrupts = <0 8 1>;
54		interrupt-names = "macirq";
55		clocks = <&clk81>;
56		clock-names = "stmmaceth";
57	}
58
59Example for GXBB:
60	ethmac: ethernet@c9410000 {
61		compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac";
62		reg = <0x0 0xc9410000 0x0 0x10000>,
63			<0x0 0xc8834540 0x0 0x8>;
64		interrupts = <0 8 1>;
65		interrupt-names = "macirq";
66		clocks = <&clkc CLKID_ETH>,
67				<&clkc CLKID_FCLK_DIV2>,
68				<&clkc CLKID_MPLL2>;
69		clock-names = "stmmaceth", "clkin0", "clkin1";
70		phy-mode = "rgmii";
71	};
72