1* Qualcomm Atheros QCA8xxx switch family
2
3Required properties:
4
5- compatible: should be one of:
6    "qca,qca8334"
7    "qca,qca8337"
8
9- #size-cells: must be 0
10- #address-cells: must be 1
11
12Subnodes:
13
14The integrated switch subnode should be specified according to the binding
15described in dsa/dsa.txt. As the QCA8K switches do not have a N:N mapping of
16port and PHY id, each subnode describing a port needs to have a valid phandle
17referencing the internal PHY connected to it. The CPU port of this switch is
18always port 0.
19
20A CPU port node has the following optional node:
21
22- fixed-link            : Fixed-link subnode describing a link to a non-MDIO
23                          managed entity. See
24                          Documentation/devicetree/bindings/net/fixed-link.txt
25                          for details.
26
27For QCA8K the 'fixed-link' sub-node supports only the following properties:
28
29- 'speed' (integer, mandatory), to indicate the link speed. Accepted
30  values are 10, 100 and 1000
31- 'full-duplex' (boolean, optional), to indicate that full duplex is
32  used. When absent, half duplex is assumed.
33
34Example:
35
36
37	&mdio0 {
38		phy_port1: phy@0 {
39			reg = <0>;
40		};
41
42		phy_port2: phy@1 {
43			reg = <1>;
44		};
45
46		phy_port3: phy@2 {
47			reg = <2>;
48		};
49
50		phy_port4: phy@3 {
51			reg = <3>;
52		};
53
54		phy_port5: phy@4 {
55			reg = <4>;
56		};
57
58		switch0@0 {
59			compatible = "qca,qca8337";
60			#address-cells = <1>;
61			#size-cells = <0>;
62
63			reg = <0>;
64
65			ports {
66				#address-cells = <1>;
67				#size-cells = <0>;
68				port@0 {
69					reg = <0>;
70					label = "cpu";
71					ethernet = <&gmac1>;
72					phy-mode = "rgmii";
73					fixed-link {
74						speed = 1000;
75						full-duplex;
76					};
77				};
78
79				port@1 {
80					reg = <1>;
81					label = "lan1";
82					phy-handle = <&phy_port1>;
83				};
84
85				port@2 {
86					reg = <2>;
87					label = "lan2";
88					phy-handle = <&phy_port2>;
89				};
90
91				port@3 {
92					reg = <3>;
93					label = "lan3";
94					phy-handle = <&phy_port3>;
95				};
96
97				port@4 {
98					reg = <4>;
99					label = "lan4";
100					phy-handle = <&phy_port4>;
101				};
102
103				port@5 {
104					reg = <5>;
105					label = "wan";
106					phy-handle = <&phy_port5>;
107				};
108			};
109		};
110	};
111