1Xilinx Axi CAN/Zynq CANPS controller Device Tree Bindings
2---------------------------------------------------------
3
4Required properties:
5- compatible		: Should be:
6			  - "xlnx,zynq-can-1.0" for Zynq CAN controllers
7			  - "xlnx,axi-can-1.00.a" for Axi CAN controllers
8			  - "xlnx,canfd-1.0" for CAN FD controllers
9- reg			: Physical base address and size of the controller
10			  registers map.
11- interrupts		: Property with a value describing the interrupt
12			  number.
13- clock-names		: List of input clock names
14			  - "can_clk", "pclk" (For CANPS),
15			  - "can_clk", "s_axi_aclk" (For AXI CAN and CAN FD).
16			  (See clock bindings for details).
17- clocks		: Clock phandles (see clock bindings for details).
18- tx-fifo-depth		: Can Tx fifo depth (Zynq, Axi CAN).
19- rx-fifo-depth		: Can Rx fifo depth (Zynq, Axi CAN, CAN FD in
20                          sequential Rx mode).
21- tx-mailbox-count	: Can Tx mailbox buffer count (CAN FD).
22- rx-mailbox-count	: Can Rx mailbox buffer count (CAN FD in mailbox Rx
23			  mode).
24
25
26Example:
27
28For Zynq CANPS Dts file:
29	zynq_can_0: can@e0008000 {
30			compatible = "xlnx,zynq-can-1.0";
31			clocks = <&clkc 19>, <&clkc 36>;
32			clock-names = "can_clk", "pclk";
33			reg = <0xe0008000 0x1000>;
34			interrupts = <0 28 4>;
35			interrupt-parent = <&intc>;
36			tx-fifo-depth = <0x40>;
37			rx-fifo-depth = <0x40>;
38		};
39For Axi CAN Dts file:
40	axi_can_0: axi-can@40000000 {
41			compatible = "xlnx,axi-can-1.00.a";
42			clocks = <&clkc 0>, <&clkc 1>;
43			clock-names = "can_clk","s_axi_aclk" ;
44			reg = <0x40000000 0x10000>;
45			interrupt-parent = <&intc>;
46			interrupts = <0 59 1>;
47			tx-fifo-depth = <0x40>;
48			rx-fifo-depth = <0x40>;
49		};
50For CAN FD Dts file:
51	canfd_0: canfd@40000000 {
52			compatible = "xlnx,canfd-1.0";
53			clocks = <&clkc 0>, <&clkc 1>;
54			clock-names = "can_clk", "s_axi_aclk";
55			reg = <0x40000000 0x2000>;
56			interrupt-parent = <&intc>;
57			interrupts = <0 59 1>;
58			tx-mailbox-count = <0x20>;
59			rx-fifo-depth = <0x20>;
60		};
61