1Renesas R-Car CAN FD controller Device Tree Bindings
2----------------------------------------------------
3
4Required properties:
5- compatible: Must contain one or more of the following:
6  - "renesas,rcar-gen3-canfd" for R-Car Gen3 compatible controller.
7  - "renesas,r8a7795-canfd" for R8A7795 (R-Car H3) compatible controller.
8  - "renesas,r8a7796-canfd" for R8A7796 (R-Car M3-W) compatible controller.
9  - "renesas,r8a77970-canfd" for R8A77970 (R-Car V3M) compatible controller.
10  - "renesas,r8a77980-canfd" for R8A77980 (R-Car V3H) compatible controller.
11
12  When compatible with the generic version, nodes must list the
13  SoC-specific version corresponding to the platform first, followed by the
14  family-specific and/or generic versions.
15
16- reg: physical base address and size of the R-Car CAN FD register map.
17- interrupts: interrupt specifiers for the Channel & Global interrupts
18- clocks: phandles and clock specifiers for 3 clock inputs.
19- clock-names: 3 clock input name strings: "fck", "canfd", "can_clk".
20- pinctrl-0: pin control group to be used for this controller.
21- pinctrl-names: must be "default".
22
23Required child nodes:
24The controller supports two channels and each is represented as a child node.
25The name of the child nodes are "channel0" and "channel1" respectively. Each
26child node supports the "status" property only, which is used to
27enable/disable the respective channel.
28
29Required properties for "renesas,r8a7795-canfd" and "renesas,r8a7796-canfd"
30compatible:
31In R8A7795 and R8A7796 SoCs, canfd clock is a div6 clock and can be used by both
32CAN and CAN FD controller at the same time. It needs to be scaled to maximum
33frequency if any of these controllers use it. This is done using the below
34properties:
35
36- assigned-clocks: phandle of canfd clock.
37- assigned-clock-rates: maximum frequency of this clock.
38
39Optional property:
40The controller can operate in either CAN FD only mode (default) or
41Classical CAN only mode. The mode is global to both the channels. In order to
42enable the later, define the following optional property.
43 - renesas,no-can-fd: puts the controller in Classical CAN only mode.
44
45Example
46-------
47
48SoC common .dtsi file:
49
50		canfd: can@e66c0000 {
51			compatible = "renesas,r8a7795-canfd",
52				     "renesas,rcar-gen3-canfd";
53			reg = <0 0xe66c0000 0 0x8000>;
54			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
55				   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
56			clocks = <&cpg CPG_MOD 914>,
57			       <&cpg CPG_CORE R8A7795_CLK_CANFD>,
58			       <&can_clk>;
59			clock-names = "fck", "canfd", "can_clk";
60			assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
61			assigned-clock-rates = <40000000>;
62			power-domains = <&cpg>;
63			status = "disabled";
64
65			channel0 {
66				status = "disabled";
67			};
68
69			channel1 {
70				status = "disabled";
71			};
72		};
73
74Board specific .dts file:
75
76E.g. below enables Channel 1 alone in the board in Classical CAN only mode.
77
78&canfd {
79	pinctrl-0 = <&canfd1_pins>;
80	pinctrl-names = "default";
81	renesas,no-can-fd;
82	status = "okay";
83
84	channel1 {
85		status = "okay";
86	};
87};
88
89E.g. below enables Channel 0 alone in the board using External clock
90as fCAN clock.
91
92&canfd {
93	pinctrl-0 = <&canfd0_pins &can_clk_pins>;
94	pinctrl-names = "default";
95	status = "okay";
96
97	channel0 {
98		status = "okay";
99	};
100};
101