1* Allwinner sunxi MMC controller
2
3The highspeed MMC host controller on Allwinner SoCs provides an interface
4for MMC, SD and SDIO types of memory cards.
5
6Supported maximum speeds are the ones of the eMMC standard 4.5 as well
7as the speed of SD standard 3.0.
8Absolute maximum transfer rate is 200MB/s
9
10Required properties:
11 - compatible : should be one of:
12   * "allwinner,sun4i-a10-mmc"
13   * "allwinner,sun5i-a13-mmc"
14   * "allwinner,sun7i-a20-mmc"
15   * "allwinner,sun8i-a83t-emmc"
16   * "allwinner,sun9i-a80-mmc"
17   * "allwinner,sun50i-a64-emmc"
18   * "allwinner,sun50i-a64-mmc"
19   * "allwinner,sun50i-h6-emmc", "allwinner.sun50i-a64-emmc"
20   * "allwinner,sun50i-h6-mmc", "allwinner.sun50i-a64-mmc"
21 - reg : mmc controller base registers
22 - clocks : a list with 4 phandle + clock specifier pairs
23 - clock-names : must contain "ahb", "mmc", "output" and "sample"
24 - interrupts : mmc controller interrupt
25
26Optional properties:
27 - resets : phandle + reset specifier pair
28 - reset-names : must contain "ahb"
29 - for cd, bus-width and additional generic mmc parameters
30   please refer to mmc.txt within this directory
31
32Examples:
33	- Within .dtsi:
34	mmc0: mmc@1c0f000 {
35		compatible = "allwinner,sun5i-a13-mmc";
36		reg = <0x01c0f000 0x1000>;
37		clocks = <&ahb_gates 8>, <&mmc0_clk>, <&mmc0_output_clk>, <&mmc0_sample_clk>;
38		clock-names = "ahb", "mod", "output", "sample";
39		interrupts = <0 32 4>;
40		status = "disabled";
41	};
42
43	- Within dts:
44	mmc0: mmc@1c0f000 {
45		pinctrl-names = "default", "default";
46		pinctrl-0 = <&mmc0_pins_a>;
47		pinctrl-1 = <&mmc0_cd_pin_reference_design>;
48		bus-width = <4>;
49		cd-gpios = <&pio 7 1 0>; /* PH1 */
50		cd-inverted;
51		status = "okay";
52	};
53