1device-tree bindings for rockchip soc display controller (vop)
2
3VOP (Visual Output Processor) is the Display Controller for the Rockchip
4series of SoCs which transfers the image data from a video memory
5buffer to an external LCD interface.
6
7Required properties:
8- compatible: value should be one of the following
9		"rockchip,rk3036-vop";
10		"rockchip,rk3126-vop";
11		"rockchip,rk3288-vop";
12		"rockchip,rk3368-vop";
13		"rockchip,rk3366-vop";
14		"rockchip,rk3399-vop-big";
15		"rockchip,rk3399-vop-lit";
16		"rockchip,rk3228-vop";
17		"rockchip,rk3328-vop";
18
19- interrupts: should contain a list of all VOP IP block interrupts in the
20		 order: VSYNC, LCD_SYSTEM. The interrupt specifier
21		 format depends on the interrupt controller used.
22
23- clocks: must include clock specifiers corresponding to entries in the
24		clock-names property.
25
26- clock-names: Must contain
27		aclk_vop: for ddr buffer transfer.
28		hclk_vop: for ahb bus to R/W the phy regs.
29		dclk_vop: pixel clock.
30
31- resets: Must contain an entry for each entry in reset-names.
32  See ../reset/reset.txt for details.
33- reset-names: Must include the following entries:
34  - axi
35  - ahb
36  - dclk
37
38- iommus: required a iommu node
39
40- port: A port node with endpoint definitions as defined in
41  Documentation/devicetree/bindings/media/video-interfaces.txt.
42
43Example:
44SoC specific DT entry:
45	vopb: vopb@ff930000 {
46		compatible = "rockchip,rk3288-vop";
47		reg = <0xff930000 0x19c>;
48		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
49		clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
50		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
51		resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>;
52		reset-names = "axi", "ahb", "dclk";
53		iommus = <&vopb_mmu>;
54		vopb_out: port {
55			#address-cells = <1>;
56			#size-cells = <0>;
57			vopb_out_edp: endpoint@0 {
58				reg = <0>;
59				remote-endpoint=<&edp_in_vopb>;
60			};
61			vopb_out_hdmi: endpoint@1 {
62				reg = <1>;
63				remote-endpoint=<&hdmi_in_vopb>;
64			};
65		};
66	};
67