1* Renesas R-Car Display Unit (DU) 2 3Required Properties: 4 5 - compatible: must be one of the following. 6 - "renesas,du-r8a7743" for R8A7743 (RZ/G1M) compatible DU 7 - "renesas,du-r8a7745" for R8A7745 (RZ/G1E) compatible DU 8 - "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU 9 - "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU 10 - "renesas,du-r8a7791" for R8A7791 (R-Car M2-W) compatible DU 11 - "renesas,du-r8a7792" for R8A7792 (R-Car V2H) compatible DU 12 - "renesas,du-r8a7793" for R8A7793 (R-Car M2-N) compatible DU 13 - "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU 14 - "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU 15 - "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU 16 - "renesas,du-r8a77965" for R8A77965 (R-Car M3-N) compatible DU 17 - "renesas,du-r8a77970" for R8A77970 (R-Car V3M) compatible DU 18 - "renesas,du-r8a77995" for R8A77995 (R-Car D3) compatible DU 19 20 - reg: the memory-mapped I/O registers base address and length 21 22 - interrupts: Interrupt specifiers for the DU interrupts. 23 24 - clocks: A list of phandles + clock-specifier pairs, one for each entry in 25 the clock-names property. 26 - clock-names: Name of the clocks. This property is model-dependent. 27 - R8A7779 uses a single functional clock. The clock doesn't need to be 28 named. 29 - All other DU instances use one functional clock per channel The 30 functional clocks must be named "du.x" with "x" being the channel 31 numerical index. 32 - In addition to the functional clocks, all DU versions also support 33 externally supplied pixel clocks. Those clocks are optional. When 34 supplied they must be named "dclkin.x" with "x" being the input clock 35 numerical index. 36 37 - vsps: A list of phandle and channel index tuples to the VSPs that handle 38 the memory interfaces for the DU channels. The phandle identifies the VSP 39 instance that serves the DU channel, and the channel index identifies the 40 LIF instance in that VSP. 41 42Required nodes: 43 44The connections to the DU output video ports are modeled using the OF graph 45bindings specified in Documentation/devicetree/bindings/graph.txt. 46 47The following table lists for each supported model the port number 48corresponding to each DU output. 49 50 Port0 Port1 Port2 Port3 51----------------------------------------------------------------------------- 52 R8A7743 (RZ/G1M) DPAD 0 LVDS 0 - - 53 R8A7745 (RZ/G1E) DPAD 0 DPAD 1 - - 54 R8A7779 (R-Car H1) DPAD 0 DPAD 1 - - 55 R8A7790 (R-Car H2) DPAD 0 LVDS 0 LVDS 1 - 56 R8A7791 (R-Car M2-W) DPAD 0 LVDS 0 - - 57 R8A7792 (R-Car V2H) DPAD 0 DPAD 1 - - 58 R8A7793 (R-Car M2-N) DPAD 0 LVDS 0 - - 59 R8A7794 (R-Car E2) DPAD 0 DPAD 1 - - 60 R8A7795 (R-Car H3) DPAD 0 HDMI 0 HDMI 1 LVDS 0 61 R8A7796 (R-Car M3-W) DPAD 0 HDMI 0 LVDS 0 - 62 R8A77965 (R-Car M3-N) DPAD 0 HDMI 0 LVDS 0 - 63 R8A77970 (R-Car V3M) DPAD 0 LVDS 0 - - 64 R8A77995 (R-Car D3) DPAD 0 LVDS 0 LVDS 1 - 65 66 67Example: R8A7795 (R-Car H3) ES2.0 DU 68 69 du: display@feb00000 { 70 compatible = "renesas,du-r8a7795"; 71 reg = <0 0xfeb00000 0 0x80000>; 72 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 73 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 74 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>, 75 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 76 clocks = <&cpg CPG_MOD 724>, 77 <&cpg CPG_MOD 723>, 78 <&cpg CPG_MOD 722>, 79 <&cpg CPG_MOD 721>; 80 clock-names = "du.0", "du.1", "du.2", "du.3"; 81 vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>; 82 83 ports { 84 #address-cells = <1>; 85 #size-cells = <0>; 86 87 port@0 { 88 reg = <0>; 89 du_out_rgb: endpoint { 90 }; 91 }; 92 port@1 { 93 reg = <1>; 94 du_out_hdmi0: endpoint { 95 remote-endpoint = <&dw_hdmi0_in>; 96 }; 97 }; 98 port@2 { 99 reg = <2>; 100 du_out_hdmi1: endpoint { 101 remote-endpoint = <&dw_hdmi1_in>; 102 }; 103 }; 104 port@3 { 105 reg = <3>; 106 du_out_lvds0: endpoint { 107 }; 108 }; 109 }; 110 }; 111
