1TI CPUFreq and OPP bindings
2================================
3
4Certain TI SoCs, like those in the am335x, am437x, am57xx, and dra7xx
5families support different OPPs depending on the silicon variant in use.
6The ti-cpufreq driver can use revision and an efuse value from the SoC to
7provide the OPP framework with supported hardware information. This is
8used to determine which OPPs from the operating-points-v2 table get enabled
9when it is parsed by the OPP framework.
10
11Required properties:
12--------------------
13In 'cpus' nodes:
14- operating-points-v2: Phandle to the operating-points-v2 table to use.
15
16In 'operating-points-v2' table:
17- compatible: Should be
18	- 'operating-points-v2-ti-cpu' for am335x, am43xx, and dra7xx/am57xx SoCs
19- syscon: A phandle pointing to a syscon node representing the control module
20	  register space of the SoC.
21
22Optional properties:
23--------------------
24For each opp entry in 'operating-points-v2' table:
25- opp-supported-hw: Two bitfields indicating:
26	1. Which revision of the SoC the OPP is supported by
27	2. Which eFuse bits indicate this OPP is available
28
29	A bitwise AND is performed against these values and if any bit
30	matches, the OPP gets enabled.
31
32Example:
33--------
34
35/* From arch/arm/boot/dts/am33xx.dtsi */
36cpus {
37	#address-cells = <1>;
38	#size-cells = <0>;
39	cpu@0 {
40		compatible = "arm,cortex-a8";
41		device_type = "cpu";
42		reg = <0>;
43
44		operating-points-v2 = <&cpu0_opp_table>;
45
46		clocks = <&dpll_mpu_ck>;
47		clock-names = "cpu";
48
49		clock-latency = <300000>; /* From omap-cpufreq driver */
50	};
51};
52
53/*
54 * cpu0 has different OPPs depending on SoC revision and some on revisions
55 * 0x2 and 0x4 have eFuse bits that indicate if they are available or not
56 */
57cpu0_opp_table: opp-table {
58	compatible = "operating-points-v2-ti-cpu";
59	syscon = <&scm_conf>;
60
61	/*
62	 * The three following nodes are marked with opp-suspend
63	 * because they can not be enabled simultaneously on a
64	 * single SoC.
65	 */
66	opp50-300000000 {
67		opp-hz = /bits/ 64 <300000000>;
68		opp-microvolt = <950000 931000 969000>;
69		opp-supported-hw = <0x06 0x0010>;
70		opp-suspend;
71	};
72
73	opp100-275000000 {
74		opp-hz = /bits/ 64 <275000000>;
75		opp-microvolt = <1100000 1078000 1122000>;
76		opp-supported-hw = <0x01 0x00FF>;
77		opp-suspend;
78	};
79
80	opp100-300000000 {
81		opp-hz = /bits/ 64 <300000000>;
82		opp-microvolt = <1100000 1078000 1122000>;
83		opp-supported-hw = <0x06 0x0020>;
84		opp-suspend;
85	};
86
87	opp100-500000000 {
88		opp-hz = /bits/ 64 <500000000>;
89		opp-microvolt = <1100000 1078000 1122000>;
90		opp-supported-hw = <0x01 0xFFFF>;
91	};
92
93	opp100-600000000 {
94		opp-hz = /bits/ 64 <600000000>;
95		opp-microvolt = <1100000 1078000 1122000>;
96		opp-supported-hw = <0x06 0x0040>;
97	};
98
99	opp120-600000000 {
100		opp-hz = /bits/ 64 <600000000>;
101		opp-microvolt = <1200000 1176000 1224000>;
102		opp-supported-hw = <0x01 0xFFFF>;
103	};
104
105	opp120-720000000 {
106		opp-hz = /bits/ 64 <720000000>;
107		opp-microvolt = <1200000 1176000 1224000>;
108		opp-supported-hw = <0x06 0x0080>;
109	};
110
111	oppturbo-720000000 {
112		opp-hz = /bits/ 64 <720000000>;
113		opp-microvolt = <1260000 1234800 1285200>;
114		opp-supported-hw = <0x01 0xFFFF>;
115	};
116
117	oppturbo-800000000 {
118		opp-hz = /bits/ 64 <800000000>;
119		opp-microvolt = <1260000 1234800 1285200>;
120		opp-supported-hw = <0x06 0x0100>;
121	};
122
123	oppnitro-1000000000 {
124		opp-hz = /bits/ 64 <1000000000>;
125		opp-microvolt = <1325000 1298500 1351500>;
126		opp-supported-hw = <0x04 0x0200>;
127	};
128};
129