1UniPhier clock controller 2 3 4System clock 5------------ 6 7Required properties: 8- compatible: should be one of the following: 9 "socionext,uniphier-ld4-clock" - for LD4 SoC. 10 "socionext,uniphier-pro4-clock" - for Pro4 SoC. 11 "socionext,uniphier-sld8-clock" - for sLD8 SoC. 12 "socionext,uniphier-pro5-clock" - for Pro5 SoC. 13 "socionext,uniphier-pxs2-clock" - for PXs2/LD6b SoC. 14 "socionext,uniphier-ld11-clock" - for LD11 SoC. 15 "socionext,uniphier-ld20-clock" - for LD20 SoC. 16 "socionext,uniphier-pxs3-clock" - for PXs3 SoC 17- #clock-cells: should be 1. 18 19Example: 20 21 sysctrl@61840000 { 22 compatible = "socionext,uniphier-sysctrl", 23 "simple-mfd", "syscon"; 24 reg = <0x61840000 0x4000>; 25 26 clock { 27 compatible = "socionext,uniphier-ld11-clock"; 28 #clock-cells = <1>; 29 }; 30 31 other nodes ... 32 }; 33 34Provided clocks: 35 36 8: ST DMAC 3712: GIO (Giga bit stream I/O) 3814: USB3 ch0 host 3915: USB3 ch1 host 4016: USB3 ch0 PHY0 4117: USB3 ch0 PHY1 4220: USB3 ch1 PHY0 4321: USB3 ch1 PHY1 44 45 46Media I/O (MIO) clock, SD clock 47------------------------------- 48 49Required properties: 50- compatible: should be one of the following: 51 "socionext,uniphier-ld4-mio-clock" - for LD4 SoC. 52 "socionext,uniphier-pro4-mio-clock" - for Pro4 SoC. 53 "socionext,uniphier-sld8-mio-clock" - for sLD8 SoC. 54 "socionext,uniphier-pro5-sd-clock" - for Pro5 SoC. 55 "socionext,uniphier-pxs2-sd-clock" - for PXs2/LD6b SoC. 56 "socionext,uniphier-ld11-mio-clock" - for LD11 SoC. 57 "socionext,uniphier-ld20-sd-clock" - for LD20 SoC. 58 "socionext,uniphier-pxs3-sd-clock" - for PXs3 SoC 59- #clock-cells: should be 1. 60 61Example: 62 63 mioctrl@59810000 { 64 compatible = "socionext,uniphier-mioctrl", 65 "simple-mfd", "syscon"; 66 reg = <0x59810000 0x800>; 67 68 clock { 69 compatible = "socionext,uniphier-ld11-mio-clock"; 70 #clock-cells = <1>; 71 }; 72 73 other nodes ... 74 }; 75 76Provided clocks: 77 78 0: SD ch0 host 79 1: eMMC host 80 2: SD ch1 host 81 7: MIO DMAC 82 8: USB2 ch0 host 83 9: USB2 ch1 host 8410: USB2 ch2 host 8512: USB2 ch0 PHY 8613: USB2 ch1 PHY 8714: USB2 ch2 PHY 88 89 90Peripheral clock 91---------------- 92 93Required properties: 94- compatible: should be one of the following: 95 "socionext,uniphier-ld4-peri-clock" - for LD4 SoC. 96 "socionext,uniphier-pro4-peri-clock" - for Pro4 SoC. 97 "socionext,uniphier-sld8-peri-clock" - for sLD8 SoC. 98 "socionext,uniphier-pro5-peri-clock" - for Pro5 SoC. 99 "socionext,uniphier-pxs2-peri-clock" - for PXs2/LD6b SoC. 100 "socionext,uniphier-ld11-peri-clock" - for LD11 SoC. 101 "socionext,uniphier-ld20-peri-clock" - for LD20 SoC. 102 "socionext,uniphier-pxs3-peri-clock" - for PXs3 SoC 103- #clock-cells: should be 1. 104 105Example: 106 107 perictrl@59820000 { 108 compatible = "socionext,uniphier-perictrl", 109 "simple-mfd", "syscon"; 110 reg = <0x59820000 0x200>; 111 112 clock { 113 compatible = "socionext,uniphier-ld11-peri-clock"; 114 #clock-cells = <1>; 115 }; 116 117 other nodes ... 118 }; 119 120Provided clocks: 121 122 0: UART ch0 123 1: UART ch1 124 2: UART ch2 125 3: UART ch3 126 4: I2C ch0 127 5: I2C ch1 128 6: I2C ch2 129 7: I2C ch3 130 8: I2C ch4 131 9: I2C ch5 13210: I2C ch6 133