1ARM System Controller ICST clocks
2
3The ICS525 and ICS307 oscillators are produced by Integrated Devices
4Technology (IDT). ARM integrated these oscillators deeply into their
5reference designs by adding special control registers that manage such
6oscillators to their system controllers.
7
8The various ARM system controllers contain logic to serialize and initialize
9an ICST clock request after a write to the 32 bit register at an offset
10into the system controller. Furthermore, to even be able to alter one of
11these frequencies, the system controller must first be unlocked by
12writing a special token to another offset in the system controller.
13
14Some ARM hardware contain special versions of the serial interface that only
15connects the low 8 bits of the VDW (missing one bit), hardwires RDW to
16different values and sometimes also hardwire the output divider. They
17therefore have special compatible strings as per this table (the OD value is
18the value on the pins, not the resulting output divider):
19
20Hardware variant:        RDW     OD          VDW
21
22Integrator/AP            22      1           Bit 8 0, rest variable
23integratorap-cm
24
25Integrator/AP            46      3           Bit 8 0, rest variable
26integratorap-sys
27
28Integrator/AP            22 or   1           17 or (33 or 25 MHz)
29integratorap-pci         14      1           14
30
31Integrator/CP            22      variable    Bit 8 0, rest variable
32integratorcp-cm-core
33
34Integrator/CP            22      variable    Bit 8 0, rest variable
35integratorcp-cm-mem
36
37The ICST oscillator must be provided inside a system controller node.
38
39Required properties:
40- compatible: must be one of
41  "arm,syscon-icst525"
42  "arm,syscon-icst307"
43  "arm,syscon-icst525-integratorap-cm"
44  "arm,syscon-icst525-integratorap-sys"
45  "arm,syscon-icst525-integratorap-pci"
46  "arm,syscon-icst525-integratorcp-cm-core"
47  "arm,syscon-icst525-integratorcp-cm-mem"
48- lock-offset: the offset address into the system controller where the
49  unlocking register is located
50- vco-offset: the offset address into the system controller where the
51  ICST control register is located (even 32 bit address)
52- #clock-cells: must be <0>
53- clocks: parent clock, since the ICST needs a parent clock to derive its
54  frequency from, this attribute is compulsory.
55
56Example:
57
58syscon: syscon@10000000 {
59	compatible = "syscon";
60	reg = <0x10000000 0x1000>;
61
62	oscclk0: osc0@c {
63		compatible = "arm,syscon-icst307";
64		#clock-cells = <0>;
65		lock-offset = <0x20>;
66		vco-offset = <0x0c>;
67		clocks = <&xtal24mhz>;
68	};
69	(...)
70};
71