| /Linux-v6.1/drivers/clk/qcom/ |
| D | clk-alpha-pll.c | 1366 if (pll->post_div_table[i].val == val) { in clk_alpha_pll_postdiv_fabia_recalc_rate()
1367 div = pll->post_div_table[i].div; in clk_alpha_pll_postdiv_fabia_recalc_rate()
1388 if (pll->post_div_table[i].val == val) { in clk_trion_pll_postdiv_recalc_rate()
1389 div = pll->post_div_table[i].div; in clk_trion_pll_postdiv_recalc_rate()
1403 return divider_round_rate(hw, rate, prate, pll->post_div_table, in clk_trion_pll_postdiv_round_rate()
1417 if (pll->post_div_table[i].div == div) { in clk_trion_pll_postdiv_set_rate()
1418 val = pll->post_div_table[i].val; in clk_trion_pll_postdiv_set_rate()
1440 return divider_round_rate(hw, rate, prate, pll->post_div_table, in clk_alpha_pll_postdiv_fabia_round_rate()
1463 if (pll->post_div_table[i].div == div) { in clk_alpha_pll_postdiv_fabia_set_rate()
1464 val = pll->post_div_table[i].val; in clk_alpha_pll_postdiv_fabia_set_rate()
[all …]
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| D | camcc-sc7280.c | 85 .post_div_table = post_div_table_cam_cc_pll0_out_even,
108 .post_div_table = post_div_table_cam_cc_pll0_out_odd,
160 .post_div_table = post_div_table_cam_cc_pll1_out_even,
210 .post_div_table = post_div_table_cam_cc_pll2_out_aux,
233 .post_div_table = post_div_table_cam_cc_pll2_out_aux2,
285 .post_div_table = post_div_table_cam_cc_pll3_out_even,
337 .post_div_table = post_div_table_cam_cc_pll4_out_even,
389 .post_div_table = post_div_table_cam_cc_pll5_out_even,
441 .post_div_table = post_div_table_cam_cc_pll6_out_even,
464 .post_div_table = post_div_table_cam_cc_pll6_out_odd,
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| D | camcc-sm8450.c | 92 .post_div_table = post_div_table_cam_cc_pll0_out_even,
115 .post_div_table = post_div_table_cam_cc_pll0_out_odd,
163 .post_div_table = post_div_table_cam_cc_pll1_out_even,
234 .post_div_table = post_div_table_cam_cc_pll3_out_even,
282 .post_div_table = post_div_table_cam_cc_pll4_out_even,
330 .post_div_table = post_div_table_cam_cc_pll5_out_even,
378 .post_div_table = post_div_table_cam_cc_pll6_out_even,
426 .post_div_table = post_div_table_cam_cc_pll7_out_even,
474 .post_div_table = post_div_table_cam_cc_pll8_out_even,
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| D | lpassaudiocc-sc7280.c | 104 .post_div_table = post_div_table_lpass_audio_cc_pll_out_aux2,
159 .post_div_table = post_div_table_lpass_aon_cc_pll_out_even,
181 .post_div_table = post_div_table_lpass_aon_cc_pll_out_odd,
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| D | clk-alpha-pll.h | 102 const struct clk_div_table *post_div_table; member
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| D | gcc-sm6115.c | 83 .post_div_table = post_div_table_gpll0_out_aux2,
103 .post_div_table = post_div_table_gpll0_out_main,
151 .post_div_table = post_div_table_gpll10_out_main,
203 .post_div_table = post_div_table_gpll11_out_main,
262 .post_div_table = post_div_table_gpll4_out_main,
301 .post_div_table = post_div_table_gpll6_out_main,
340 .post_div_table = post_div_table_gpll7_out_main,
395 .post_div_table = post_div_table_gpll8_out_main,
445 .post_div_table = post_div_table_gpll9_out_main,
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| D | mmcc-msm8998.c | 91 .post_div_table = post_div_table_fabia_even,
123 .post_div_table = post_div_table_fabia_even,
151 .post_div_table = post_div_table_fabia_even,
179 .post_div_table = post_div_table_fabia_even,
207 .post_div_table = post_div_table_fabia_even,
235 .post_div_table = post_div_table_fabia_even,
263 .post_div_table = post_div_table_fabia_even,
291 .post_div_table = post_div_table_fabia_even,
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| D | camcc-sm8250.c | 79 .post_div_table = post_div_table_cam_cc_pll0_out_even,
102 .post_div_table = post_div_table_cam_cc_pll0_out_odd,
153 .post_div_table = post_div_table_cam_cc_pll1_out_even,
204 .post_div_table = post_div_table_cam_cc_pll2_out_main,
255 .post_div_table = post_div_table_cam_cc_pll3_out_even,
306 .post_div_table = post_div_table_cam_cc_pll4_out_even,
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| D | camcc-sdm845.c | 52 .post_div_table = post_div_table_fabia_even,
84 .post_div_table = post_div_table_fabia_even,
116 .post_div_table = post_div_table_fabia_even,
148 .post_div_table = post_div_table_fabia_even,
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| D | gpucc-msm8998.c | 81 .post_div_table = post_div_table_fabia_even,
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| D | lpasscorecc-sc7180.c | 89 .post_div_table = post_div_table_lpass_lpaaudio_dig_pll_out_odd,
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| D | lpasscorecc-sc7280.c | 72 .post_div_table = post_div_table_lpass_core_cc_dig_pll_out_odd,
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| D | gcc-qcm2290.c | 82 .post_div_table = post_div_table_gpll0_out_aux2,
199 .post_div_table = post_div_table_gpll3_out_main,
270 .post_div_table = post_div_table_gpll6_out_main,
343 .post_div_table = post_div_table_gpll8_out_main,
395 .post_div_table = post_div_table_gpll9_out_main,
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| D | gcc-sm6375.c | 85 .post_div_table = post_div_table_gpll0_out_even,
107 .post_div_table = post_div_table_gpll0_out_odd,
227 .post_div_table = post_div_table_gpll3_out_even,
300 .post_div_table = post_div_table_gpll6_out_even,
371 .post_div_table = post_div_table_gpll8_out_even,
423 .post_div_table = post_div_table_gpll9_out_main,
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| D | dispcc-sm6115.c | 81 .post_div_table = post_div_table_disp_cc_pll0_out_main,
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| D | dispcc-sc7180.c | 60 .post_div_table = post_div_table_disp_cc_pll0_out_even,
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| D | gcc-sdx55.c | 68 .post_div_table = post_div_table_lucid_even,
104 .post_div_table = post_div_table_lucid_even,
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| D | gcc-sm6350.c | 59 .post_div_table = post_div_table_gpll0_out_even,
81 .post_div_table = post_div_table_gpll0_out_odd,
120 .post_div_table = post_div_table_gpll6_out_even,
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| D | gcc-sdx65.c | 60 .post_div_table = post_div_table_gpll0_out_even,
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| /Linux-v6.1/drivers/clk/imx/ |
| D | clk-imx6sl.c | 80 static const struct clk_div_table post_div_table[] = { variable
267 …v", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock… in imx6sl_clocks_init()
269 …v", "pll5_video", CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock… in imx6sl_clocks_init()
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| D | clk-imx6sll.c | 59 static const struct clk_div_table post_div_table[] = { variable
176 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sll_clocks_init()
180 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sll_clocks_init()
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| D | clk-imx6q.c | 103 static struct clk_div_table post_div_table[] = { variable
462 post_div_table[1].div = 1; in imx6q_clocks_init()
463 post_div_table[2].div = 1; in imx6q_clocks_init()
593 …post_div", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock… in imx6q_clocks_init()
598 …post_div", "pll5_video", CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock… in imx6q_clocks_init()
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| D | clk-imx6ul.c | 82 static const struct clk_div_table post_div_table[] = { variable
218 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6ul_clocks_init()
222 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6ul_clocks_init()
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| D | clk-imx6sx.c | 96 static const struct clk_div_table post_div_table[] = { variable
248 CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sx_clocks_init()
252 CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sx_clocks_init()
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| D | clk-imx7d.c | 36 static const struct clk_div_table post_div_table[] = { variable
434 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xf0, 22, 2, 0, post_div_table, &imx_ccm_lock); in imx7d_clocks_init()
438 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x130, 22, 2, 0, post_div_table, &imx_ccm_lock); in imx7d_clocks_init()
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