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Searched refs:PCLK_SPI0 (Results 1 – 25 of 29) sorted by relevance

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/Linux-v5.4/include/dt-bindings/clock/
Ds3c2443.h74 #define PCLK_SPI0 78 macro
Dsamsung,s3c64xx-clock.h68 #define PCLK_SPI0 53 macro
Dexynos7-clk.h104 #define PCLK_SPI0 12 macro
Drk3188-cru-common.h80 #define PCLK_SPI0 328 macro
Drk3128-cru.h107 #define PCLK_SPI0 338 macro
Drk3228-cru.h106 #define PCLK_SPI0 338 macro
Dpx30-cru.h162 #define PCLK_SPI0 341 macro
Drk3368-cru.h121 #define PCLK_SPI0 338 macro
Drk3288-cru.h130 #define PCLK_SPI0 338 macro
Drk3308-cru.h186 #define PCLK_SPI0 207 macro
Drk3399-cru.h242 #define PCLK_SPI0 347 macro
/Linux-v5.4/drivers/clk/samsung/
Dclk-s3c2443.c136 GATE(PCLK_SPI0, "spi0", "pclk", PCLKCON, 6, 0, 0),
168 ALIAS(PCLK_SPI0, "s3c2443-spi.0", "spi"),
169 ALIAS(PCLK_SPI0, "s3c2443-spi.0", "spi_busclk0"),
Dclk-s3c64xx.c223 GATE_BUS(PCLK_SPI0, "pclk_spi0", "pclk", PCLK_GATE, 21),
333 ALIAS(PCLK_SPI0, "s3c6410-spi.0", "spi"),
355 ALIAS(PCLK_SPI0, "s3c6410-spi.0", "spi_busclk0"),
Dclk-exynos7.c756 GATE(PCLK_SPI0, "pclk_spi0", "mout_aclk_peric1_66_user",
/Linux-v5.4/Documentation/devicetree/bindings/spi/
Dspi-rockchip.txt53 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
/Linux-v5.4/drivers/clk/rockchip/
Dclk-rk3128.c506 GATE(PCLK_SPI0, "pclk_spi0", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 12, GFLAGS),
Dclk-rk3228.c615 GATE(PCLK_SPI0, "pclk_spi0", "pclk_cpu", 0, RK2928_CLKGATE_CON(9), 6, GFLAGS),
Dclk-rk3188.c519 GATE(PCLK_SPI0, "pclk_spi0", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 12, GFLAGS),
Dclk-rk3368.c800 GATE(PCLK_SPI0, "pclk_spi0", "pclk_peri", 0, RK3368_CLKGATE_CON(19), 4, GFLAGS),
Dclk-rk3288.c731 GATE(PCLK_SPI0, "pclk_spi0", "pclk_peri", 0, RK3288_CLKGATE_CON(6), 4, GFLAGS),
Dclk-px30.c821 GATE(PCLK_SPI0, "pclk_spi0", "pclk_bus_pre", 0, PX30_CLKGATE_CON(15), 1, GFLAGS),
Dclk-rk3308.c875 GATE(PCLK_SPI0, "pclk_spi0", "pclk_bus", 0, RK3308_CLKGATE_CON(6), 4, GFLAGS),
Dclk-rk3399.c1042 GATE(PCLK_SPI0, "pclk_spi0", "pclk_perilp1", 0, RK3399_CLKGATE_CON(23), 10, GFLAGS),
/Linux-v5.4/arch/arm/boot/dts/
Drk3xxx.dtsi446 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
Drk322x.dtsi385 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;

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